xref: /OK3568_Linux_fs/kernel/sound/drivers/mpu401/mpu401_uart.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
4*4882a593Smuzhiyun  *  Routines for control of MPU-401 in UART mode
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  *  MPU-401 supports UART mode which is not capable generate transmit
7*4882a593Smuzhiyun  *  interrupts thus output is done via polling. Without interrupt,
8*4882a593Smuzhiyun  *  input is done also via polling. Do not expect good performance.
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  *   13-03-2003:
11*4882a593Smuzhiyun  *      Added support for different kind of hardware I/O. Build in choices
12*4882a593Smuzhiyun  *      are port and mmio. For other kind of I/O, set mpu->read and
13*4882a593Smuzhiyun  *      mpu->write to your own I/O functions.
14*4882a593Smuzhiyun  */
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include <linux/io.h>
17*4882a593Smuzhiyun #include <linux/delay.h>
18*4882a593Smuzhiyun #include <linux/init.h>
19*4882a593Smuzhiyun #include <linux/slab.h>
20*4882a593Smuzhiyun #include <linux/ioport.h>
21*4882a593Smuzhiyun #include <linux/module.h>
22*4882a593Smuzhiyun #include <linux/interrupt.h>
23*4882a593Smuzhiyun #include <linux/errno.h>
24*4882a593Smuzhiyun #include <sound/core.h>
25*4882a593Smuzhiyun #include <sound/mpu401.h>
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
28*4882a593Smuzhiyun MODULE_DESCRIPTION("Routines for control of MPU-401 in UART mode");
29*4882a593Smuzhiyun MODULE_LICENSE("GPL");
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun static void snd_mpu401_uart_input_read(struct snd_mpu401 * mpu);
32*4882a593Smuzhiyun static void snd_mpu401_uart_output_write(struct snd_mpu401 * mpu);
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun /*
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun  */
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun #define snd_mpu401_input_avail(mpu) \
39*4882a593Smuzhiyun 	(!(mpu->read(mpu, MPU401C(mpu)) & MPU401_RX_EMPTY))
40*4882a593Smuzhiyun #define snd_mpu401_output_ready(mpu) \
41*4882a593Smuzhiyun 	(!(mpu->read(mpu, MPU401C(mpu)) & MPU401_TX_FULL))
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun /* Build in lowlevel io */
mpu401_write_port(struct snd_mpu401 * mpu,unsigned char data,unsigned long addr)44*4882a593Smuzhiyun static void mpu401_write_port(struct snd_mpu401 *mpu, unsigned char data,
45*4882a593Smuzhiyun 			      unsigned long addr)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun 	outb(data, addr);
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun 
mpu401_read_port(struct snd_mpu401 * mpu,unsigned long addr)50*4882a593Smuzhiyun static unsigned char mpu401_read_port(struct snd_mpu401 *mpu,
51*4882a593Smuzhiyun 				      unsigned long addr)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun 	return inb(addr);
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun 
mpu401_write_mmio(struct snd_mpu401 * mpu,unsigned char data,unsigned long addr)56*4882a593Smuzhiyun static void mpu401_write_mmio(struct snd_mpu401 *mpu, unsigned char data,
57*4882a593Smuzhiyun 			      unsigned long addr)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun 	writeb(data, (void __iomem *)addr);
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun 
mpu401_read_mmio(struct snd_mpu401 * mpu,unsigned long addr)62*4882a593Smuzhiyun static unsigned char mpu401_read_mmio(struct snd_mpu401 *mpu,
63*4882a593Smuzhiyun 				      unsigned long addr)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun 	return readb((void __iomem *)addr);
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun /*  */
68*4882a593Smuzhiyun 
snd_mpu401_uart_clear_rx(struct snd_mpu401 * mpu)69*4882a593Smuzhiyun static void snd_mpu401_uart_clear_rx(struct snd_mpu401 *mpu)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun 	int timeout = 100000;
72*4882a593Smuzhiyun 	for (; timeout > 0 && snd_mpu401_input_avail(mpu); timeout--)
73*4882a593Smuzhiyun 		mpu->read(mpu, MPU401D(mpu));
74*4882a593Smuzhiyun #ifdef CONFIG_SND_DEBUG
75*4882a593Smuzhiyun 	if (timeout <= 0)
76*4882a593Smuzhiyun 		snd_printk(KERN_ERR "cmd: clear rx timeout (status = 0x%x)\n",
77*4882a593Smuzhiyun 			   mpu->read(mpu, MPU401C(mpu)));
78*4882a593Smuzhiyun #endif
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun 
uart_interrupt_tx(struct snd_mpu401 * mpu)81*4882a593Smuzhiyun static void uart_interrupt_tx(struct snd_mpu401 *mpu)
82*4882a593Smuzhiyun {
83*4882a593Smuzhiyun 	unsigned long flags;
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	if (test_bit(MPU401_MODE_BIT_OUTPUT, &mpu->mode) &&
86*4882a593Smuzhiyun 	    test_bit(MPU401_MODE_BIT_OUTPUT_TRIGGER, &mpu->mode)) {
87*4882a593Smuzhiyun 		spin_lock_irqsave(&mpu->output_lock, flags);
88*4882a593Smuzhiyun 		snd_mpu401_uart_output_write(mpu);
89*4882a593Smuzhiyun 		spin_unlock_irqrestore(&mpu->output_lock, flags);
90*4882a593Smuzhiyun 	}
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun 
_snd_mpu401_uart_interrupt(struct snd_mpu401 * mpu)93*4882a593Smuzhiyun static void _snd_mpu401_uart_interrupt(struct snd_mpu401 *mpu)
94*4882a593Smuzhiyun {
95*4882a593Smuzhiyun 	unsigned long flags;
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	if (mpu->info_flags & MPU401_INFO_INPUT) {
98*4882a593Smuzhiyun 		spin_lock_irqsave(&mpu->input_lock, flags);
99*4882a593Smuzhiyun 		if (test_bit(MPU401_MODE_BIT_INPUT, &mpu->mode))
100*4882a593Smuzhiyun 			snd_mpu401_uart_input_read(mpu);
101*4882a593Smuzhiyun 		else
102*4882a593Smuzhiyun 			snd_mpu401_uart_clear_rx(mpu);
103*4882a593Smuzhiyun 		spin_unlock_irqrestore(&mpu->input_lock, flags);
104*4882a593Smuzhiyun 	}
105*4882a593Smuzhiyun 	if (! (mpu->info_flags & MPU401_INFO_TX_IRQ))
106*4882a593Smuzhiyun 		/* ok. for better Tx performance try do some output
107*4882a593Smuzhiyun 		   when input is done */
108*4882a593Smuzhiyun 		uart_interrupt_tx(mpu);
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun /**
112*4882a593Smuzhiyun  * snd_mpu401_uart_interrupt - generic MPU401-UART interrupt handler
113*4882a593Smuzhiyun  * @irq: the irq number
114*4882a593Smuzhiyun  * @dev_id: mpu401 instance
115*4882a593Smuzhiyun  *
116*4882a593Smuzhiyun  * Processes the interrupt for MPU401-UART i/o.
117*4882a593Smuzhiyun  *
118*4882a593Smuzhiyun  * Return: %IRQ_HANDLED if the interrupt was handled. %IRQ_NONE otherwise.
119*4882a593Smuzhiyun  */
snd_mpu401_uart_interrupt(int irq,void * dev_id)120*4882a593Smuzhiyun irqreturn_t snd_mpu401_uart_interrupt(int irq, void *dev_id)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun 	struct snd_mpu401 *mpu = dev_id;
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	if (!mpu)
125*4882a593Smuzhiyun 		return IRQ_NONE;
126*4882a593Smuzhiyun 	_snd_mpu401_uart_interrupt(mpu);
127*4882a593Smuzhiyun 	return IRQ_HANDLED;
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun EXPORT_SYMBOL(snd_mpu401_uart_interrupt);
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun /**
133*4882a593Smuzhiyun  * snd_mpu401_uart_interrupt_tx - generic MPU401-UART transmit irq handler
134*4882a593Smuzhiyun  * @irq: the irq number
135*4882a593Smuzhiyun  * @dev_id: mpu401 instance
136*4882a593Smuzhiyun  *
137*4882a593Smuzhiyun  * Processes the interrupt for MPU401-UART output.
138*4882a593Smuzhiyun  *
139*4882a593Smuzhiyun  * Return: %IRQ_HANDLED if the interrupt was handled. %IRQ_NONE otherwise.
140*4882a593Smuzhiyun  */
snd_mpu401_uart_interrupt_tx(int irq,void * dev_id)141*4882a593Smuzhiyun irqreturn_t snd_mpu401_uart_interrupt_tx(int irq, void *dev_id)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun 	struct snd_mpu401 *mpu = dev_id;
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 	if (!mpu)
146*4882a593Smuzhiyun 		return IRQ_NONE;
147*4882a593Smuzhiyun 	uart_interrupt_tx(mpu);
148*4882a593Smuzhiyun 	return IRQ_HANDLED;
149*4882a593Smuzhiyun }
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun EXPORT_SYMBOL(snd_mpu401_uart_interrupt_tx);
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun /*
154*4882a593Smuzhiyun  * timer callback
155*4882a593Smuzhiyun  * reprogram the timer and call the interrupt job
156*4882a593Smuzhiyun  */
snd_mpu401_uart_timer(struct timer_list * t)157*4882a593Smuzhiyun static void snd_mpu401_uart_timer(struct timer_list *t)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun 	struct snd_mpu401 *mpu = from_timer(mpu, t, timer);
160*4882a593Smuzhiyun 	unsigned long flags;
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	spin_lock_irqsave(&mpu->timer_lock, flags);
163*4882a593Smuzhiyun 	/*mpu->mode |= MPU401_MODE_TIMER;*/
164*4882a593Smuzhiyun 	mod_timer(&mpu->timer,  1 + jiffies);
165*4882a593Smuzhiyun 	spin_unlock_irqrestore(&mpu->timer_lock, flags);
166*4882a593Smuzhiyun 	if (mpu->rmidi)
167*4882a593Smuzhiyun 		_snd_mpu401_uart_interrupt(mpu);
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun /*
171*4882a593Smuzhiyun  * initialize the timer callback if not programmed yet
172*4882a593Smuzhiyun  */
snd_mpu401_uart_add_timer(struct snd_mpu401 * mpu,int input)173*4882a593Smuzhiyun static void snd_mpu401_uart_add_timer (struct snd_mpu401 *mpu, int input)
174*4882a593Smuzhiyun {
175*4882a593Smuzhiyun 	unsigned long flags;
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	spin_lock_irqsave (&mpu->timer_lock, flags);
178*4882a593Smuzhiyun 	if (mpu->timer_invoked == 0) {
179*4882a593Smuzhiyun 		timer_setup(&mpu->timer, snd_mpu401_uart_timer, 0);
180*4882a593Smuzhiyun 		mod_timer(&mpu->timer, 1 + jiffies);
181*4882a593Smuzhiyun 	}
182*4882a593Smuzhiyun 	mpu->timer_invoked |= input ? MPU401_MODE_INPUT_TIMER :
183*4882a593Smuzhiyun 		MPU401_MODE_OUTPUT_TIMER;
184*4882a593Smuzhiyun 	spin_unlock_irqrestore (&mpu->timer_lock, flags);
185*4882a593Smuzhiyun }
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun /*
188*4882a593Smuzhiyun  * remove the timer callback if still active
189*4882a593Smuzhiyun  */
snd_mpu401_uart_remove_timer(struct snd_mpu401 * mpu,int input)190*4882a593Smuzhiyun static void snd_mpu401_uart_remove_timer (struct snd_mpu401 *mpu, int input)
191*4882a593Smuzhiyun {
192*4882a593Smuzhiyun 	unsigned long flags;
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun 	spin_lock_irqsave (&mpu->timer_lock, flags);
195*4882a593Smuzhiyun 	if (mpu->timer_invoked) {
196*4882a593Smuzhiyun 		mpu->timer_invoked &= input ? ~MPU401_MODE_INPUT_TIMER :
197*4882a593Smuzhiyun 			~MPU401_MODE_OUTPUT_TIMER;
198*4882a593Smuzhiyun 		if (! mpu->timer_invoked)
199*4882a593Smuzhiyun 			del_timer(&mpu->timer);
200*4882a593Smuzhiyun 	}
201*4882a593Smuzhiyun 	spin_unlock_irqrestore (&mpu->timer_lock, flags);
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun /*
205*4882a593Smuzhiyun  * send a UART command
206*4882a593Smuzhiyun  * return zero if successful, non-zero for some errors
207*4882a593Smuzhiyun  */
208*4882a593Smuzhiyun 
snd_mpu401_uart_cmd(struct snd_mpu401 * mpu,unsigned char cmd,int ack)209*4882a593Smuzhiyun static int snd_mpu401_uart_cmd(struct snd_mpu401 * mpu, unsigned char cmd,
210*4882a593Smuzhiyun 			       int ack)
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun 	unsigned long flags;
213*4882a593Smuzhiyun 	int timeout, ok;
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	spin_lock_irqsave(&mpu->input_lock, flags);
216*4882a593Smuzhiyun 	if (mpu->hardware != MPU401_HW_TRID4DWAVE) {
217*4882a593Smuzhiyun 		mpu->write(mpu, 0x00, MPU401D(mpu));
218*4882a593Smuzhiyun 		/*snd_mpu401_uart_clear_rx(mpu);*/
219*4882a593Smuzhiyun 	}
220*4882a593Smuzhiyun 	/* ok. standard MPU-401 initialization */
221*4882a593Smuzhiyun 	if (mpu->hardware != MPU401_HW_SB) {
222*4882a593Smuzhiyun 		for (timeout = 1000; timeout > 0 &&
223*4882a593Smuzhiyun 			     !snd_mpu401_output_ready(mpu); timeout--)
224*4882a593Smuzhiyun 			udelay(10);
225*4882a593Smuzhiyun #ifdef CONFIG_SND_DEBUG
226*4882a593Smuzhiyun 		if (!timeout)
227*4882a593Smuzhiyun 			snd_printk(KERN_ERR "cmd: tx timeout (status = 0x%x)\n",
228*4882a593Smuzhiyun 				   mpu->read(mpu, MPU401C(mpu)));
229*4882a593Smuzhiyun #endif
230*4882a593Smuzhiyun 	}
231*4882a593Smuzhiyun 	mpu->write(mpu, cmd, MPU401C(mpu));
232*4882a593Smuzhiyun 	if (ack && !(mpu->info_flags & MPU401_INFO_NO_ACK)) {
233*4882a593Smuzhiyun 		ok = 0;
234*4882a593Smuzhiyun 		timeout = 10000;
235*4882a593Smuzhiyun 		while (!ok && timeout-- > 0) {
236*4882a593Smuzhiyun 			if (snd_mpu401_input_avail(mpu)) {
237*4882a593Smuzhiyun 				if (mpu->read(mpu, MPU401D(mpu)) == MPU401_ACK)
238*4882a593Smuzhiyun 					ok = 1;
239*4882a593Smuzhiyun 			}
240*4882a593Smuzhiyun 		}
241*4882a593Smuzhiyun 		if (!ok && mpu->read(mpu, MPU401D(mpu)) == MPU401_ACK)
242*4882a593Smuzhiyun 			ok = 1;
243*4882a593Smuzhiyun 	} else
244*4882a593Smuzhiyun 		ok = 1;
245*4882a593Smuzhiyun 	spin_unlock_irqrestore(&mpu->input_lock, flags);
246*4882a593Smuzhiyun 	if (!ok) {
247*4882a593Smuzhiyun 		snd_printk(KERN_ERR "cmd: 0x%x failed at 0x%lx "
248*4882a593Smuzhiyun 			   "(status = 0x%x, data = 0x%x)\n", cmd, mpu->port,
249*4882a593Smuzhiyun 			   mpu->read(mpu, MPU401C(mpu)),
250*4882a593Smuzhiyun 			   mpu->read(mpu, MPU401D(mpu)));
251*4882a593Smuzhiyun 		return 1;
252*4882a593Smuzhiyun 	}
253*4882a593Smuzhiyun 	return 0;
254*4882a593Smuzhiyun }
255*4882a593Smuzhiyun 
snd_mpu401_do_reset(struct snd_mpu401 * mpu)256*4882a593Smuzhiyun static int snd_mpu401_do_reset(struct snd_mpu401 *mpu)
257*4882a593Smuzhiyun {
258*4882a593Smuzhiyun 	if (snd_mpu401_uart_cmd(mpu, MPU401_RESET, 1))
259*4882a593Smuzhiyun 		return -EIO;
260*4882a593Smuzhiyun 	if (snd_mpu401_uart_cmd(mpu, MPU401_ENTER_UART, 0))
261*4882a593Smuzhiyun 		return -EIO;
262*4882a593Smuzhiyun 	return 0;
263*4882a593Smuzhiyun }
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun /*
266*4882a593Smuzhiyun  * input/output open/close - protected by open_mutex in rawmidi.c
267*4882a593Smuzhiyun  */
snd_mpu401_uart_input_open(struct snd_rawmidi_substream * substream)268*4882a593Smuzhiyun static int snd_mpu401_uart_input_open(struct snd_rawmidi_substream *substream)
269*4882a593Smuzhiyun {
270*4882a593Smuzhiyun 	struct snd_mpu401 *mpu;
271*4882a593Smuzhiyun 	int err;
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun 	mpu = substream->rmidi->private_data;
274*4882a593Smuzhiyun 	if (mpu->open_input && (err = mpu->open_input(mpu)) < 0)
275*4882a593Smuzhiyun 		return err;
276*4882a593Smuzhiyun 	if (! test_bit(MPU401_MODE_BIT_OUTPUT, &mpu->mode)) {
277*4882a593Smuzhiyun 		if (snd_mpu401_do_reset(mpu) < 0)
278*4882a593Smuzhiyun 			goto error_out;
279*4882a593Smuzhiyun 	}
280*4882a593Smuzhiyun 	mpu->substream_input = substream;
281*4882a593Smuzhiyun 	set_bit(MPU401_MODE_BIT_INPUT, &mpu->mode);
282*4882a593Smuzhiyun 	return 0;
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun error_out:
285*4882a593Smuzhiyun 	if (mpu->open_input && mpu->close_input)
286*4882a593Smuzhiyun 		mpu->close_input(mpu);
287*4882a593Smuzhiyun 	return -EIO;
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun 
snd_mpu401_uart_output_open(struct snd_rawmidi_substream * substream)290*4882a593Smuzhiyun static int snd_mpu401_uart_output_open(struct snd_rawmidi_substream *substream)
291*4882a593Smuzhiyun {
292*4882a593Smuzhiyun 	struct snd_mpu401 *mpu;
293*4882a593Smuzhiyun 	int err;
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	mpu = substream->rmidi->private_data;
296*4882a593Smuzhiyun 	if (mpu->open_output && (err = mpu->open_output(mpu)) < 0)
297*4882a593Smuzhiyun 		return err;
298*4882a593Smuzhiyun 	if (! test_bit(MPU401_MODE_BIT_INPUT, &mpu->mode)) {
299*4882a593Smuzhiyun 		if (snd_mpu401_do_reset(mpu) < 0)
300*4882a593Smuzhiyun 			goto error_out;
301*4882a593Smuzhiyun 	}
302*4882a593Smuzhiyun 	mpu->substream_output = substream;
303*4882a593Smuzhiyun 	set_bit(MPU401_MODE_BIT_OUTPUT, &mpu->mode);
304*4882a593Smuzhiyun 	return 0;
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun error_out:
307*4882a593Smuzhiyun 	if (mpu->open_output && mpu->close_output)
308*4882a593Smuzhiyun 		mpu->close_output(mpu);
309*4882a593Smuzhiyun 	return -EIO;
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun 
snd_mpu401_uart_input_close(struct snd_rawmidi_substream * substream)312*4882a593Smuzhiyun static int snd_mpu401_uart_input_close(struct snd_rawmidi_substream *substream)
313*4882a593Smuzhiyun {
314*4882a593Smuzhiyun 	struct snd_mpu401 *mpu;
315*4882a593Smuzhiyun 	int err = 0;
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun 	mpu = substream->rmidi->private_data;
318*4882a593Smuzhiyun 	clear_bit(MPU401_MODE_BIT_INPUT, &mpu->mode);
319*4882a593Smuzhiyun 	mpu->substream_input = NULL;
320*4882a593Smuzhiyun 	if (! test_bit(MPU401_MODE_BIT_OUTPUT, &mpu->mode))
321*4882a593Smuzhiyun 		err = snd_mpu401_uart_cmd(mpu, MPU401_RESET, 0);
322*4882a593Smuzhiyun 	if (mpu->close_input)
323*4882a593Smuzhiyun 		mpu->close_input(mpu);
324*4882a593Smuzhiyun 	if (err)
325*4882a593Smuzhiyun 		return -EIO;
326*4882a593Smuzhiyun 	return 0;
327*4882a593Smuzhiyun }
328*4882a593Smuzhiyun 
snd_mpu401_uart_output_close(struct snd_rawmidi_substream * substream)329*4882a593Smuzhiyun static int snd_mpu401_uart_output_close(struct snd_rawmidi_substream *substream)
330*4882a593Smuzhiyun {
331*4882a593Smuzhiyun 	struct snd_mpu401 *mpu;
332*4882a593Smuzhiyun 	int err = 0;
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun 	mpu = substream->rmidi->private_data;
335*4882a593Smuzhiyun 	clear_bit(MPU401_MODE_BIT_OUTPUT, &mpu->mode);
336*4882a593Smuzhiyun 	mpu->substream_output = NULL;
337*4882a593Smuzhiyun 	if (! test_bit(MPU401_MODE_BIT_INPUT, &mpu->mode))
338*4882a593Smuzhiyun 		err = snd_mpu401_uart_cmd(mpu, MPU401_RESET, 0);
339*4882a593Smuzhiyun 	if (mpu->close_output)
340*4882a593Smuzhiyun 		mpu->close_output(mpu);
341*4882a593Smuzhiyun 	if (err)
342*4882a593Smuzhiyun 		return -EIO;
343*4882a593Smuzhiyun 	return 0;
344*4882a593Smuzhiyun }
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun /*
347*4882a593Smuzhiyun  * trigger input callback
348*4882a593Smuzhiyun  */
349*4882a593Smuzhiyun static void
snd_mpu401_uart_input_trigger(struct snd_rawmidi_substream * substream,int up)350*4882a593Smuzhiyun snd_mpu401_uart_input_trigger(struct snd_rawmidi_substream *substream, int up)
351*4882a593Smuzhiyun {
352*4882a593Smuzhiyun 	unsigned long flags;
353*4882a593Smuzhiyun 	struct snd_mpu401 *mpu;
354*4882a593Smuzhiyun 	int max = 64;
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun 	mpu = substream->rmidi->private_data;
357*4882a593Smuzhiyun 	if (up) {
358*4882a593Smuzhiyun 		if (! test_and_set_bit(MPU401_MODE_BIT_INPUT_TRIGGER,
359*4882a593Smuzhiyun 				       &mpu->mode)) {
360*4882a593Smuzhiyun 			/* first time - flush FIFO */
361*4882a593Smuzhiyun 			while (max-- > 0)
362*4882a593Smuzhiyun 				mpu->read(mpu, MPU401D(mpu));
363*4882a593Smuzhiyun 			if (mpu->info_flags & MPU401_INFO_USE_TIMER)
364*4882a593Smuzhiyun 				snd_mpu401_uart_add_timer(mpu, 1);
365*4882a593Smuzhiyun 		}
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun 		/* read data in advance */
368*4882a593Smuzhiyun 		spin_lock_irqsave(&mpu->input_lock, flags);
369*4882a593Smuzhiyun 		snd_mpu401_uart_input_read(mpu);
370*4882a593Smuzhiyun 		spin_unlock_irqrestore(&mpu->input_lock, flags);
371*4882a593Smuzhiyun 	} else {
372*4882a593Smuzhiyun 		if (mpu->info_flags & MPU401_INFO_USE_TIMER)
373*4882a593Smuzhiyun 			snd_mpu401_uart_remove_timer(mpu, 1);
374*4882a593Smuzhiyun 		clear_bit(MPU401_MODE_BIT_INPUT_TRIGGER, &mpu->mode);
375*4882a593Smuzhiyun 	}
376*4882a593Smuzhiyun 
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun 
379*4882a593Smuzhiyun /*
380*4882a593Smuzhiyun  * transfer input pending data
381*4882a593Smuzhiyun  * call with input_lock spinlock held
382*4882a593Smuzhiyun  */
snd_mpu401_uart_input_read(struct snd_mpu401 * mpu)383*4882a593Smuzhiyun static void snd_mpu401_uart_input_read(struct snd_mpu401 * mpu)
384*4882a593Smuzhiyun {
385*4882a593Smuzhiyun 	int max = 128;
386*4882a593Smuzhiyun 	unsigned char byte;
387*4882a593Smuzhiyun 
388*4882a593Smuzhiyun 	while (max-- > 0) {
389*4882a593Smuzhiyun 		if (! snd_mpu401_input_avail(mpu))
390*4882a593Smuzhiyun 			break; /* input not available */
391*4882a593Smuzhiyun 		byte = mpu->read(mpu, MPU401D(mpu));
392*4882a593Smuzhiyun 		if (test_bit(MPU401_MODE_BIT_INPUT_TRIGGER, &mpu->mode))
393*4882a593Smuzhiyun 			snd_rawmidi_receive(mpu->substream_input, &byte, 1);
394*4882a593Smuzhiyun 	}
395*4882a593Smuzhiyun }
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun /*
398*4882a593Smuzhiyun  *  Tx FIFO sizes:
399*4882a593Smuzhiyun  *    CS4237B			- 16 bytes
400*4882a593Smuzhiyun  *    AudioDrive ES1688         - 12 bytes
401*4882a593Smuzhiyun  *    S3 SonicVibes             -  8 bytes
402*4882a593Smuzhiyun  *    SoundBlaster AWE 64       -  2 bytes (ugly hardware)
403*4882a593Smuzhiyun  */
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun /*
406*4882a593Smuzhiyun  * write output pending bytes
407*4882a593Smuzhiyun  * call with output_lock spinlock held
408*4882a593Smuzhiyun  */
snd_mpu401_uart_output_write(struct snd_mpu401 * mpu)409*4882a593Smuzhiyun static void snd_mpu401_uart_output_write(struct snd_mpu401 * mpu)
410*4882a593Smuzhiyun {
411*4882a593Smuzhiyun 	unsigned char byte;
412*4882a593Smuzhiyun 	int max = 256;
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun 	do {
415*4882a593Smuzhiyun 		if (snd_rawmidi_transmit_peek(mpu->substream_output,
416*4882a593Smuzhiyun 					      &byte, 1) == 1) {
417*4882a593Smuzhiyun 			/*
418*4882a593Smuzhiyun 			 * Try twice because there is hardware that insists on
419*4882a593Smuzhiyun 			 * setting the output busy bit after each write.
420*4882a593Smuzhiyun 			 */
421*4882a593Smuzhiyun 			if (!snd_mpu401_output_ready(mpu) &&
422*4882a593Smuzhiyun 			    !snd_mpu401_output_ready(mpu))
423*4882a593Smuzhiyun 				break;	/* Tx FIFO full - try again later */
424*4882a593Smuzhiyun 			mpu->write(mpu, byte, MPU401D(mpu));
425*4882a593Smuzhiyun 			snd_rawmidi_transmit_ack(mpu->substream_output, 1);
426*4882a593Smuzhiyun 		} else {
427*4882a593Smuzhiyun 			snd_mpu401_uart_remove_timer (mpu, 0);
428*4882a593Smuzhiyun 			break;	/* no other data - leave the tx loop */
429*4882a593Smuzhiyun 		}
430*4882a593Smuzhiyun 	} while (--max > 0);
431*4882a593Smuzhiyun }
432*4882a593Smuzhiyun 
433*4882a593Smuzhiyun /*
434*4882a593Smuzhiyun  * output trigger callback
435*4882a593Smuzhiyun  */
436*4882a593Smuzhiyun static void
snd_mpu401_uart_output_trigger(struct snd_rawmidi_substream * substream,int up)437*4882a593Smuzhiyun snd_mpu401_uart_output_trigger(struct snd_rawmidi_substream *substream, int up)
438*4882a593Smuzhiyun {
439*4882a593Smuzhiyun 	unsigned long flags;
440*4882a593Smuzhiyun 	struct snd_mpu401 *mpu;
441*4882a593Smuzhiyun 
442*4882a593Smuzhiyun 	mpu = substream->rmidi->private_data;
443*4882a593Smuzhiyun 	if (up) {
444*4882a593Smuzhiyun 		set_bit(MPU401_MODE_BIT_OUTPUT_TRIGGER, &mpu->mode);
445*4882a593Smuzhiyun 
446*4882a593Smuzhiyun 		/* try to add the timer at each output trigger,
447*4882a593Smuzhiyun 		 * since the output timer might have been removed in
448*4882a593Smuzhiyun 		 * snd_mpu401_uart_output_write().
449*4882a593Smuzhiyun 		 */
450*4882a593Smuzhiyun 		if (! (mpu->info_flags & MPU401_INFO_TX_IRQ))
451*4882a593Smuzhiyun 			snd_mpu401_uart_add_timer(mpu, 0);
452*4882a593Smuzhiyun 
453*4882a593Smuzhiyun 		/* output pending data */
454*4882a593Smuzhiyun 		spin_lock_irqsave(&mpu->output_lock, flags);
455*4882a593Smuzhiyun 		snd_mpu401_uart_output_write(mpu);
456*4882a593Smuzhiyun 		spin_unlock_irqrestore(&mpu->output_lock, flags);
457*4882a593Smuzhiyun 	} else {
458*4882a593Smuzhiyun 		if (! (mpu->info_flags & MPU401_INFO_TX_IRQ))
459*4882a593Smuzhiyun 			snd_mpu401_uart_remove_timer(mpu, 0);
460*4882a593Smuzhiyun 		clear_bit(MPU401_MODE_BIT_OUTPUT_TRIGGER, &mpu->mode);
461*4882a593Smuzhiyun 	}
462*4882a593Smuzhiyun }
463*4882a593Smuzhiyun 
464*4882a593Smuzhiyun /*
465*4882a593Smuzhiyun 
466*4882a593Smuzhiyun  */
467*4882a593Smuzhiyun 
468*4882a593Smuzhiyun static const struct snd_rawmidi_ops snd_mpu401_uart_output =
469*4882a593Smuzhiyun {
470*4882a593Smuzhiyun 	.open =		snd_mpu401_uart_output_open,
471*4882a593Smuzhiyun 	.close =	snd_mpu401_uart_output_close,
472*4882a593Smuzhiyun 	.trigger =	snd_mpu401_uart_output_trigger,
473*4882a593Smuzhiyun };
474*4882a593Smuzhiyun 
475*4882a593Smuzhiyun static const struct snd_rawmidi_ops snd_mpu401_uart_input =
476*4882a593Smuzhiyun {
477*4882a593Smuzhiyun 	.open =		snd_mpu401_uart_input_open,
478*4882a593Smuzhiyun 	.close =	snd_mpu401_uart_input_close,
479*4882a593Smuzhiyun 	.trigger =	snd_mpu401_uart_input_trigger,
480*4882a593Smuzhiyun };
481*4882a593Smuzhiyun 
snd_mpu401_uart_free(struct snd_rawmidi * rmidi)482*4882a593Smuzhiyun static void snd_mpu401_uart_free(struct snd_rawmidi *rmidi)
483*4882a593Smuzhiyun {
484*4882a593Smuzhiyun 	struct snd_mpu401 *mpu = rmidi->private_data;
485*4882a593Smuzhiyun 	if (mpu->irq >= 0)
486*4882a593Smuzhiyun 		free_irq(mpu->irq, (void *) mpu);
487*4882a593Smuzhiyun 	release_and_free_resource(mpu->res);
488*4882a593Smuzhiyun 	kfree(mpu);
489*4882a593Smuzhiyun }
490*4882a593Smuzhiyun 
491*4882a593Smuzhiyun /**
492*4882a593Smuzhiyun  * snd_mpu401_uart_new - create an MPU401-UART instance
493*4882a593Smuzhiyun  * @card: the card instance
494*4882a593Smuzhiyun  * @device: the device index, zero-based
495*4882a593Smuzhiyun  * @hardware: the hardware type, MPU401_HW_XXXX
496*4882a593Smuzhiyun  * @port: the base address of MPU401 port
497*4882a593Smuzhiyun  * @info_flags: bitflags MPU401_INFO_XXX
498*4882a593Smuzhiyun  * @irq: the ISA irq number, -1 if not to be allocated
499*4882a593Smuzhiyun  * @rrawmidi: the pointer to store the new rawmidi instance
500*4882a593Smuzhiyun  *
501*4882a593Smuzhiyun  * Creates a new MPU-401 instance.
502*4882a593Smuzhiyun  *
503*4882a593Smuzhiyun  * Note that the rawmidi instance is returned on the rrawmidi argument,
504*4882a593Smuzhiyun  * not the mpu401 instance itself.  To access to the mpu401 instance,
505*4882a593Smuzhiyun  * cast from rawmidi->private_data (with struct snd_mpu401 magic-cast).
506*4882a593Smuzhiyun  *
507*4882a593Smuzhiyun  * Return: Zero if successful, or a negative error code.
508*4882a593Smuzhiyun  */
snd_mpu401_uart_new(struct snd_card * card,int device,unsigned short hardware,unsigned long port,unsigned int info_flags,int irq,struct snd_rawmidi ** rrawmidi)509*4882a593Smuzhiyun int snd_mpu401_uart_new(struct snd_card *card, int device,
510*4882a593Smuzhiyun 			unsigned short hardware,
511*4882a593Smuzhiyun 			unsigned long port,
512*4882a593Smuzhiyun 			unsigned int info_flags,
513*4882a593Smuzhiyun 			int irq,
514*4882a593Smuzhiyun 			struct snd_rawmidi ** rrawmidi)
515*4882a593Smuzhiyun {
516*4882a593Smuzhiyun 	struct snd_mpu401 *mpu;
517*4882a593Smuzhiyun 	struct snd_rawmidi *rmidi;
518*4882a593Smuzhiyun 	int in_enable, out_enable;
519*4882a593Smuzhiyun 	int err;
520*4882a593Smuzhiyun 
521*4882a593Smuzhiyun 	if (rrawmidi)
522*4882a593Smuzhiyun 		*rrawmidi = NULL;
523*4882a593Smuzhiyun 	if (! (info_flags & (MPU401_INFO_INPUT | MPU401_INFO_OUTPUT)))
524*4882a593Smuzhiyun 		info_flags |= MPU401_INFO_INPUT | MPU401_INFO_OUTPUT;
525*4882a593Smuzhiyun 	in_enable = (info_flags & MPU401_INFO_INPUT) ? 1 : 0;
526*4882a593Smuzhiyun 	out_enable = (info_flags & MPU401_INFO_OUTPUT) ? 1 : 0;
527*4882a593Smuzhiyun 	if ((err = snd_rawmidi_new(card, "MPU-401U", device,
528*4882a593Smuzhiyun 				   out_enable, in_enable, &rmidi)) < 0)
529*4882a593Smuzhiyun 		return err;
530*4882a593Smuzhiyun 	mpu = kzalloc(sizeof(*mpu), GFP_KERNEL);
531*4882a593Smuzhiyun 	if (!mpu) {
532*4882a593Smuzhiyun 		err = -ENOMEM;
533*4882a593Smuzhiyun 		goto free_device;
534*4882a593Smuzhiyun 	}
535*4882a593Smuzhiyun 	rmidi->private_data = mpu;
536*4882a593Smuzhiyun 	rmidi->private_free = snd_mpu401_uart_free;
537*4882a593Smuzhiyun 	spin_lock_init(&mpu->input_lock);
538*4882a593Smuzhiyun 	spin_lock_init(&mpu->output_lock);
539*4882a593Smuzhiyun 	spin_lock_init(&mpu->timer_lock);
540*4882a593Smuzhiyun 	mpu->hardware = hardware;
541*4882a593Smuzhiyun 	mpu->irq = -1;
542*4882a593Smuzhiyun 	if (! (info_flags & MPU401_INFO_INTEGRATED)) {
543*4882a593Smuzhiyun 		int res_size = hardware == MPU401_HW_PC98II ? 4 : 2;
544*4882a593Smuzhiyun 		mpu->res = request_region(port, res_size, "MPU401 UART");
545*4882a593Smuzhiyun 		if (!mpu->res) {
546*4882a593Smuzhiyun 			snd_printk(KERN_ERR "mpu401_uart: "
547*4882a593Smuzhiyun 				   "unable to grab port 0x%lx size %d\n",
548*4882a593Smuzhiyun 				   port, res_size);
549*4882a593Smuzhiyun 			err = -EBUSY;
550*4882a593Smuzhiyun 			goto free_device;
551*4882a593Smuzhiyun 		}
552*4882a593Smuzhiyun 	}
553*4882a593Smuzhiyun 	if (info_flags & MPU401_INFO_MMIO) {
554*4882a593Smuzhiyun 		mpu->write = mpu401_write_mmio;
555*4882a593Smuzhiyun 		mpu->read = mpu401_read_mmio;
556*4882a593Smuzhiyun 	} else {
557*4882a593Smuzhiyun 		mpu->write = mpu401_write_port;
558*4882a593Smuzhiyun 		mpu->read = mpu401_read_port;
559*4882a593Smuzhiyun 	}
560*4882a593Smuzhiyun 	mpu->port = port;
561*4882a593Smuzhiyun 	if (hardware == MPU401_HW_PC98II)
562*4882a593Smuzhiyun 		mpu->cport = port + 2;
563*4882a593Smuzhiyun 	else
564*4882a593Smuzhiyun 		mpu->cport = port + 1;
565*4882a593Smuzhiyun 	if (irq >= 0) {
566*4882a593Smuzhiyun 		if (request_irq(irq, snd_mpu401_uart_interrupt, 0,
567*4882a593Smuzhiyun 				"MPU401 UART", (void *) mpu)) {
568*4882a593Smuzhiyun 			snd_printk(KERN_ERR "mpu401_uart: "
569*4882a593Smuzhiyun 				   "unable to grab IRQ %d\n", irq);
570*4882a593Smuzhiyun 			err = -EBUSY;
571*4882a593Smuzhiyun 			goto free_device;
572*4882a593Smuzhiyun 		}
573*4882a593Smuzhiyun 	}
574*4882a593Smuzhiyun 	if (irq < 0 && !(info_flags & MPU401_INFO_IRQ_HOOK))
575*4882a593Smuzhiyun 		info_flags |= MPU401_INFO_USE_TIMER;
576*4882a593Smuzhiyun 	mpu->info_flags = info_flags;
577*4882a593Smuzhiyun 	mpu->irq = irq;
578*4882a593Smuzhiyun 	if (card->shortname[0])
579*4882a593Smuzhiyun 		snprintf(rmidi->name, sizeof(rmidi->name), "%s MIDI",
580*4882a593Smuzhiyun 			 card->shortname);
581*4882a593Smuzhiyun 	else
582*4882a593Smuzhiyun 		sprintf(rmidi->name, "MPU-401 MIDI %d-%d",card->number, device);
583*4882a593Smuzhiyun 	if (out_enable) {
584*4882a593Smuzhiyun 		snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT,
585*4882a593Smuzhiyun 				    &snd_mpu401_uart_output);
586*4882a593Smuzhiyun 		rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT;
587*4882a593Smuzhiyun 	}
588*4882a593Smuzhiyun 	if (in_enable) {
589*4882a593Smuzhiyun 		snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT,
590*4882a593Smuzhiyun 				    &snd_mpu401_uart_input);
591*4882a593Smuzhiyun 		rmidi->info_flags |= SNDRV_RAWMIDI_INFO_INPUT;
592*4882a593Smuzhiyun 		if (out_enable)
593*4882a593Smuzhiyun 			rmidi->info_flags |= SNDRV_RAWMIDI_INFO_DUPLEX;
594*4882a593Smuzhiyun 	}
595*4882a593Smuzhiyun 	mpu->rmidi = rmidi;
596*4882a593Smuzhiyun 	if (rrawmidi)
597*4882a593Smuzhiyun 		*rrawmidi = rmidi;
598*4882a593Smuzhiyun 	return 0;
599*4882a593Smuzhiyun free_device:
600*4882a593Smuzhiyun 	snd_device_free(card, rmidi);
601*4882a593Smuzhiyun 	return err;
602*4882a593Smuzhiyun }
603*4882a593Smuzhiyun 
604*4882a593Smuzhiyun EXPORT_SYMBOL(snd_mpu401_uart_new);
605