xref: /OK3568_Linux_fs/kernel/sound/aoa/codecs/onyx.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Apple Onboard Audio driver for Onyx codec
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright 2006 Johannes Berg <johannes@sipsolutions.net>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * This is a driver for the pcm3052 codec chip (codenamed Onyx)
8*4882a593Smuzhiyun  * that is present in newer Apple hardware (with digital output).
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  * The Onyx codec has the following connections (listed by the bit
11*4882a593Smuzhiyun  * to be used in aoa_codec.connected):
12*4882a593Smuzhiyun  *  0: analog output
13*4882a593Smuzhiyun  *  1: digital output
14*4882a593Smuzhiyun  *  2: line input
15*4882a593Smuzhiyun  *  3: microphone input
16*4882a593Smuzhiyun  * Note that even though I know of no machine that has for example
17*4882a593Smuzhiyun  * the digital output connected but not the analog, I have handled
18*4882a593Smuzhiyun  * all the different cases in the code so that this driver may serve
19*4882a593Smuzhiyun  * as a good example of what to do.
20*4882a593Smuzhiyun  *
21*4882a593Smuzhiyun  * NOTE: This driver assumes that there's at most one chip to be
22*4882a593Smuzhiyun  * 	 used with one alsa card, in form of creating all kinds
23*4882a593Smuzhiyun  *	 of mixer elements without regard for their existence.
24*4882a593Smuzhiyun  *	 But snd-aoa assumes that there's at most one card, so
25*4882a593Smuzhiyun  *	 this means you can only have one onyx on a system. This
26*4882a593Smuzhiyun  *	 should probably be fixed by changing the assumption of
27*4882a593Smuzhiyun  *	 having just a single card on a system, and making the
28*4882a593Smuzhiyun  *	 'card' pointer accessible to anyone who needs it instead
29*4882a593Smuzhiyun  *	 of hiding it in the aoa_snd_* functions...
30*4882a593Smuzhiyun  */
31*4882a593Smuzhiyun #include <linux/delay.h>
32*4882a593Smuzhiyun #include <linux/module.h>
33*4882a593Smuzhiyun #include <linux/slab.h>
34*4882a593Smuzhiyun MODULE_AUTHOR("Johannes Berg <johannes@sipsolutions.net>");
35*4882a593Smuzhiyun MODULE_LICENSE("GPL");
36*4882a593Smuzhiyun MODULE_DESCRIPTION("pcm3052 (onyx) codec driver for snd-aoa");
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun #include "onyx.h"
39*4882a593Smuzhiyun #include "../aoa.h"
40*4882a593Smuzhiyun #include "../soundbus/soundbus.h"
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun #define PFX "snd-aoa-codec-onyx: "
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun struct onyx {
46*4882a593Smuzhiyun 	/* cache registers 65 to 80, they are write-only! */
47*4882a593Smuzhiyun 	u8			cache[16];
48*4882a593Smuzhiyun 	struct i2c_client	*i2c;
49*4882a593Smuzhiyun 	struct aoa_codec	codec;
50*4882a593Smuzhiyun 	u32			initialised:1,
51*4882a593Smuzhiyun 				spdif_locked:1,
52*4882a593Smuzhiyun 				analog_locked:1,
53*4882a593Smuzhiyun 				original_mute:2;
54*4882a593Smuzhiyun 	int			open_count;
55*4882a593Smuzhiyun 	struct codec_info	*codec_info;
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	/* mutex serializes concurrent access to the device
58*4882a593Smuzhiyun 	 * and this structure.
59*4882a593Smuzhiyun 	 */
60*4882a593Smuzhiyun 	struct mutex mutex;
61*4882a593Smuzhiyun };
62*4882a593Smuzhiyun #define codec_to_onyx(c) container_of(c, struct onyx, codec)
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun /* both return 0 if all ok, else on error */
onyx_read_register(struct onyx * onyx,u8 reg,u8 * value)65*4882a593Smuzhiyun static int onyx_read_register(struct onyx *onyx, u8 reg, u8 *value)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun 	s32 v;
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 	if (reg != ONYX_REG_CONTROL) {
70*4882a593Smuzhiyun 		*value = onyx->cache[reg-FIRSTREGISTER];
71*4882a593Smuzhiyun 		return 0;
72*4882a593Smuzhiyun 	}
73*4882a593Smuzhiyun 	v = i2c_smbus_read_byte_data(onyx->i2c, reg);
74*4882a593Smuzhiyun 	if (v < 0) {
75*4882a593Smuzhiyun 		*value = 0;
76*4882a593Smuzhiyun 		return -1;
77*4882a593Smuzhiyun 	}
78*4882a593Smuzhiyun 	*value = (u8)v;
79*4882a593Smuzhiyun 	onyx->cache[ONYX_REG_CONTROL-FIRSTREGISTER] = *value;
80*4882a593Smuzhiyun 	return 0;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun 
onyx_write_register(struct onyx * onyx,u8 reg,u8 value)83*4882a593Smuzhiyun static int onyx_write_register(struct onyx *onyx, u8 reg, u8 value)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun 	int result;
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	result = i2c_smbus_write_byte_data(onyx->i2c, reg, value);
88*4882a593Smuzhiyun 	if (!result)
89*4882a593Smuzhiyun 		onyx->cache[reg-FIRSTREGISTER] = value;
90*4882a593Smuzhiyun 	return result;
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun /* alsa stuff */
94*4882a593Smuzhiyun 
onyx_dev_register(struct snd_device * dev)95*4882a593Smuzhiyun static int onyx_dev_register(struct snd_device *dev)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun 	return 0;
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun static const struct snd_device_ops ops = {
101*4882a593Smuzhiyun 	.dev_register = onyx_dev_register,
102*4882a593Smuzhiyun };
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun /* this is necessary because most alsa mixer programs
105*4882a593Smuzhiyun  * can't properly handle the negative range */
106*4882a593Smuzhiyun #define VOLUME_RANGE_SHIFT	128
107*4882a593Smuzhiyun 
onyx_snd_vol_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)108*4882a593Smuzhiyun static int onyx_snd_vol_info(struct snd_kcontrol *kcontrol,
109*4882a593Smuzhiyun 	struct snd_ctl_elem_info *uinfo)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
112*4882a593Smuzhiyun 	uinfo->count = 2;
113*4882a593Smuzhiyun 	uinfo->value.integer.min = -128 + VOLUME_RANGE_SHIFT;
114*4882a593Smuzhiyun 	uinfo->value.integer.max = -1 + VOLUME_RANGE_SHIFT;
115*4882a593Smuzhiyun 	return 0;
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun 
onyx_snd_vol_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)118*4882a593Smuzhiyun static int onyx_snd_vol_get(struct snd_kcontrol *kcontrol,
119*4882a593Smuzhiyun 	struct snd_ctl_elem_value *ucontrol)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun 	struct onyx *onyx = snd_kcontrol_chip(kcontrol);
122*4882a593Smuzhiyun 	s8 l, r;
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	mutex_lock(&onyx->mutex);
125*4882a593Smuzhiyun 	onyx_read_register(onyx, ONYX_REG_DAC_ATTEN_LEFT, &l);
126*4882a593Smuzhiyun 	onyx_read_register(onyx, ONYX_REG_DAC_ATTEN_RIGHT, &r);
127*4882a593Smuzhiyun 	mutex_unlock(&onyx->mutex);
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = l + VOLUME_RANGE_SHIFT;
130*4882a593Smuzhiyun 	ucontrol->value.integer.value[1] = r + VOLUME_RANGE_SHIFT;
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	return 0;
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun 
onyx_snd_vol_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)135*4882a593Smuzhiyun static int onyx_snd_vol_put(struct snd_kcontrol *kcontrol,
136*4882a593Smuzhiyun 	struct snd_ctl_elem_value *ucontrol)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun 	struct onyx *onyx = snd_kcontrol_chip(kcontrol);
139*4882a593Smuzhiyun 	s8 l, r;
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun 	if (ucontrol->value.integer.value[0] < -128 + VOLUME_RANGE_SHIFT ||
142*4882a593Smuzhiyun 	    ucontrol->value.integer.value[0] > -1 + VOLUME_RANGE_SHIFT)
143*4882a593Smuzhiyun 		return -EINVAL;
144*4882a593Smuzhiyun 	if (ucontrol->value.integer.value[1] < -128 + VOLUME_RANGE_SHIFT ||
145*4882a593Smuzhiyun 	    ucontrol->value.integer.value[1] > -1 + VOLUME_RANGE_SHIFT)
146*4882a593Smuzhiyun 		return -EINVAL;
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun 	mutex_lock(&onyx->mutex);
149*4882a593Smuzhiyun 	onyx_read_register(onyx, ONYX_REG_DAC_ATTEN_LEFT, &l);
150*4882a593Smuzhiyun 	onyx_read_register(onyx, ONYX_REG_DAC_ATTEN_RIGHT, &r);
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 	if (l + VOLUME_RANGE_SHIFT == ucontrol->value.integer.value[0] &&
153*4882a593Smuzhiyun 	    r + VOLUME_RANGE_SHIFT == ucontrol->value.integer.value[1]) {
154*4882a593Smuzhiyun 		mutex_unlock(&onyx->mutex);
155*4882a593Smuzhiyun 		return 0;
156*4882a593Smuzhiyun 	}
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun 	onyx_write_register(onyx, ONYX_REG_DAC_ATTEN_LEFT,
159*4882a593Smuzhiyun 			    ucontrol->value.integer.value[0]
160*4882a593Smuzhiyun 			     - VOLUME_RANGE_SHIFT);
161*4882a593Smuzhiyun 	onyx_write_register(onyx, ONYX_REG_DAC_ATTEN_RIGHT,
162*4882a593Smuzhiyun 			    ucontrol->value.integer.value[1]
163*4882a593Smuzhiyun 			     - VOLUME_RANGE_SHIFT);
164*4882a593Smuzhiyun 	mutex_unlock(&onyx->mutex);
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	return 1;
167*4882a593Smuzhiyun }
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun static const struct snd_kcontrol_new volume_control = {
170*4882a593Smuzhiyun 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
171*4882a593Smuzhiyun 	.name = "Master Playback Volume",
172*4882a593Smuzhiyun 	.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
173*4882a593Smuzhiyun 	.info = onyx_snd_vol_info,
174*4882a593Smuzhiyun 	.get = onyx_snd_vol_get,
175*4882a593Smuzhiyun 	.put = onyx_snd_vol_put,
176*4882a593Smuzhiyun };
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun /* like above, this is necessary because a lot
179*4882a593Smuzhiyun  * of alsa mixer programs don't handle ranges
180*4882a593Smuzhiyun  * that don't start at 0 properly.
181*4882a593Smuzhiyun  * even alsamixer is one of them... */
182*4882a593Smuzhiyun #define INPUTGAIN_RANGE_SHIFT	(-3)
183*4882a593Smuzhiyun 
onyx_snd_inputgain_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)184*4882a593Smuzhiyun static int onyx_snd_inputgain_info(struct snd_kcontrol *kcontrol,
185*4882a593Smuzhiyun 	struct snd_ctl_elem_info *uinfo)
186*4882a593Smuzhiyun {
187*4882a593Smuzhiyun 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
188*4882a593Smuzhiyun 	uinfo->count = 1;
189*4882a593Smuzhiyun 	uinfo->value.integer.min = 3 + INPUTGAIN_RANGE_SHIFT;
190*4882a593Smuzhiyun 	uinfo->value.integer.max = 28 + INPUTGAIN_RANGE_SHIFT;
191*4882a593Smuzhiyun 	return 0;
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun 
onyx_snd_inputgain_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)194*4882a593Smuzhiyun static int onyx_snd_inputgain_get(struct snd_kcontrol *kcontrol,
195*4882a593Smuzhiyun 	struct snd_ctl_elem_value *ucontrol)
196*4882a593Smuzhiyun {
197*4882a593Smuzhiyun 	struct onyx *onyx = snd_kcontrol_chip(kcontrol);
198*4882a593Smuzhiyun 	u8 ig;
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	mutex_lock(&onyx->mutex);
201*4882a593Smuzhiyun 	onyx_read_register(onyx, ONYX_REG_ADC_CONTROL, &ig);
202*4882a593Smuzhiyun 	mutex_unlock(&onyx->mutex);
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] =
205*4882a593Smuzhiyun 		(ig & ONYX_ADC_PGA_GAIN_MASK) + INPUTGAIN_RANGE_SHIFT;
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	return 0;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun 
onyx_snd_inputgain_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)210*4882a593Smuzhiyun static int onyx_snd_inputgain_put(struct snd_kcontrol *kcontrol,
211*4882a593Smuzhiyun 	struct snd_ctl_elem_value *ucontrol)
212*4882a593Smuzhiyun {
213*4882a593Smuzhiyun 	struct onyx *onyx = snd_kcontrol_chip(kcontrol);
214*4882a593Smuzhiyun 	u8 v, n;
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun 	if (ucontrol->value.integer.value[0] < 3 + INPUTGAIN_RANGE_SHIFT ||
217*4882a593Smuzhiyun 	    ucontrol->value.integer.value[0] > 28 + INPUTGAIN_RANGE_SHIFT)
218*4882a593Smuzhiyun 		return -EINVAL;
219*4882a593Smuzhiyun 	mutex_lock(&onyx->mutex);
220*4882a593Smuzhiyun 	onyx_read_register(onyx, ONYX_REG_ADC_CONTROL, &v);
221*4882a593Smuzhiyun 	n = v;
222*4882a593Smuzhiyun 	n &= ~ONYX_ADC_PGA_GAIN_MASK;
223*4882a593Smuzhiyun 	n |= (ucontrol->value.integer.value[0] - INPUTGAIN_RANGE_SHIFT)
224*4882a593Smuzhiyun 		& ONYX_ADC_PGA_GAIN_MASK;
225*4882a593Smuzhiyun 	onyx_write_register(onyx, ONYX_REG_ADC_CONTROL, n);
226*4882a593Smuzhiyun 	mutex_unlock(&onyx->mutex);
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 	return n != v;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun static const struct snd_kcontrol_new inputgain_control = {
232*4882a593Smuzhiyun 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
233*4882a593Smuzhiyun 	.name = "Master Capture Volume",
234*4882a593Smuzhiyun 	.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
235*4882a593Smuzhiyun 	.info = onyx_snd_inputgain_info,
236*4882a593Smuzhiyun 	.get = onyx_snd_inputgain_get,
237*4882a593Smuzhiyun 	.put = onyx_snd_inputgain_put,
238*4882a593Smuzhiyun };
239*4882a593Smuzhiyun 
onyx_snd_capture_source_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)240*4882a593Smuzhiyun static int onyx_snd_capture_source_info(struct snd_kcontrol *kcontrol,
241*4882a593Smuzhiyun 	struct snd_ctl_elem_info *uinfo)
242*4882a593Smuzhiyun {
243*4882a593Smuzhiyun 	static const char * const texts[] = { "Line-In", "Microphone" };
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun 	return snd_ctl_enum_info(uinfo, 1, 2, texts);
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun 
onyx_snd_capture_source_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)248*4882a593Smuzhiyun static int onyx_snd_capture_source_get(struct snd_kcontrol *kcontrol,
249*4882a593Smuzhiyun 	struct snd_ctl_elem_value *ucontrol)
250*4882a593Smuzhiyun {
251*4882a593Smuzhiyun 	struct onyx *onyx = snd_kcontrol_chip(kcontrol);
252*4882a593Smuzhiyun 	s8 v;
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	mutex_lock(&onyx->mutex);
255*4882a593Smuzhiyun 	onyx_read_register(onyx, ONYX_REG_ADC_CONTROL, &v);
256*4882a593Smuzhiyun 	mutex_unlock(&onyx->mutex);
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun 	ucontrol->value.enumerated.item[0] = !!(v&ONYX_ADC_INPUT_MIC);
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	return 0;
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun 
onyx_set_capture_source(struct onyx * onyx,int mic)263*4882a593Smuzhiyun static void onyx_set_capture_source(struct onyx *onyx, int mic)
264*4882a593Smuzhiyun {
265*4882a593Smuzhiyun 	s8 v;
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun 	mutex_lock(&onyx->mutex);
268*4882a593Smuzhiyun 	onyx_read_register(onyx, ONYX_REG_ADC_CONTROL, &v);
269*4882a593Smuzhiyun 	v &= ~ONYX_ADC_INPUT_MIC;
270*4882a593Smuzhiyun 	if (mic)
271*4882a593Smuzhiyun 		v |= ONYX_ADC_INPUT_MIC;
272*4882a593Smuzhiyun 	onyx_write_register(onyx, ONYX_REG_ADC_CONTROL, v);
273*4882a593Smuzhiyun 	mutex_unlock(&onyx->mutex);
274*4882a593Smuzhiyun }
275*4882a593Smuzhiyun 
onyx_snd_capture_source_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)276*4882a593Smuzhiyun static int onyx_snd_capture_source_put(struct snd_kcontrol *kcontrol,
277*4882a593Smuzhiyun 	struct snd_ctl_elem_value *ucontrol)
278*4882a593Smuzhiyun {
279*4882a593Smuzhiyun 	if (ucontrol->value.enumerated.item[0] > 1)
280*4882a593Smuzhiyun 		return -EINVAL;
281*4882a593Smuzhiyun 	onyx_set_capture_source(snd_kcontrol_chip(kcontrol),
282*4882a593Smuzhiyun 				ucontrol->value.enumerated.item[0]);
283*4882a593Smuzhiyun 	return 1;
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun static const struct snd_kcontrol_new capture_source_control = {
287*4882a593Smuzhiyun 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
288*4882a593Smuzhiyun 	/* If we name this 'Input Source', it properly shows up in
289*4882a593Smuzhiyun 	 * alsamixer as a selection, * but it's shown under the
290*4882a593Smuzhiyun 	 * 'Playback' category.
291*4882a593Smuzhiyun 	 * If I name it 'Capture Source', it shows up in strange
292*4882a593Smuzhiyun 	 * ways (two bools of which one can be selected at a
293*4882a593Smuzhiyun 	 * time) but at least it's shown in the 'Capture'
294*4882a593Smuzhiyun 	 * category.
295*4882a593Smuzhiyun 	 * I was told that this was due to backward compatibility,
296*4882a593Smuzhiyun 	 * but I don't understand then why the mangling is *not*
297*4882a593Smuzhiyun 	 * done when I name it "Input Source".....
298*4882a593Smuzhiyun 	 */
299*4882a593Smuzhiyun 	.name = "Capture Source",
300*4882a593Smuzhiyun 	.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
301*4882a593Smuzhiyun 	.info = onyx_snd_capture_source_info,
302*4882a593Smuzhiyun 	.get = onyx_snd_capture_source_get,
303*4882a593Smuzhiyun 	.put = onyx_snd_capture_source_put,
304*4882a593Smuzhiyun };
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun #define onyx_snd_mute_info	snd_ctl_boolean_stereo_info
307*4882a593Smuzhiyun 
onyx_snd_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)308*4882a593Smuzhiyun static int onyx_snd_mute_get(struct snd_kcontrol *kcontrol,
309*4882a593Smuzhiyun 	struct snd_ctl_elem_value *ucontrol)
310*4882a593Smuzhiyun {
311*4882a593Smuzhiyun 	struct onyx *onyx = snd_kcontrol_chip(kcontrol);
312*4882a593Smuzhiyun 	u8 c;
313*4882a593Smuzhiyun 
314*4882a593Smuzhiyun 	mutex_lock(&onyx->mutex);
315*4882a593Smuzhiyun 	onyx_read_register(onyx, ONYX_REG_DAC_CONTROL, &c);
316*4882a593Smuzhiyun 	mutex_unlock(&onyx->mutex);
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = !(c & ONYX_MUTE_LEFT);
319*4882a593Smuzhiyun 	ucontrol->value.integer.value[1] = !(c & ONYX_MUTE_RIGHT);
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun 	return 0;
322*4882a593Smuzhiyun }
323*4882a593Smuzhiyun 
onyx_snd_mute_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)324*4882a593Smuzhiyun static int onyx_snd_mute_put(struct snd_kcontrol *kcontrol,
325*4882a593Smuzhiyun 	struct snd_ctl_elem_value *ucontrol)
326*4882a593Smuzhiyun {
327*4882a593Smuzhiyun 	struct onyx *onyx = snd_kcontrol_chip(kcontrol);
328*4882a593Smuzhiyun 	u8 v = 0, c = 0;
329*4882a593Smuzhiyun 	int err = -EBUSY;
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 	mutex_lock(&onyx->mutex);
332*4882a593Smuzhiyun 	if (onyx->analog_locked)
333*4882a593Smuzhiyun 		goto out_unlock;
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 	onyx_read_register(onyx, ONYX_REG_DAC_CONTROL, &v);
336*4882a593Smuzhiyun 	c = v;
337*4882a593Smuzhiyun 	c &= ~(ONYX_MUTE_RIGHT | ONYX_MUTE_LEFT);
338*4882a593Smuzhiyun 	if (!ucontrol->value.integer.value[0])
339*4882a593Smuzhiyun 		c |= ONYX_MUTE_LEFT;
340*4882a593Smuzhiyun 	if (!ucontrol->value.integer.value[1])
341*4882a593Smuzhiyun 		c |= ONYX_MUTE_RIGHT;
342*4882a593Smuzhiyun 	err = onyx_write_register(onyx, ONYX_REG_DAC_CONTROL, c);
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun  out_unlock:
345*4882a593Smuzhiyun 	mutex_unlock(&onyx->mutex);
346*4882a593Smuzhiyun 
347*4882a593Smuzhiyun 	return !err ? (v != c) : err;
348*4882a593Smuzhiyun }
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun static const struct snd_kcontrol_new mute_control = {
351*4882a593Smuzhiyun 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
352*4882a593Smuzhiyun 	.name = "Master Playback Switch",
353*4882a593Smuzhiyun 	.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
354*4882a593Smuzhiyun 	.info = onyx_snd_mute_info,
355*4882a593Smuzhiyun 	.get = onyx_snd_mute_get,
356*4882a593Smuzhiyun 	.put = onyx_snd_mute_put,
357*4882a593Smuzhiyun };
358*4882a593Smuzhiyun 
359*4882a593Smuzhiyun 
360*4882a593Smuzhiyun #define onyx_snd_single_bit_info	snd_ctl_boolean_mono_info
361*4882a593Smuzhiyun 
362*4882a593Smuzhiyun #define FLAG_POLARITY_INVERT	1
363*4882a593Smuzhiyun #define FLAG_SPDIFLOCK		2
364*4882a593Smuzhiyun 
onyx_snd_single_bit_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)365*4882a593Smuzhiyun static int onyx_snd_single_bit_get(struct snd_kcontrol *kcontrol,
366*4882a593Smuzhiyun 	struct snd_ctl_elem_value *ucontrol)
367*4882a593Smuzhiyun {
368*4882a593Smuzhiyun 	struct onyx *onyx = snd_kcontrol_chip(kcontrol);
369*4882a593Smuzhiyun 	u8 c;
370*4882a593Smuzhiyun 	long int pv = kcontrol->private_value;
371*4882a593Smuzhiyun 	u8 polarity = (pv >> 16) & FLAG_POLARITY_INVERT;
372*4882a593Smuzhiyun 	u8 address = (pv >> 8) & 0xff;
373*4882a593Smuzhiyun 	u8 mask = pv & 0xff;
374*4882a593Smuzhiyun 
375*4882a593Smuzhiyun 	mutex_lock(&onyx->mutex);
376*4882a593Smuzhiyun 	onyx_read_register(onyx, address, &c);
377*4882a593Smuzhiyun 	mutex_unlock(&onyx->mutex);
378*4882a593Smuzhiyun 
379*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = !!(c & mask) ^ polarity;
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun 	return 0;
382*4882a593Smuzhiyun }
383*4882a593Smuzhiyun 
onyx_snd_single_bit_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)384*4882a593Smuzhiyun static int onyx_snd_single_bit_put(struct snd_kcontrol *kcontrol,
385*4882a593Smuzhiyun 	struct snd_ctl_elem_value *ucontrol)
386*4882a593Smuzhiyun {
387*4882a593Smuzhiyun 	struct onyx *onyx = snd_kcontrol_chip(kcontrol);
388*4882a593Smuzhiyun 	u8 v = 0, c = 0;
389*4882a593Smuzhiyun 	int err;
390*4882a593Smuzhiyun 	long int pv = kcontrol->private_value;
391*4882a593Smuzhiyun 	u8 polarity = (pv >> 16) & FLAG_POLARITY_INVERT;
392*4882a593Smuzhiyun 	u8 spdiflock = (pv >> 16) & FLAG_SPDIFLOCK;
393*4882a593Smuzhiyun 	u8 address = (pv >> 8) & 0xff;
394*4882a593Smuzhiyun 	u8 mask = pv & 0xff;
395*4882a593Smuzhiyun 
396*4882a593Smuzhiyun 	mutex_lock(&onyx->mutex);
397*4882a593Smuzhiyun 	if (spdiflock && onyx->spdif_locked) {
398*4882a593Smuzhiyun 		/* even if alsamixer doesn't care.. */
399*4882a593Smuzhiyun 		err = -EBUSY;
400*4882a593Smuzhiyun 		goto out_unlock;
401*4882a593Smuzhiyun 	}
402*4882a593Smuzhiyun 	onyx_read_register(onyx, address, &v);
403*4882a593Smuzhiyun 	c = v;
404*4882a593Smuzhiyun 	c &= ~(mask);
405*4882a593Smuzhiyun 	if (!!ucontrol->value.integer.value[0] ^ polarity)
406*4882a593Smuzhiyun 		c |= mask;
407*4882a593Smuzhiyun 	err = onyx_write_register(onyx, address, c);
408*4882a593Smuzhiyun 
409*4882a593Smuzhiyun  out_unlock:
410*4882a593Smuzhiyun 	mutex_unlock(&onyx->mutex);
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun 	return !err ? (v != c) : err;
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun 
415*4882a593Smuzhiyun #define SINGLE_BIT(n, type, description, address, mask, flags)	 	\
416*4882a593Smuzhiyun static const struct snd_kcontrol_new n##_control = {			\
417*4882a593Smuzhiyun 	.iface = SNDRV_CTL_ELEM_IFACE_##type,				\
418*4882a593Smuzhiyun 	.name = description,						\
419*4882a593Smuzhiyun 	.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,			\
420*4882a593Smuzhiyun 	.info = onyx_snd_single_bit_info,				\
421*4882a593Smuzhiyun 	.get = onyx_snd_single_bit_get,					\
422*4882a593Smuzhiyun 	.put = onyx_snd_single_bit_put,					\
423*4882a593Smuzhiyun 	.private_value = (flags << 16) | (address << 8) | mask		\
424*4882a593Smuzhiyun }
425*4882a593Smuzhiyun 
426*4882a593Smuzhiyun SINGLE_BIT(spdif,
427*4882a593Smuzhiyun 	   MIXER,
428*4882a593Smuzhiyun 	   SNDRV_CTL_NAME_IEC958("", PLAYBACK, SWITCH),
429*4882a593Smuzhiyun 	   ONYX_REG_DIG_INFO4,
430*4882a593Smuzhiyun 	   ONYX_SPDIF_ENABLE,
431*4882a593Smuzhiyun 	   FLAG_SPDIFLOCK);
432*4882a593Smuzhiyun SINGLE_BIT(ovr1,
433*4882a593Smuzhiyun 	   MIXER,
434*4882a593Smuzhiyun 	   "Oversampling Rate",
435*4882a593Smuzhiyun 	   ONYX_REG_DAC_CONTROL,
436*4882a593Smuzhiyun 	   ONYX_OVR1,
437*4882a593Smuzhiyun 	   0);
438*4882a593Smuzhiyun SINGLE_BIT(flt0,
439*4882a593Smuzhiyun 	   MIXER,
440*4882a593Smuzhiyun 	   "Fast Digital Filter Rolloff",
441*4882a593Smuzhiyun 	   ONYX_REG_DAC_FILTER,
442*4882a593Smuzhiyun 	   ONYX_ROLLOFF_FAST,
443*4882a593Smuzhiyun 	   FLAG_POLARITY_INVERT);
444*4882a593Smuzhiyun SINGLE_BIT(hpf,
445*4882a593Smuzhiyun 	   MIXER,
446*4882a593Smuzhiyun 	   "Highpass Filter",
447*4882a593Smuzhiyun 	   ONYX_REG_ADC_HPF_BYPASS,
448*4882a593Smuzhiyun 	   ONYX_HPF_DISABLE,
449*4882a593Smuzhiyun 	   FLAG_POLARITY_INVERT);
450*4882a593Smuzhiyun SINGLE_BIT(dm12,
451*4882a593Smuzhiyun 	   MIXER,
452*4882a593Smuzhiyun 	   "Digital De-Emphasis",
453*4882a593Smuzhiyun 	   ONYX_REG_DAC_DEEMPH,
454*4882a593Smuzhiyun 	   ONYX_DIGDEEMPH_CTRL,
455*4882a593Smuzhiyun 	   0);
456*4882a593Smuzhiyun 
onyx_spdif_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)457*4882a593Smuzhiyun static int onyx_spdif_info(struct snd_kcontrol *kcontrol,
458*4882a593Smuzhiyun 			   struct snd_ctl_elem_info *uinfo)
459*4882a593Smuzhiyun {
460*4882a593Smuzhiyun 	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
461*4882a593Smuzhiyun 	uinfo->count = 1;
462*4882a593Smuzhiyun 	return 0;
463*4882a593Smuzhiyun }
464*4882a593Smuzhiyun 
onyx_spdif_mask_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)465*4882a593Smuzhiyun static int onyx_spdif_mask_get(struct snd_kcontrol *kcontrol,
466*4882a593Smuzhiyun 			       struct snd_ctl_elem_value *ucontrol)
467*4882a593Smuzhiyun {
468*4882a593Smuzhiyun 	/* datasheet page 30, all others are 0 */
469*4882a593Smuzhiyun 	ucontrol->value.iec958.status[0] = 0x3e;
470*4882a593Smuzhiyun 	ucontrol->value.iec958.status[1] = 0xff;
471*4882a593Smuzhiyun 
472*4882a593Smuzhiyun 	ucontrol->value.iec958.status[3] = 0x3f;
473*4882a593Smuzhiyun 	ucontrol->value.iec958.status[4] = 0x0f;
474*4882a593Smuzhiyun 
475*4882a593Smuzhiyun 	return 0;
476*4882a593Smuzhiyun }
477*4882a593Smuzhiyun 
478*4882a593Smuzhiyun static const struct snd_kcontrol_new onyx_spdif_mask = {
479*4882a593Smuzhiyun 	.access =	SNDRV_CTL_ELEM_ACCESS_READ,
480*4882a593Smuzhiyun 	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
481*4882a593Smuzhiyun 	.name =		SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
482*4882a593Smuzhiyun 	.info =		onyx_spdif_info,
483*4882a593Smuzhiyun 	.get =		onyx_spdif_mask_get,
484*4882a593Smuzhiyun };
485*4882a593Smuzhiyun 
onyx_spdif_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)486*4882a593Smuzhiyun static int onyx_spdif_get(struct snd_kcontrol *kcontrol,
487*4882a593Smuzhiyun 			  struct snd_ctl_elem_value *ucontrol)
488*4882a593Smuzhiyun {
489*4882a593Smuzhiyun 	struct onyx *onyx = snd_kcontrol_chip(kcontrol);
490*4882a593Smuzhiyun 	u8 v;
491*4882a593Smuzhiyun 
492*4882a593Smuzhiyun 	mutex_lock(&onyx->mutex);
493*4882a593Smuzhiyun 	onyx_read_register(onyx, ONYX_REG_DIG_INFO1, &v);
494*4882a593Smuzhiyun 	ucontrol->value.iec958.status[0] = v & 0x3e;
495*4882a593Smuzhiyun 
496*4882a593Smuzhiyun 	onyx_read_register(onyx, ONYX_REG_DIG_INFO2, &v);
497*4882a593Smuzhiyun 	ucontrol->value.iec958.status[1] = v;
498*4882a593Smuzhiyun 
499*4882a593Smuzhiyun 	onyx_read_register(onyx, ONYX_REG_DIG_INFO3, &v);
500*4882a593Smuzhiyun 	ucontrol->value.iec958.status[3] = v & 0x3f;
501*4882a593Smuzhiyun 
502*4882a593Smuzhiyun 	onyx_read_register(onyx, ONYX_REG_DIG_INFO4, &v);
503*4882a593Smuzhiyun 	ucontrol->value.iec958.status[4] = v & 0x0f;
504*4882a593Smuzhiyun 	mutex_unlock(&onyx->mutex);
505*4882a593Smuzhiyun 
506*4882a593Smuzhiyun 	return 0;
507*4882a593Smuzhiyun }
508*4882a593Smuzhiyun 
onyx_spdif_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)509*4882a593Smuzhiyun static int onyx_spdif_put(struct snd_kcontrol *kcontrol,
510*4882a593Smuzhiyun 			  struct snd_ctl_elem_value *ucontrol)
511*4882a593Smuzhiyun {
512*4882a593Smuzhiyun 	struct onyx *onyx = snd_kcontrol_chip(kcontrol);
513*4882a593Smuzhiyun 	u8 v;
514*4882a593Smuzhiyun 
515*4882a593Smuzhiyun 	mutex_lock(&onyx->mutex);
516*4882a593Smuzhiyun 	onyx_read_register(onyx, ONYX_REG_DIG_INFO1, &v);
517*4882a593Smuzhiyun 	v = (v & ~0x3e) | (ucontrol->value.iec958.status[0] & 0x3e);
518*4882a593Smuzhiyun 	onyx_write_register(onyx, ONYX_REG_DIG_INFO1, v);
519*4882a593Smuzhiyun 
520*4882a593Smuzhiyun 	v = ucontrol->value.iec958.status[1];
521*4882a593Smuzhiyun 	onyx_write_register(onyx, ONYX_REG_DIG_INFO2, v);
522*4882a593Smuzhiyun 
523*4882a593Smuzhiyun 	onyx_read_register(onyx, ONYX_REG_DIG_INFO3, &v);
524*4882a593Smuzhiyun 	v = (v & ~0x3f) | (ucontrol->value.iec958.status[3] & 0x3f);
525*4882a593Smuzhiyun 	onyx_write_register(onyx, ONYX_REG_DIG_INFO3, v);
526*4882a593Smuzhiyun 
527*4882a593Smuzhiyun 	onyx_read_register(onyx, ONYX_REG_DIG_INFO4, &v);
528*4882a593Smuzhiyun 	v = (v & ~0x0f) | (ucontrol->value.iec958.status[4] & 0x0f);
529*4882a593Smuzhiyun 	onyx_write_register(onyx, ONYX_REG_DIG_INFO4, v);
530*4882a593Smuzhiyun 	mutex_unlock(&onyx->mutex);
531*4882a593Smuzhiyun 
532*4882a593Smuzhiyun 	return 1;
533*4882a593Smuzhiyun }
534*4882a593Smuzhiyun 
535*4882a593Smuzhiyun static const struct snd_kcontrol_new onyx_spdif_ctrl = {
536*4882a593Smuzhiyun 	.access =	SNDRV_CTL_ELEM_ACCESS_READWRITE,
537*4882a593Smuzhiyun 	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
538*4882a593Smuzhiyun 	.name =		SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
539*4882a593Smuzhiyun 	.info =		onyx_spdif_info,
540*4882a593Smuzhiyun 	.get =		onyx_spdif_get,
541*4882a593Smuzhiyun 	.put =		onyx_spdif_put,
542*4882a593Smuzhiyun };
543*4882a593Smuzhiyun 
544*4882a593Smuzhiyun /* our registers */
545*4882a593Smuzhiyun 
546*4882a593Smuzhiyun static const u8 register_map[] = {
547*4882a593Smuzhiyun 	ONYX_REG_DAC_ATTEN_LEFT,
548*4882a593Smuzhiyun 	ONYX_REG_DAC_ATTEN_RIGHT,
549*4882a593Smuzhiyun 	ONYX_REG_CONTROL,
550*4882a593Smuzhiyun 	ONYX_REG_DAC_CONTROL,
551*4882a593Smuzhiyun 	ONYX_REG_DAC_DEEMPH,
552*4882a593Smuzhiyun 	ONYX_REG_DAC_FILTER,
553*4882a593Smuzhiyun 	ONYX_REG_DAC_OUTPHASE,
554*4882a593Smuzhiyun 	ONYX_REG_ADC_CONTROL,
555*4882a593Smuzhiyun 	ONYX_REG_ADC_HPF_BYPASS,
556*4882a593Smuzhiyun 	ONYX_REG_DIG_INFO1,
557*4882a593Smuzhiyun 	ONYX_REG_DIG_INFO2,
558*4882a593Smuzhiyun 	ONYX_REG_DIG_INFO3,
559*4882a593Smuzhiyun 	ONYX_REG_DIG_INFO4
560*4882a593Smuzhiyun };
561*4882a593Smuzhiyun 
562*4882a593Smuzhiyun static const u8 initial_values[ARRAY_SIZE(register_map)] = {
563*4882a593Smuzhiyun 	0x80, 0x80, /* muted */
564*4882a593Smuzhiyun 	ONYX_MRST | ONYX_SRST, /* but handled specially! */
565*4882a593Smuzhiyun 	ONYX_MUTE_LEFT | ONYX_MUTE_RIGHT,
566*4882a593Smuzhiyun 	0, /* no deemphasis */
567*4882a593Smuzhiyun 	ONYX_DAC_FILTER_ALWAYS,
568*4882a593Smuzhiyun 	ONYX_OUTPHASE_INVERTED,
569*4882a593Smuzhiyun 	(-1 /*dB*/ + 8) & 0xF, /* line in selected, -1 dB gain*/
570*4882a593Smuzhiyun 	ONYX_ADC_HPF_ALWAYS,
571*4882a593Smuzhiyun 	(1<<2),	/* pcm audio */
572*4882a593Smuzhiyun 	2,	/* category: pcm coder */
573*4882a593Smuzhiyun 	0,	/* sampling frequency 44.1 kHz, clock accuracy level II */
574*4882a593Smuzhiyun 	1	/* 24 bit depth */
575*4882a593Smuzhiyun };
576*4882a593Smuzhiyun 
577*4882a593Smuzhiyun /* reset registers of chip, either to initial or to previous values */
onyx_register_init(struct onyx * onyx)578*4882a593Smuzhiyun static int onyx_register_init(struct onyx *onyx)
579*4882a593Smuzhiyun {
580*4882a593Smuzhiyun 	int i;
581*4882a593Smuzhiyun 	u8 val;
582*4882a593Smuzhiyun 	u8 regs[sizeof(initial_values)];
583*4882a593Smuzhiyun 
584*4882a593Smuzhiyun 	if (!onyx->initialised) {
585*4882a593Smuzhiyun 		memcpy(regs, initial_values, sizeof(initial_values));
586*4882a593Smuzhiyun 		if (onyx_read_register(onyx, ONYX_REG_CONTROL, &val))
587*4882a593Smuzhiyun 			return -1;
588*4882a593Smuzhiyun 		val &= ~ONYX_SILICONVERSION;
589*4882a593Smuzhiyun 		val |= initial_values[3];
590*4882a593Smuzhiyun 		regs[3] = val;
591*4882a593Smuzhiyun 	} else {
592*4882a593Smuzhiyun 		for (i=0; i<sizeof(register_map); i++)
593*4882a593Smuzhiyun 			regs[i] = onyx->cache[register_map[i]-FIRSTREGISTER];
594*4882a593Smuzhiyun 	}
595*4882a593Smuzhiyun 
596*4882a593Smuzhiyun 	for (i=0; i<sizeof(register_map); i++) {
597*4882a593Smuzhiyun 		if (onyx_write_register(onyx, register_map[i], regs[i]))
598*4882a593Smuzhiyun 			return -1;
599*4882a593Smuzhiyun 	}
600*4882a593Smuzhiyun 	onyx->initialised = 1;
601*4882a593Smuzhiyun 	return 0;
602*4882a593Smuzhiyun }
603*4882a593Smuzhiyun 
604*4882a593Smuzhiyun static struct transfer_info onyx_transfers[] = {
605*4882a593Smuzhiyun 	/* this is first so we can skip it if no input is present...
606*4882a593Smuzhiyun 	 * No hardware exists with that, but it's here as an example
607*4882a593Smuzhiyun 	 * of what to do :) */
608*4882a593Smuzhiyun 	{
609*4882a593Smuzhiyun 		/* analog input */
610*4882a593Smuzhiyun 		.formats = SNDRV_PCM_FMTBIT_S8 |
611*4882a593Smuzhiyun 			   SNDRV_PCM_FMTBIT_S16_BE |
612*4882a593Smuzhiyun 			   SNDRV_PCM_FMTBIT_S24_BE,
613*4882a593Smuzhiyun 		.rates = SNDRV_PCM_RATE_8000_96000,
614*4882a593Smuzhiyun 		.transfer_in = 1,
615*4882a593Smuzhiyun 		.must_be_clock_source = 0,
616*4882a593Smuzhiyun 		.tag = 0,
617*4882a593Smuzhiyun 	},
618*4882a593Smuzhiyun 	{
619*4882a593Smuzhiyun 		/* if analog and digital are currently off, anything should go,
620*4882a593Smuzhiyun 		 * so this entry describes everything we can do... */
621*4882a593Smuzhiyun 		.formats = SNDRV_PCM_FMTBIT_S8 |
622*4882a593Smuzhiyun 			   SNDRV_PCM_FMTBIT_S16_BE |
623*4882a593Smuzhiyun 			   SNDRV_PCM_FMTBIT_S24_BE
624*4882a593Smuzhiyun #ifdef SNDRV_PCM_FMTBIT_COMPRESSED_16BE
625*4882a593Smuzhiyun 			   | SNDRV_PCM_FMTBIT_COMPRESSED_16BE
626*4882a593Smuzhiyun #endif
627*4882a593Smuzhiyun 		,
628*4882a593Smuzhiyun 		.rates = SNDRV_PCM_RATE_8000_96000,
629*4882a593Smuzhiyun 		.tag = 0,
630*4882a593Smuzhiyun 	},
631*4882a593Smuzhiyun 	{
632*4882a593Smuzhiyun 		/* analog output */
633*4882a593Smuzhiyun 		.formats = SNDRV_PCM_FMTBIT_S8 |
634*4882a593Smuzhiyun 			   SNDRV_PCM_FMTBIT_S16_BE |
635*4882a593Smuzhiyun 			   SNDRV_PCM_FMTBIT_S24_BE,
636*4882a593Smuzhiyun 		.rates = SNDRV_PCM_RATE_8000_96000,
637*4882a593Smuzhiyun 		.transfer_in = 0,
638*4882a593Smuzhiyun 		.must_be_clock_source = 0,
639*4882a593Smuzhiyun 		.tag = 1,
640*4882a593Smuzhiyun 	},
641*4882a593Smuzhiyun 	{
642*4882a593Smuzhiyun 		/* digital pcm output, also possible for analog out */
643*4882a593Smuzhiyun 		.formats = SNDRV_PCM_FMTBIT_S8 |
644*4882a593Smuzhiyun 			   SNDRV_PCM_FMTBIT_S16_BE |
645*4882a593Smuzhiyun 			   SNDRV_PCM_FMTBIT_S24_BE,
646*4882a593Smuzhiyun 		.rates = SNDRV_PCM_RATE_32000 |
647*4882a593Smuzhiyun 			 SNDRV_PCM_RATE_44100 |
648*4882a593Smuzhiyun 			 SNDRV_PCM_RATE_48000,
649*4882a593Smuzhiyun 		.transfer_in = 0,
650*4882a593Smuzhiyun 		.must_be_clock_source = 0,
651*4882a593Smuzhiyun 		.tag = 2,
652*4882a593Smuzhiyun 	},
653*4882a593Smuzhiyun #ifdef SNDRV_PCM_FMTBIT_COMPRESSED_16BE
654*4882a593Smuzhiyun 	/* Once alsa gets supports for this kind of thing we can add it... */
655*4882a593Smuzhiyun 	{
656*4882a593Smuzhiyun 		/* digital compressed output */
657*4882a593Smuzhiyun 		.formats =  SNDRV_PCM_FMTBIT_COMPRESSED_16BE,
658*4882a593Smuzhiyun 		.rates = SNDRV_PCM_RATE_32000 |
659*4882a593Smuzhiyun 			 SNDRV_PCM_RATE_44100 |
660*4882a593Smuzhiyun 			 SNDRV_PCM_RATE_48000,
661*4882a593Smuzhiyun 		.tag = 2,
662*4882a593Smuzhiyun 	},
663*4882a593Smuzhiyun #endif
664*4882a593Smuzhiyun 	{}
665*4882a593Smuzhiyun };
666*4882a593Smuzhiyun 
onyx_usable(struct codec_info_item * cii,struct transfer_info * ti,struct transfer_info * out)667*4882a593Smuzhiyun static int onyx_usable(struct codec_info_item *cii,
668*4882a593Smuzhiyun 		       struct transfer_info *ti,
669*4882a593Smuzhiyun 		       struct transfer_info *out)
670*4882a593Smuzhiyun {
671*4882a593Smuzhiyun 	u8 v;
672*4882a593Smuzhiyun 	struct onyx *onyx = cii->codec_data;
673*4882a593Smuzhiyun 	int spdif_enabled, analog_enabled;
674*4882a593Smuzhiyun 
675*4882a593Smuzhiyun 	mutex_lock(&onyx->mutex);
676*4882a593Smuzhiyun 	onyx_read_register(onyx, ONYX_REG_DIG_INFO4, &v);
677*4882a593Smuzhiyun 	spdif_enabled = !!(v & ONYX_SPDIF_ENABLE);
678*4882a593Smuzhiyun 	onyx_read_register(onyx, ONYX_REG_DAC_CONTROL, &v);
679*4882a593Smuzhiyun 	analog_enabled =
680*4882a593Smuzhiyun 		(v & (ONYX_MUTE_RIGHT|ONYX_MUTE_LEFT))
681*4882a593Smuzhiyun 		 != (ONYX_MUTE_RIGHT|ONYX_MUTE_LEFT);
682*4882a593Smuzhiyun 	mutex_unlock(&onyx->mutex);
683*4882a593Smuzhiyun 
684*4882a593Smuzhiyun 	switch (ti->tag) {
685*4882a593Smuzhiyun 	case 0: return 1;
686*4882a593Smuzhiyun 	case 1:	return analog_enabled;
687*4882a593Smuzhiyun 	case 2: return spdif_enabled;
688*4882a593Smuzhiyun 	}
689*4882a593Smuzhiyun 	return 1;
690*4882a593Smuzhiyun }
691*4882a593Smuzhiyun 
onyx_prepare(struct codec_info_item * cii,struct bus_info * bi,struct snd_pcm_substream * substream)692*4882a593Smuzhiyun static int onyx_prepare(struct codec_info_item *cii,
693*4882a593Smuzhiyun 			struct bus_info *bi,
694*4882a593Smuzhiyun 			struct snd_pcm_substream *substream)
695*4882a593Smuzhiyun {
696*4882a593Smuzhiyun 	u8 v;
697*4882a593Smuzhiyun 	struct onyx *onyx = cii->codec_data;
698*4882a593Smuzhiyun 	int err = -EBUSY;
699*4882a593Smuzhiyun 
700*4882a593Smuzhiyun 	mutex_lock(&onyx->mutex);
701*4882a593Smuzhiyun 
702*4882a593Smuzhiyun #ifdef SNDRV_PCM_FMTBIT_COMPRESSED_16BE
703*4882a593Smuzhiyun 	if (substream->runtime->format == SNDRV_PCM_FMTBIT_COMPRESSED_16BE) {
704*4882a593Smuzhiyun 		/* mute and lock analog output */
705*4882a593Smuzhiyun 		onyx_read_register(onyx, ONYX_REG_DAC_CONTROL, &v);
706*4882a593Smuzhiyun 		if (onyx_write_register(onyx,
707*4882a593Smuzhiyun 					ONYX_REG_DAC_CONTROL,
708*4882a593Smuzhiyun 					v | ONYX_MUTE_RIGHT | ONYX_MUTE_LEFT))
709*4882a593Smuzhiyun 			goto out_unlock;
710*4882a593Smuzhiyun 		onyx->analog_locked = 1;
711*4882a593Smuzhiyun 		err = 0;
712*4882a593Smuzhiyun 		goto out_unlock;
713*4882a593Smuzhiyun 	}
714*4882a593Smuzhiyun #endif
715*4882a593Smuzhiyun 	switch (substream->runtime->rate) {
716*4882a593Smuzhiyun 	case 32000:
717*4882a593Smuzhiyun 	case 44100:
718*4882a593Smuzhiyun 	case 48000:
719*4882a593Smuzhiyun 		/* these rates are ok for all outputs */
720*4882a593Smuzhiyun 		/* FIXME: program spdif channel control bits here so that
721*4882a593Smuzhiyun 		 *	  userspace doesn't have to if it only plays pcm! */
722*4882a593Smuzhiyun 		err = 0;
723*4882a593Smuzhiyun 		goto out_unlock;
724*4882a593Smuzhiyun 	default:
725*4882a593Smuzhiyun 		/* got some rate that the digital output can't do,
726*4882a593Smuzhiyun 		 * so disable and lock it */
727*4882a593Smuzhiyun 		onyx_read_register(cii->codec_data, ONYX_REG_DIG_INFO4, &v);
728*4882a593Smuzhiyun 		if (onyx_write_register(onyx,
729*4882a593Smuzhiyun 					ONYX_REG_DIG_INFO4,
730*4882a593Smuzhiyun 					v & ~ONYX_SPDIF_ENABLE))
731*4882a593Smuzhiyun 			goto out_unlock;
732*4882a593Smuzhiyun 		onyx->spdif_locked = 1;
733*4882a593Smuzhiyun 		err = 0;
734*4882a593Smuzhiyun 		goto out_unlock;
735*4882a593Smuzhiyun 	}
736*4882a593Smuzhiyun 
737*4882a593Smuzhiyun  out_unlock:
738*4882a593Smuzhiyun 	mutex_unlock(&onyx->mutex);
739*4882a593Smuzhiyun 
740*4882a593Smuzhiyun 	return err;
741*4882a593Smuzhiyun }
742*4882a593Smuzhiyun 
onyx_open(struct codec_info_item * cii,struct snd_pcm_substream * substream)743*4882a593Smuzhiyun static int onyx_open(struct codec_info_item *cii,
744*4882a593Smuzhiyun 		     struct snd_pcm_substream *substream)
745*4882a593Smuzhiyun {
746*4882a593Smuzhiyun 	struct onyx *onyx = cii->codec_data;
747*4882a593Smuzhiyun 
748*4882a593Smuzhiyun 	mutex_lock(&onyx->mutex);
749*4882a593Smuzhiyun 	onyx->open_count++;
750*4882a593Smuzhiyun 	mutex_unlock(&onyx->mutex);
751*4882a593Smuzhiyun 
752*4882a593Smuzhiyun 	return 0;
753*4882a593Smuzhiyun }
754*4882a593Smuzhiyun 
onyx_close(struct codec_info_item * cii,struct snd_pcm_substream * substream)755*4882a593Smuzhiyun static int onyx_close(struct codec_info_item *cii,
756*4882a593Smuzhiyun 		      struct snd_pcm_substream *substream)
757*4882a593Smuzhiyun {
758*4882a593Smuzhiyun 	struct onyx *onyx = cii->codec_data;
759*4882a593Smuzhiyun 
760*4882a593Smuzhiyun 	mutex_lock(&onyx->mutex);
761*4882a593Smuzhiyun 	onyx->open_count--;
762*4882a593Smuzhiyun 	if (!onyx->open_count)
763*4882a593Smuzhiyun 		onyx->spdif_locked = onyx->analog_locked = 0;
764*4882a593Smuzhiyun 	mutex_unlock(&onyx->mutex);
765*4882a593Smuzhiyun 
766*4882a593Smuzhiyun 	return 0;
767*4882a593Smuzhiyun }
768*4882a593Smuzhiyun 
onyx_switch_clock(struct codec_info_item * cii,enum clock_switch what)769*4882a593Smuzhiyun static int onyx_switch_clock(struct codec_info_item *cii,
770*4882a593Smuzhiyun 			     enum clock_switch what)
771*4882a593Smuzhiyun {
772*4882a593Smuzhiyun 	struct onyx *onyx = cii->codec_data;
773*4882a593Smuzhiyun 
774*4882a593Smuzhiyun 	mutex_lock(&onyx->mutex);
775*4882a593Smuzhiyun 	/* this *MUST* be more elaborate later... */
776*4882a593Smuzhiyun 	switch (what) {
777*4882a593Smuzhiyun 	case CLOCK_SWITCH_PREPARE_SLAVE:
778*4882a593Smuzhiyun 		onyx->codec.gpio->methods->all_amps_off(onyx->codec.gpio);
779*4882a593Smuzhiyun 		break;
780*4882a593Smuzhiyun 	case CLOCK_SWITCH_SLAVE:
781*4882a593Smuzhiyun 		onyx->codec.gpio->methods->all_amps_restore(onyx->codec.gpio);
782*4882a593Smuzhiyun 		break;
783*4882a593Smuzhiyun 	default: /* silence warning */
784*4882a593Smuzhiyun 		break;
785*4882a593Smuzhiyun 	}
786*4882a593Smuzhiyun 	mutex_unlock(&onyx->mutex);
787*4882a593Smuzhiyun 
788*4882a593Smuzhiyun 	return 0;
789*4882a593Smuzhiyun }
790*4882a593Smuzhiyun 
791*4882a593Smuzhiyun #ifdef CONFIG_PM
792*4882a593Smuzhiyun 
onyx_suspend(struct codec_info_item * cii,pm_message_t state)793*4882a593Smuzhiyun static int onyx_suspend(struct codec_info_item *cii, pm_message_t state)
794*4882a593Smuzhiyun {
795*4882a593Smuzhiyun 	struct onyx *onyx = cii->codec_data;
796*4882a593Smuzhiyun 	u8 v;
797*4882a593Smuzhiyun 	int err = -ENXIO;
798*4882a593Smuzhiyun 
799*4882a593Smuzhiyun 	mutex_lock(&onyx->mutex);
800*4882a593Smuzhiyun 	if (onyx_read_register(onyx, ONYX_REG_CONTROL, &v))
801*4882a593Smuzhiyun 		goto out_unlock;
802*4882a593Smuzhiyun 	onyx_write_register(onyx, ONYX_REG_CONTROL, v | ONYX_ADPSV | ONYX_DAPSV);
803*4882a593Smuzhiyun 	/* Apple does a sleep here but the datasheet says to do it on resume */
804*4882a593Smuzhiyun 	err = 0;
805*4882a593Smuzhiyun  out_unlock:
806*4882a593Smuzhiyun 	mutex_unlock(&onyx->mutex);
807*4882a593Smuzhiyun 
808*4882a593Smuzhiyun 	return err;
809*4882a593Smuzhiyun }
810*4882a593Smuzhiyun 
onyx_resume(struct codec_info_item * cii)811*4882a593Smuzhiyun static int onyx_resume(struct codec_info_item *cii)
812*4882a593Smuzhiyun {
813*4882a593Smuzhiyun 	struct onyx *onyx = cii->codec_data;
814*4882a593Smuzhiyun 	u8 v;
815*4882a593Smuzhiyun 	int err = -ENXIO;
816*4882a593Smuzhiyun 
817*4882a593Smuzhiyun 	mutex_lock(&onyx->mutex);
818*4882a593Smuzhiyun 
819*4882a593Smuzhiyun 	/* reset codec */
820*4882a593Smuzhiyun 	onyx->codec.gpio->methods->set_hw_reset(onyx->codec.gpio, 0);
821*4882a593Smuzhiyun 	msleep(1);
822*4882a593Smuzhiyun 	onyx->codec.gpio->methods->set_hw_reset(onyx->codec.gpio, 1);
823*4882a593Smuzhiyun 	msleep(1);
824*4882a593Smuzhiyun 	onyx->codec.gpio->methods->set_hw_reset(onyx->codec.gpio, 0);
825*4882a593Smuzhiyun 	msleep(1);
826*4882a593Smuzhiyun 
827*4882a593Smuzhiyun 	/* take codec out of suspend (if it still is after reset) */
828*4882a593Smuzhiyun 	if (onyx_read_register(onyx, ONYX_REG_CONTROL, &v))
829*4882a593Smuzhiyun 		goto out_unlock;
830*4882a593Smuzhiyun 	onyx_write_register(onyx, ONYX_REG_CONTROL, v & ~(ONYX_ADPSV | ONYX_DAPSV));
831*4882a593Smuzhiyun 	/* FIXME: should divide by sample rate, but 8k is the lowest we go */
832*4882a593Smuzhiyun 	msleep(2205000/8000);
833*4882a593Smuzhiyun 	/* reset all values */
834*4882a593Smuzhiyun 	onyx_register_init(onyx);
835*4882a593Smuzhiyun 	err = 0;
836*4882a593Smuzhiyun  out_unlock:
837*4882a593Smuzhiyun 	mutex_unlock(&onyx->mutex);
838*4882a593Smuzhiyun 
839*4882a593Smuzhiyun 	return err;
840*4882a593Smuzhiyun }
841*4882a593Smuzhiyun 
842*4882a593Smuzhiyun #endif /* CONFIG_PM */
843*4882a593Smuzhiyun 
844*4882a593Smuzhiyun static struct codec_info onyx_codec_info = {
845*4882a593Smuzhiyun 	.transfers = onyx_transfers,
846*4882a593Smuzhiyun 	.sysclock_factor = 256,
847*4882a593Smuzhiyun 	.bus_factor = 64,
848*4882a593Smuzhiyun 	.owner = THIS_MODULE,
849*4882a593Smuzhiyun 	.usable = onyx_usable,
850*4882a593Smuzhiyun 	.prepare = onyx_prepare,
851*4882a593Smuzhiyun 	.open = onyx_open,
852*4882a593Smuzhiyun 	.close = onyx_close,
853*4882a593Smuzhiyun 	.switch_clock = onyx_switch_clock,
854*4882a593Smuzhiyun #ifdef CONFIG_PM
855*4882a593Smuzhiyun 	.suspend = onyx_suspend,
856*4882a593Smuzhiyun 	.resume = onyx_resume,
857*4882a593Smuzhiyun #endif
858*4882a593Smuzhiyun };
859*4882a593Smuzhiyun 
onyx_init_codec(struct aoa_codec * codec)860*4882a593Smuzhiyun static int onyx_init_codec(struct aoa_codec *codec)
861*4882a593Smuzhiyun {
862*4882a593Smuzhiyun 	struct onyx *onyx = codec_to_onyx(codec);
863*4882a593Smuzhiyun 	struct snd_kcontrol *ctl;
864*4882a593Smuzhiyun 	struct codec_info *ci = &onyx_codec_info;
865*4882a593Smuzhiyun 	u8 v;
866*4882a593Smuzhiyun 	int err;
867*4882a593Smuzhiyun 
868*4882a593Smuzhiyun 	if (!onyx->codec.gpio || !onyx->codec.gpio->methods) {
869*4882a593Smuzhiyun 		printk(KERN_ERR PFX "gpios not assigned!!\n");
870*4882a593Smuzhiyun 		return -EINVAL;
871*4882a593Smuzhiyun 	}
872*4882a593Smuzhiyun 
873*4882a593Smuzhiyun 	onyx->codec.gpio->methods->set_hw_reset(onyx->codec.gpio, 0);
874*4882a593Smuzhiyun 	msleep(1);
875*4882a593Smuzhiyun 	onyx->codec.gpio->methods->set_hw_reset(onyx->codec.gpio, 1);
876*4882a593Smuzhiyun 	msleep(1);
877*4882a593Smuzhiyun 	onyx->codec.gpio->methods->set_hw_reset(onyx->codec.gpio, 0);
878*4882a593Smuzhiyun 	msleep(1);
879*4882a593Smuzhiyun 
880*4882a593Smuzhiyun 	if (onyx_register_init(onyx)) {
881*4882a593Smuzhiyun 		printk(KERN_ERR PFX "failed to initialise onyx registers\n");
882*4882a593Smuzhiyun 		return -ENODEV;
883*4882a593Smuzhiyun 	}
884*4882a593Smuzhiyun 
885*4882a593Smuzhiyun 	if (aoa_snd_device_new(SNDRV_DEV_CODEC, onyx, &ops)) {
886*4882a593Smuzhiyun 		printk(KERN_ERR PFX "failed to create onyx snd device!\n");
887*4882a593Smuzhiyun 		return -ENODEV;
888*4882a593Smuzhiyun 	}
889*4882a593Smuzhiyun 
890*4882a593Smuzhiyun 	/* nothing connected? what a joke! */
891*4882a593Smuzhiyun 	if ((onyx->codec.connected & 0xF) == 0)
892*4882a593Smuzhiyun 		return -ENOTCONN;
893*4882a593Smuzhiyun 
894*4882a593Smuzhiyun 	/* if no inputs are present... */
895*4882a593Smuzhiyun 	if ((onyx->codec.connected & 0xC) == 0) {
896*4882a593Smuzhiyun 		if (!onyx->codec_info)
897*4882a593Smuzhiyun 			onyx->codec_info = kmalloc(sizeof(struct codec_info), GFP_KERNEL);
898*4882a593Smuzhiyun 		if (!onyx->codec_info)
899*4882a593Smuzhiyun 			return -ENOMEM;
900*4882a593Smuzhiyun 		ci = onyx->codec_info;
901*4882a593Smuzhiyun 		*ci = onyx_codec_info;
902*4882a593Smuzhiyun 		ci->transfers++;
903*4882a593Smuzhiyun 	}
904*4882a593Smuzhiyun 
905*4882a593Smuzhiyun 	/* if no outputs are present... */
906*4882a593Smuzhiyun 	if ((onyx->codec.connected & 3) == 0) {
907*4882a593Smuzhiyun 		if (!onyx->codec_info)
908*4882a593Smuzhiyun 			onyx->codec_info = kmalloc(sizeof(struct codec_info), GFP_KERNEL);
909*4882a593Smuzhiyun 		if (!onyx->codec_info)
910*4882a593Smuzhiyun 			return -ENOMEM;
911*4882a593Smuzhiyun 		ci = onyx->codec_info;
912*4882a593Smuzhiyun 		/* this is fine as there have to be inputs
913*4882a593Smuzhiyun 		 * if we end up in this part of the code */
914*4882a593Smuzhiyun 		*ci = onyx_codec_info;
915*4882a593Smuzhiyun 		ci->transfers[1].formats = 0;
916*4882a593Smuzhiyun 	}
917*4882a593Smuzhiyun 
918*4882a593Smuzhiyun 	if (onyx->codec.soundbus_dev->attach_codec(onyx->codec.soundbus_dev,
919*4882a593Smuzhiyun 						   aoa_get_card(),
920*4882a593Smuzhiyun 						   ci, onyx)) {
921*4882a593Smuzhiyun 		printk(KERN_ERR PFX "error creating onyx pcm\n");
922*4882a593Smuzhiyun 		return -ENODEV;
923*4882a593Smuzhiyun 	}
924*4882a593Smuzhiyun #define ADDCTL(n)							\
925*4882a593Smuzhiyun 	do {								\
926*4882a593Smuzhiyun 		ctl = snd_ctl_new1(&n, onyx);				\
927*4882a593Smuzhiyun 		if (ctl) {						\
928*4882a593Smuzhiyun 			ctl->id.device =				\
929*4882a593Smuzhiyun 				onyx->codec.soundbus_dev->pcm->device;	\
930*4882a593Smuzhiyun 			err = aoa_snd_ctl_add(ctl);			\
931*4882a593Smuzhiyun 			if (err)					\
932*4882a593Smuzhiyun 				goto error;				\
933*4882a593Smuzhiyun 		}							\
934*4882a593Smuzhiyun 	} while (0)
935*4882a593Smuzhiyun 
936*4882a593Smuzhiyun 	if (onyx->codec.soundbus_dev->pcm) {
937*4882a593Smuzhiyun 		/* give the user appropriate controls
938*4882a593Smuzhiyun 		 * depending on what inputs are connected */
939*4882a593Smuzhiyun 		if ((onyx->codec.connected & 0xC) == 0xC)
940*4882a593Smuzhiyun 			ADDCTL(capture_source_control);
941*4882a593Smuzhiyun 		else if (onyx->codec.connected & 4)
942*4882a593Smuzhiyun 			onyx_set_capture_source(onyx, 0);
943*4882a593Smuzhiyun 		else
944*4882a593Smuzhiyun 			onyx_set_capture_source(onyx, 1);
945*4882a593Smuzhiyun 		if (onyx->codec.connected & 0xC)
946*4882a593Smuzhiyun 			ADDCTL(inputgain_control);
947*4882a593Smuzhiyun 
948*4882a593Smuzhiyun 		/* depending on what output is connected,
949*4882a593Smuzhiyun 		 * give the user appropriate controls */
950*4882a593Smuzhiyun 		if (onyx->codec.connected & 1) {
951*4882a593Smuzhiyun 			ADDCTL(volume_control);
952*4882a593Smuzhiyun 			ADDCTL(mute_control);
953*4882a593Smuzhiyun 			ADDCTL(ovr1_control);
954*4882a593Smuzhiyun 			ADDCTL(flt0_control);
955*4882a593Smuzhiyun 			ADDCTL(hpf_control);
956*4882a593Smuzhiyun 			ADDCTL(dm12_control);
957*4882a593Smuzhiyun 			/* spdif control defaults to off */
958*4882a593Smuzhiyun 		}
959*4882a593Smuzhiyun 		if (onyx->codec.connected & 2) {
960*4882a593Smuzhiyun 			ADDCTL(onyx_spdif_mask);
961*4882a593Smuzhiyun 			ADDCTL(onyx_spdif_ctrl);
962*4882a593Smuzhiyun 		}
963*4882a593Smuzhiyun 		if ((onyx->codec.connected & 3) == 3)
964*4882a593Smuzhiyun 			ADDCTL(spdif_control);
965*4882a593Smuzhiyun 		/* if only S/PDIF is connected, enable it unconditionally */
966*4882a593Smuzhiyun 		if ((onyx->codec.connected & 3) == 2) {
967*4882a593Smuzhiyun 			onyx_read_register(onyx, ONYX_REG_DIG_INFO4, &v);
968*4882a593Smuzhiyun 			v |= ONYX_SPDIF_ENABLE;
969*4882a593Smuzhiyun 			onyx_write_register(onyx, ONYX_REG_DIG_INFO4, v);
970*4882a593Smuzhiyun 		}
971*4882a593Smuzhiyun 	}
972*4882a593Smuzhiyun #undef ADDCTL
973*4882a593Smuzhiyun 	printk(KERN_INFO PFX "attached to onyx codec via i2c\n");
974*4882a593Smuzhiyun 
975*4882a593Smuzhiyun 	return 0;
976*4882a593Smuzhiyun  error:
977*4882a593Smuzhiyun 	onyx->codec.soundbus_dev->detach_codec(onyx->codec.soundbus_dev, onyx);
978*4882a593Smuzhiyun 	snd_device_free(aoa_get_card(), onyx);
979*4882a593Smuzhiyun 	return err;
980*4882a593Smuzhiyun }
981*4882a593Smuzhiyun 
onyx_exit_codec(struct aoa_codec * codec)982*4882a593Smuzhiyun static void onyx_exit_codec(struct aoa_codec *codec)
983*4882a593Smuzhiyun {
984*4882a593Smuzhiyun 	struct onyx *onyx = codec_to_onyx(codec);
985*4882a593Smuzhiyun 
986*4882a593Smuzhiyun 	if (!onyx->codec.soundbus_dev) {
987*4882a593Smuzhiyun 		printk(KERN_ERR PFX "onyx_exit_codec called without soundbus_dev!\n");
988*4882a593Smuzhiyun 		return;
989*4882a593Smuzhiyun 	}
990*4882a593Smuzhiyun 	onyx->codec.soundbus_dev->detach_codec(onyx->codec.soundbus_dev, onyx);
991*4882a593Smuzhiyun }
992*4882a593Smuzhiyun 
onyx_i2c_probe(struct i2c_client * client,const struct i2c_device_id * id)993*4882a593Smuzhiyun static int onyx_i2c_probe(struct i2c_client *client,
994*4882a593Smuzhiyun 			  const struct i2c_device_id *id)
995*4882a593Smuzhiyun {
996*4882a593Smuzhiyun 	struct device_node *node = client->dev.of_node;
997*4882a593Smuzhiyun 	struct onyx *onyx;
998*4882a593Smuzhiyun 	u8 dummy;
999*4882a593Smuzhiyun 
1000*4882a593Smuzhiyun 	onyx = kzalloc(sizeof(struct onyx), GFP_KERNEL);
1001*4882a593Smuzhiyun 
1002*4882a593Smuzhiyun 	if (!onyx)
1003*4882a593Smuzhiyun 		return -ENOMEM;
1004*4882a593Smuzhiyun 
1005*4882a593Smuzhiyun 	mutex_init(&onyx->mutex);
1006*4882a593Smuzhiyun 	onyx->i2c = client;
1007*4882a593Smuzhiyun 	i2c_set_clientdata(client, onyx);
1008*4882a593Smuzhiyun 
1009*4882a593Smuzhiyun 	/* we try to read from register ONYX_REG_CONTROL
1010*4882a593Smuzhiyun 	 * to check if the codec is present */
1011*4882a593Smuzhiyun 	if (onyx_read_register(onyx, ONYX_REG_CONTROL, &dummy) != 0) {
1012*4882a593Smuzhiyun 		printk(KERN_ERR PFX "failed to read control register\n");
1013*4882a593Smuzhiyun 		goto fail;
1014*4882a593Smuzhiyun 	}
1015*4882a593Smuzhiyun 
1016*4882a593Smuzhiyun 	strlcpy(onyx->codec.name, "onyx", MAX_CODEC_NAME_LEN);
1017*4882a593Smuzhiyun 	onyx->codec.owner = THIS_MODULE;
1018*4882a593Smuzhiyun 	onyx->codec.init = onyx_init_codec;
1019*4882a593Smuzhiyun 	onyx->codec.exit = onyx_exit_codec;
1020*4882a593Smuzhiyun 	onyx->codec.node = of_node_get(node);
1021*4882a593Smuzhiyun 
1022*4882a593Smuzhiyun 	if (aoa_codec_register(&onyx->codec)) {
1023*4882a593Smuzhiyun 		goto fail;
1024*4882a593Smuzhiyun 	}
1025*4882a593Smuzhiyun 	printk(KERN_DEBUG PFX "created and attached onyx instance\n");
1026*4882a593Smuzhiyun 	return 0;
1027*4882a593Smuzhiyun  fail:
1028*4882a593Smuzhiyun 	kfree(onyx);
1029*4882a593Smuzhiyun 	return -ENODEV;
1030*4882a593Smuzhiyun }
1031*4882a593Smuzhiyun 
onyx_i2c_remove(struct i2c_client * client)1032*4882a593Smuzhiyun static int onyx_i2c_remove(struct i2c_client *client)
1033*4882a593Smuzhiyun {
1034*4882a593Smuzhiyun 	struct onyx *onyx = i2c_get_clientdata(client);
1035*4882a593Smuzhiyun 
1036*4882a593Smuzhiyun 	aoa_codec_unregister(&onyx->codec);
1037*4882a593Smuzhiyun 	of_node_put(onyx->codec.node);
1038*4882a593Smuzhiyun 	kfree(onyx->codec_info);
1039*4882a593Smuzhiyun 	kfree(onyx);
1040*4882a593Smuzhiyun 	return 0;
1041*4882a593Smuzhiyun }
1042*4882a593Smuzhiyun 
1043*4882a593Smuzhiyun static const struct i2c_device_id onyx_i2c_id[] = {
1044*4882a593Smuzhiyun 	{ "MAC,pcm3052", 0 },
1045*4882a593Smuzhiyun 	{ }
1046*4882a593Smuzhiyun };
1047*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c,onyx_i2c_id);
1048*4882a593Smuzhiyun 
1049*4882a593Smuzhiyun static struct i2c_driver onyx_driver = {
1050*4882a593Smuzhiyun 	.driver = {
1051*4882a593Smuzhiyun 		.name = "aoa_codec_onyx",
1052*4882a593Smuzhiyun 	},
1053*4882a593Smuzhiyun 	.probe = onyx_i2c_probe,
1054*4882a593Smuzhiyun 	.remove = onyx_i2c_remove,
1055*4882a593Smuzhiyun 	.id_table = onyx_i2c_id,
1056*4882a593Smuzhiyun };
1057*4882a593Smuzhiyun 
1058*4882a593Smuzhiyun module_i2c_driver(onyx_driver);
1059