xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/powerpc/tqm8xx.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * TQM8XX Device Tree Source
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Heiko Schocher <hs@denx.de>
6*4882a593Smuzhiyun * 2010 DENX Software Engineering GmbH
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun/dts-v1/;
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	model = "TQM8xx";
13*4882a593Smuzhiyun	compatible = "tqc,tqm8xx";
14*4882a593Smuzhiyun	#address-cells = <1>;
15*4882a593Smuzhiyun	#size-cells = <1>;
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun	aliases {
18*4882a593Smuzhiyun		ethernet0 = &eth0;
19*4882a593Smuzhiyun		ethernet1 = &eth1;
20*4882a593Smuzhiyun		mdio1 = &phy1;
21*4882a593Smuzhiyun		serial0 = &smc1;
22*4882a593Smuzhiyun	};
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun	cpus {
25*4882a593Smuzhiyun		#address-cells = <1>;
26*4882a593Smuzhiyun		#size-cells = <0>;
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun		PowerPC,860@0 {
29*4882a593Smuzhiyun			device_type = "cpu";
30*4882a593Smuzhiyun			reg = <0x0>;
31*4882a593Smuzhiyun			d-cache-line-size = <16>;	// 16 bytes
32*4882a593Smuzhiyun			i-cache-line-size = <16>;	// 16 bytes
33*4882a593Smuzhiyun			d-cache-size = <0x1000>;		// L1, 4K
34*4882a593Smuzhiyun			i-cache-size = <0x1000>;		// L1, 4K
35*4882a593Smuzhiyun			timebase-frequency = <0>;
36*4882a593Smuzhiyun			bus-frequency = <0>;
37*4882a593Smuzhiyun			clock-frequency = <0>;
38*4882a593Smuzhiyun			interrupts = <15 2>;	// decrementer interrupt
39*4882a593Smuzhiyun			interrupt-parent = <&PIC>;
40*4882a593Smuzhiyun		};
41*4882a593Smuzhiyun	};
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun	memory {
44*4882a593Smuzhiyun		device_type = "memory";
45*4882a593Smuzhiyun		reg = <0x0 0x2000000>;
46*4882a593Smuzhiyun	};
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun	localbus@fff00100 {
49*4882a593Smuzhiyun		compatible = "fsl,mpc860-localbus", "fsl,pq1-localbus";
50*4882a593Smuzhiyun		#address-cells = <2>;
51*4882a593Smuzhiyun		#size-cells = <1>;
52*4882a593Smuzhiyun		reg = <0xfff00100 0x40>;
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun		ranges = <
55*4882a593Smuzhiyun			0x0 0x0 0x40000000 0x800000
56*4882a593Smuzhiyun			0x3 0x0 0xc0000000 0x200
57*4882a593Smuzhiyun		>;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun		flash@0,0 {
60*4882a593Smuzhiyun			compatible = "cfi-flash";
61*4882a593Smuzhiyun			reg = <0 0 0x800000>;
62*4882a593Smuzhiyun			#address-cells = <1>;
63*4882a593Smuzhiyun			#size-cells = <1>;
64*4882a593Smuzhiyun			bank-width = <4>;
65*4882a593Smuzhiyun			device-width = <2>;
66*4882a593Smuzhiyun		};
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun		/* Note: CAN support needs be enabled in U-Boot */
69*4882a593Smuzhiyun		can@3,0 {
70*4882a593Smuzhiyun			compatible = "intc,82527";
71*4882a593Smuzhiyun			reg = <3 0x0 0x80>;
72*4882a593Smuzhiyun			interrupts = <8 1>;
73*4882a593Smuzhiyun			interrupt-parent = <&PIC>;
74*4882a593Smuzhiyun			bosch,external-clock-frequency = <16000000>;
75*4882a593Smuzhiyun			bosch,disconnect-rx1-input;
76*4882a593Smuzhiyun			bosch,disconnect-tx1-output;
77*4882a593Smuzhiyun			bosch,iso-low-speed-mux;
78*4882a593Smuzhiyun			bosch,clock-out-frequency = <16000000>;
79*4882a593Smuzhiyun		};
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun		can@3,100 {
82*4882a593Smuzhiyun			compatible = "intc,82527";
83*4882a593Smuzhiyun			reg = <3 0x100 0x80>;
84*4882a593Smuzhiyun			interrupts = <8 1>;
85*4882a593Smuzhiyun			interrupt-parent = <&PIC>;
86*4882a593Smuzhiyun			bosch,external-clock-frequency = <16000000>;
87*4882a593Smuzhiyun			bosch,disconnect-rx1-input;
88*4882a593Smuzhiyun			bosch,disconnect-tx1-output;
89*4882a593Smuzhiyun			bosch,iso-low-speed-mux;
90*4882a593Smuzhiyun		};
91*4882a593Smuzhiyun	};
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun	soc@fff00000 {
94*4882a593Smuzhiyun		#address-cells = <1>;
95*4882a593Smuzhiyun		#size-cells = <1>;
96*4882a593Smuzhiyun		device_type = "soc";
97*4882a593Smuzhiyun		ranges = <0x0 0xfff00000 0x00004000>;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun		phy1: mdio@e00 {
100*4882a593Smuzhiyun			compatible = "fsl,mpc866-fec-mdio", "fsl,pq1-fec-mdio";
101*4882a593Smuzhiyun			reg = <0xe00 0x188>;
102*4882a593Smuzhiyun			#address-cells = <1>;
103*4882a593Smuzhiyun			#size-cells = <0>;
104*4882a593Smuzhiyun			PHY: ethernet-phy@f {
105*4882a593Smuzhiyun				reg = <0xf>;
106*4882a593Smuzhiyun			};
107*4882a593Smuzhiyun		};
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun		eth1: ethernet@e00 {
110*4882a593Smuzhiyun			device_type = "network";
111*4882a593Smuzhiyun			compatible = "fsl,mpc866-fec-enet",
112*4882a593Smuzhiyun			             "fsl,pq1-fec-enet";
113*4882a593Smuzhiyun			reg = <0xe00 0x188>;
114*4882a593Smuzhiyun			interrupts = <3 1>;
115*4882a593Smuzhiyun			interrupt-parent = <&PIC>;
116*4882a593Smuzhiyun			phy-handle = <&PHY>;
117*4882a593Smuzhiyun			linux,network-index = <1>;
118*4882a593Smuzhiyun		};
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun		PIC: pic@0 {
121*4882a593Smuzhiyun			interrupt-controller;
122*4882a593Smuzhiyun			#interrupt-cells = <2>;
123*4882a593Smuzhiyun			reg = <0x0 0x24>;
124*4882a593Smuzhiyun			compatible = "fsl,mpc860-pic", "fsl,pq1-pic";
125*4882a593Smuzhiyun		};
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun		cpm@9c0 {
128*4882a593Smuzhiyun			#address-cells = <1>;
129*4882a593Smuzhiyun			#size-cells = <1>;
130*4882a593Smuzhiyun			compatible = "fsl,mpc860-cpm", "fsl,cpm1";
131*4882a593Smuzhiyun			ranges;
132*4882a593Smuzhiyun			reg = <0x9c0 0x40>;
133*4882a593Smuzhiyun			brg-frequency = <0>;
134*4882a593Smuzhiyun			interrupts = <0 2>;	// cpm error interrupt
135*4882a593Smuzhiyun			interrupt-parent = <&CPM_PIC>;
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun			muram@2000 {
138*4882a593Smuzhiyun				#address-cells = <1>;
139*4882a593Smuzhiyun				#size-cells = <1>;
140*4882a593Smuzhiyun				ranges = <0x0 0x2000 0x2000>;
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun				data@0 {
143*4882a593Smuzhiyun					compatible = "fsl,cpm-muram-data";
144*4882a593Smuzhiyun					reg = <0x0 0x2000>;
145*4882a593Smuzhiyun				};
146*4882a593Smuzhiyun			};
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun			brg@9f0 {
149*4882a593Smuzhiyun				compatible = "fsl,mpc860-brg",
150*4882a593Smuzhiyun					     "fsl,cpm1-brg",
151*4882a593Smuzhiyun					     "fsl,cpm-brg";
152*4882a593Smuzhiyun				reg = <0x9f0 0x10>;
153*4882a593Smuzhiyun				clock-frequency = <0>;
154*4882a593Smuzhiyun			};
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun			CPM_PIC: pic@930 {
157*4882a593Smuzhiyun				interrupt-controller;
158*4882a593Smuzhiyun				#address-cells = <0>;
159*4882a593Smuzhiyun				#interrupt-cells = <1>;
160*4882a593Smuzhiyun				interrupts = <5 2 0 2>;
161*4882a593Smuzhiyun				interrupt-parent = <&PIC>;
162*4882a593Smuzhiyun				reg = <0x930 0x20>;
163*4882a593Smuzhiyun				compatible = "fsl,mpc860-cpm-pic",
164*4882a593Smuzhiyun				             "fsl,cpm1-pic";
165*4882a593Smuzhiyun			};
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun			smc1: serial@a80 {
169*4882a593Smuzhiyun				device_type = "serial";
170*4882a593Smuzhiyun				compatible = "fsl,mpc860-smc-uart",
171*4882a593Smuzhiyun				             "fsl,cpm1-smc-uart";
172*4882a593Smuzhiyun				reg = <0xa80 0x10 0x3e80 0x40>;
173*4882a593Smuzhiyun				interrupts = <4>;
174*4882a593Smuzhiyun				interrupt-parent = <&CPM_PIC>;
175*4882a593Smuzhiyun				fsl,cpm-brg = <1>;
176*4882a593Smuzhiyun				fsl,cpm-command = <0x90>;
177*4882a593Smuzhiyun			};
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun			eth0: ethernet@a00 {
180*4882a593Smuzhiyun				device_type = "network";
181*4882a593Smuzhiyun				compatible = "fsl,mpc860-scc-enet",
182*4882a593Smuzhiyun				             "fsl,cpm1-scc-enet";
183*4882a593Smuzhiyun				reg = <0xa00 0x18 0x3c00 0x100>;
184*4882a593Smuzhiyun				interrupts = <30>;
185*4882a593Smuzhiyun				interrupt-parent = <&CPM_PIC>;
186*4882a593Smuzhiyun				fsl,cpm-command = <0000>;
187*4882a593Smuzhiyun				linux,network-index = <0>;
188*4882a593Smuzhiyun				fixed-link = <0 0 10 0 0>;
189*4882a593Smuzhiyun			};
190*4882a593Smuzhiyun		};
191*4882a593Smuzhiyun	};
192*4882a593Smuzhiyun};
193