1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * MPC8349E-mITX Device Tree Source 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright 2006 Freescale Semiconductor Inc. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/dts-v1/; 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun model = "MPC8349EMITX"; 12*4882a593Smuzhiyun compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX"; 13*4882a593Smuzhiyun #address-cells = <1>; 14*4882a593Smuzhiyun #size-cells = <1>; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun aliases { 17*4882a593Smuzhiyun ethernet0 = &enet0; 18*4882a593Smuzhiyun ethernet1 = &enet1; 19*4882a593Smuzhiyun serial0 = &serial0; 20*4882a593Smuzhiyun serial1 = &serial1; 21*4882a593Smuzhiyun pci0 = &pci0; 22*4882a593Smuzhiyun pci1 = &pci1; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun cpus { 26*4882a593Smuzhiyun #address-cells = <1>; 27*4882a593Smuzhiyun #size-cells = <0>; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun PowerPC,8349@0 { 30*4882a593Smuzhiyun device_type = "cpu"; 31*4882a593Smuzhiyun reg = <0x0>; 32*4882a593Smuzhiyun d-cache-line-size = <32>; 33*4882a593Smuzhiyun i-cache-line-size = <32>; 34*4882a593Smuzhiyun d-cache-size = <32768>; 35*4882a593Smuzhiyun i-cache-size = <32768>; 36*4882a593Smuzhiyun timebase-frequency = <0>; // from bootloader 37*4882a593Smuzhiyun bus-frequency = <0>; // from bootloader 38*4882a593Smuzhiyun clock-frequency = <0>; // from bootloader 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun memory { 43*4882a593Smuzhiyun device_type = "memory"; 44*4882a593Smuzhiyun reg = <0x00000000 0x10000000>; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun soc8349@e0000000 { 48*4882a593Smuzhiyun #address-cells = <1>; 49*4882a593Smuzhiyun #size-cells = <1>; 50*4882a593Smuzhiyun device_type = "soc"; 51*4882a593Smuzhiyun compatible = "simple-bus"; 52*4882a593Smuzhiyun ranges = <0x0 0xe0000000 0x00100000>; 53*4882a593Smuzhiyun reg = <0xe0000000 0x00000200>; 54*4882a593Smuzhiyun bus-frequency = <0>; // from bootloader 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun wdt@200 { 57*4882a593Smuzhiyun device_type = "watchdog"; 58*4882a593Smuzhiyun compatible = "mpc83xx_wdt"; 59*4882a593Smuzhiyun reg = <0x200 0x100>; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun gpio1: gpio-controller@c00 { 63*4882a593Smuzhiyun #gpio-cells = <2>; 64*4882a593Smuzhiyun compatible = "fsl,mpc8349-gpio"; 65*4882a593Smuzhiyun reg = <0xc00 0x100>; 66*4882a593Smuzhiyun interrupts = <74 0x8>; 67*4882a593Smuzhiyun interrupt-parent = <&ipic>; 68*4882a593Smuzhiyun gpio-controller; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun gpio2: gpio-controller@d00 { 72*4882a593Smuzhiyun #gpio-cells = <2>; 73*4882a593Smuzhiyun compatible = "fsl,mpc8349-gpio"; 74*4882a593Smuzhiyun reg = <0xd00 0x100>; 75*4882a593Smuzhiyun interrupts = <75 0x8>; 76*4882a593Smuzhiyun interrupt-parent = <&ipic>; 77*4882a593Smuzhiyun gpio-controller; 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun i2c@3000 { 81*4882a593Smuzhiyun #address-cells = <1>; 82*4882a593Smuzhiyun #size-cells = <0>; 83*4882a593Smuzhiyun cell-index = <0>; 84*4882a593Smuzhiyun compatible = "fsl-i2c"; 85*4882a593Smuzhiyun reg = <0x3000 0x100>; 86*4882a593Smuzhiyun interrupts = <14 0x8>; 87*4882a593Smuzhiyun interrupt-parent = <&ipic>; 88*4882a593Smuzhiyun dfsrr; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun eeprom: at24@50 { 91*4882a593Smuzhiyun compatible = "st,24c256", "atmel,24c256"; 92*4882a593Smuzhiyun reg = <0x50>; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun i2c@3100 { 98*4882a593Smuzhiyun #address-cells = <1>; 99*4882a593Smuzhiyun #size-cells = <0>; 100*4882a593Smuzhiyun cell-index = <1>; 101*4882a593Smuzhiyun compatible = "fsl-i2c"; 102*4882a593Smuzhiyun reg = <0x3100 0x100>; 103*4882a593Smuzhiyun interrupts = <15 0x8>; 104*4882a593Smuzhiyun interrupt-parent = <&ipic>; 105*4882a593Smuzhiyun dfsrr; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun rtc@68 { 108*4882a593Smuzhiyun compatible = "dallas,ds1339"; 109*4882a593Smuzhiyun reg = <0x68>; 110*4882a593Smuzhiyun interrupts = <18 0x8>; 111*4882a593Smuzhiyun interrupt-parent = <&ipic>; 112*4882a593Smuzhiyun }; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun pcf1: iexp@38 { 115*4882a593Smuzhiyun #gpio-cells = <2>; 116*4882a593Smuzhiyun compatible = "ti,pcf8574a"; 117*4882a593Smuzhiyun reg = <0x38>; 118*4882a593Smuzhiyun gpio-controller; 119*4882a593Smuzhiyun }; 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun pcf2: iexp@39 { 122*4882a593Smuzhiyun #gpio-cells = <2>; 123*4882a593Smuzhiyun compatible = "ti,pcf8574a"; 124*4882a593Smuzhiyun reg = <0x39>; 125*4882a593Smuzhiyun gpio-controller; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun spd: at24@51 { 129*4882a593Smuzhiyun compatible = "atmel,spd"; 130*4882a593Smuzhiyun reg = <0x51>; 131*4882a593Smuzhiyun }; 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun mcu_pio: mcu@a { 134*4882a593Smuzhiyun #gpio-cells = <2>; 135*4882a593Smuzhiyun compatible = "fsl,mc9s08qg8-mpc8349emitx", 136*4882a593Smuzhiyun "fsl,mcu-mpc8349emitx"; 137*4882a593Smuzhiyun reg = <0x0a>; 138*4882a593Smuzhiyun gpio-controller; 139*4882a593Smuzhiyun }; 140*4882a593Smuzhiyun }; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun spi@7000 { 143*4882a593Smuzhiyun cell-index = <0>; 144*4882a593Smuzhiyun compatible = "fsl,spi"; 145*4882a593Smuzhiyun reg = <0x7000 0x1000>; 146*4882a593Smuzhiyun interrupts = <16 0x8>; 147*4882a593Smuzhiyun interrupt-parent = <&ipic>; 148*4882a593Smuzhiyun mode = "cpu"; 149*4882a593Smuzhiyun }; 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun dma@82a8 { 152*4882a593Smuzhiyun #address-cells = <1>; 153*4882a593Smuzhiyun #size-cells = <1>; 154*4882a593Smuzhiyun compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; 155*4882a593Smuzhiyun reg = <0x82a8 4>; 156*4882a593Smuzhiyun ranges = <0 0x8100 0x1a8>; 157*4882a593Smuzhiyun interrupt-parent = <&ipic>; 158*4882a593Smuzhiyun interrupts = <71 8>; 159*4882a593Smuzhiyun cell-index = <0>; 160*4882a593Smuzhiyun dma-channel@0 { 161*4882a593Smuzhiyun compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 162*4882a593Smuzhiyun reg = <0 0x80>; 163*4882a593Smuzhiyun cell-index = <0>; 164*4882a593Smuzhiyun interrupt-parent = <&ipic>; 165*4882a593Smuzhiyun interrupts = <71 8>; 166*4882a593Smuzhiyun }; 167*4882a593Smuzhiyun dma-channel@80 { 168*4882a593Smuzhiyun compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 169*4882a593Smuzhiyun reg = <0x80 0x80>; 170*4882a593Smuzhiyun cell-index = <1>; 171*4882a593Smuzhiyun interrupt-parent = <&ipic>; 172*4882a593Smuzhiyun interrupts = <71 8>; 173*4882a593Smuzhiyun }; 174*4882a593Smuzhiyun dma-channel@100 { 175*4882a593Smuzhiyun compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 176*4882a593Smuzhiyun reg = <0x100 0x80>; 177*4882a593Smuzhiyun cell-index = <2>; 178*4882a593Smuzhiyun interrupt-parent = <&ipic>; 179*4882a593Smuzhiyun interrupts = <71 8>; 180*4882a593Smuzhiyun }; 181*4882a593Smuzhiyun dma-channel@180 { 182*4882a593Smuzhiyun compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 183*4882a593Smuzhiyun reg = <0x180 0x28>; 184*4882a593Smuzhiyun cell-index = <3>; 185*4882a593Smuzhiyun interrupt-parent = <&ipic>; 186*4882a593Smuzhiyun interrupts = <71 8>; 187*4882a593Smuzhiyun }; 188*4882a593Smuzhiyun }; 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun usb@22000 { 191*4882a593Smuzhiyun compatible = "fsl-usb2-mph"; 192*4882a593Smuzhiyun reg = <0x22000 0x1000>; 193*4882a593Smuzhiyun #address-cells = <1>; 194*4882a593Smuzhiyun #size-cells = <0>; 195*4882a593Smuzhiyun interrupt-parent = <&ipic>; 196*4882a593Smuzhiyun interrupts = <39 0x8>; 197*4882a593Smuzhiyun phy_type = "ulpi"; 198*4882a593Smuzhiyun port0; 199*4882a593Smuzhiyun }; 200*4882a593Smuzhiyun 201*4882a593Smuzhiyun usb@23000 { 202*4882a593Smuzhiyun compatible = "fsl-usb2-dr"; 203*4882a593Smuzhiyun reg = <0x23000 0x1000>; 204*4882a593Smuzhiyun #address-cells = <1>; 205*4882a593Smuzhiyun #size-cells = <0>; 206*4882a593Smuzhiyun interrupt-parent = <&ipic>; 207*4882a593Smuzhiyun interrupts = <38 0x8>; 208*4882a593Smuzhiyun dr_mode = "peripheral"; 209*4882a593Smuzhiyun phy_type = "ulpi"; 210*4882a593Smuzhiyun }; 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun enet0: ethernet@24000 { 213*4882a593Smuzhiyun #address-cells = <1>; 214*4882a593Smuzhiyun #size-cells = <1>; 215*4882a593Smuzhiyun cell-index = <0>; 216*4882a593Smuzhiyun device_type = "network"; 217*4882a593Smuzhiyun model = "TSEC"; 218*4882a593Smuzhiyun compatible = "gianfar"; 219*4882a593Smuzhiyun reg = <0x24000 0x1000>; 220*4882a593Smuzhiyun ranges = <0x0 0x24000 0x1000>; 221*4882a593Smuzhiyun local-mac-address = [ 00 00 00 00 00 00 ]; 222*4882a593Smuzhiyun interrupts = <32 0x8 33 0x8 34 0x8>; 223*4882a593Smuzhiyun interrupt-parent = <&ipic>; 224*4882a593Smuzhiyun tbi-handle = <&tbi0>; 225*4882a593Smuzhiyun phy-handle = <&phy1c>; 226*4882a593Smuzhiyun linux,network-index = <0>; 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun mdio@520 { 229*4882a593Smuzhiyun #address-cells = <1>; 230*4882a593Smuzhiyun #size-cells = <0>; 231*4882a593Smuzhiyun compatible = "fsl,gianfar-mdio"; 232*4882a593Smuzhiyun reg = <0x520 0x20>; 233*4882a593Smuzhiyun 234*4882a593Smuzhiyun /* Vitesse 8201 */ 235*4882a593Smuzhiyun phy1c: ethernet-phy@1c { 236*4882a593Smuzhiyun interrupt-parent = <&ipic>; 237*4882a593Smuzhiyun interrupts = <18 0x8>; 238*4882a593Smuzhiyun reg = <0x1c>; 239*4882a593Smuzhiyun }; 240*4882a593Smuzhiyun 241*4882a593Smuzhiyun tbi0: tbi-phy@11 { 242*4882a593Smuzhiyun reg = <0x11>; 243*4882a593Smuzhiyun device_type = "tbi-phy"; 244*4882a593Smuzhiyun }; 245*4882a593Smuzhiyun }; 246*4882a593Smuzhiyun }; 247*4882a593Smuzhiyun 248*4882a593Smuzhiyun enet1: ethernet@25000 { 249*4882a593Smuzhiyun #address-cells = <1>; 250*4882a593Smuzhiyun #size-cells = <1>; 251*4882a593Smuzhiyun cell-index = <1>; 252*4882a593Smuzhiyun device_type = "network"; 253*4882a593Smuzhiyun model = "TSEC"; 254*4882a593Smuzhiyun compatible = "gianfar"; 255*4882a593Smuzhiyun reg = <0x25000 0x1000>; 256*4882a593Smuzhiyun ranges = <0x0 0x25000 0x1000>; 257*4882a593Smuzhiyun local-mac-address = [ 00 00 00 00 00 00 ]; 258*4882a593Smuzhiyun interrupts = <35 0x8 36 0x8 37 0x8>; 259*4882a593Smuzhiyun interrupt-parent = <&ipic>; 260*4882a593Smuzhiyun /* Vitesse 7385 isn't on the MDIO bus */ 261*4882a593Smuzhiyun fixed-link = <1 1 1000 0 0>; 262*4882a593Smuzhiyun linux,network-index = <1>; 263*4882a593Smuzhiyun tbi-handle = <&tbi1>; 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun mdio@520 { 266*4882a593Smuzhiyun #address-cells = <1>; 267*4882a593Smuzhiyun #size-cells = <0>; 268*4882a593Smuzhiyun compatible = "fsl,gianfar-tbi"; 269*4882a593Smuzhiyun reg = <0x520 0x20>; 270*4882a593Smuzhiyun 271*4882a593Smuzhiyun tbi1: tbi-phy@11 { 272*4882a593Smuzhiyun reg = <0x11>; 273*4882a593Smuzhiyun device_type = "tbi-phy"; 274*4882a593Smuzhiyun }; 275*4882a593Smuzhiyun }; 276*4882a593Smuzhiyun }; 277*4882a593Smuzhiyun 278*4882a593Smuzhiyun serial0: serial@4500 { 279*4882a593Smuzhiyun cell-index = <0>; 280*4882a593Smuzhiyun device_type = "serial"; 281*4882a593Smuzhiyun compatible = "fsl,ns16550", "ns16550"; 282*4882a593Smuzhiyun reg = <0x4500 0x100>; 283*4882a593Smuzhiyun clock-frequency = <0>; // from bootloader 284*4882a593Smuzhiyun interrupts = <9 0x8>; 285*4882a593Smuzhiyun interrupt-parent = <&ipic>; 286*4882a593Smuzhiyun }; 287*4882a593Smuzhiyun 288*4882a593Smuzhiyun serial1: serial@4600 { 289*4882a593Smuzhiyun cell-index = <1>; 290*4882a593Smuzhiyun device_type = "serial"; 291*4882a593Smuzhiyun compatible = "fsl,ns16550", "ns16550"; 292*4882a593Smuzhiyun reg = <0x4600 0x100>; 293*4882a593Smuzhiyun clock-frequency = <0>; // from bootloader 294*4882a593Smuzhiyun interrupts = <10 0x8>; 295*4882a593Smuzhiyun interrupt-parent = <&ipic>; 296*4882a593Smuzhiyun }; 297*4882a593Smuzhiyun 298*4882a593Smuzhiyun crypto@30000 { 299*4882a593Smuzhiyun compatible = "fsl,sec2.0"; 300*4882a593Smuzhiyun reg = <0x30000 0x10000>; 301*4882a593Smuzhiyun interrupts = <11 0x8>; 302*4882a593Smuzhiyun interrupt-parent = <&ipic>; 303*4882a593Smuzhiyun fsl,num-channels = <4>; 304*4882a593Smuzhiyun fsl,channel-fifo-len = <24>; 305*4882a593Smuzhiyun fsl,exec-units-mask = <0x7e>; 306*4882a593Smuzhiyun fsl,descriptor-types-mask = <0x01010ebf>; 307*4882a593Smuzhiyun }; 308*4882a593Smuzhiyun 309*4882a593Smuzhiyun ipic: pic@700 { 310*4882a593Smuzhiyun interrupt-controller; 311*4882a593Smuzhiyun #address-cells = <0>; 312*4882a593Smuzhiyun #interrupt-cells = <2>; 313*4882a593Smuzhiyun reg = <0x700 0x100>; 314*4882a593Smuzhiyun device_type = "ipic"; 315*4882a593Smuzhiyun }; 316*4882a593Smuzhiyun 317*4882a593Smuzhiyun gpio-leds { 318*4882a593Smuzhiyun compatible = "gpio-leds"; 319*4882a593Smuzhiyun 320*4882a593Smuzhiyun green { 321*4882a593Smuzhiyun label = "Green"; 322*4882a593Smuzhiyun gpios = <&pcf1 0 1>; 323*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 324*4882a593Smuzhiyun }; 325*4882a593Smuzhiyun 326*4882a593Smuzhiyun yellow { 327*4882a593Smuzhiyun label = "Yellow"; 328*4882a593Smuzhiyun gpios = <&pcf1 1 1>; 329*4882a593Smuzhiyun /* linux,default-trigger = "heartbeat"; */ 330*4882a593Smuzhiyun default-state = "on"; 331*4882a593Smuzhiyun }; 332*4882a593Smuzhiyun }; 333*4882a593Smuzhiyun 334*4882a593Smuzhiyun }; 335*4882a593Smuzhiyun 336*4882a593Smuzhiyun pci0: pci@e0008500 { 337*4882a593Smuzhiyun interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 338*4882a593Smuzhiyun interrupt-map = < 339*4882a593Smuzhiyun /* IDSEL 0x10 - SATA */ 340*4882a593Smuzhiyun 0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */ 341*4882a593Smuzhiyun >; 342*4882a593Smuzhiyun interrupt-parent = <&ipic>; 343*4882a593Smuzhiyun interrupts = <66 0x8>; 344*4882a593Smuzhiyun bus-range = <0x0 0x0>; 345*4882a593Smuzhiyun ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 346*4882a593Smuzhiyun 0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 347*4882a593Smuzhiyun 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>; 348*4882a593Smuzhiyun clock-frequency = <66666666>; 349*4882a593Smuzhiyun #interrupt-cells = <1>; 350*4882a593Smuzhiyun #size-cells = <2>; 351*4882a593Smuzhiyun #address-cells = <3>; 352*4882a593Smuzhiyun reg = <0xe0008500 0x100 /* internal registers */ 353*4882a593Smuzhiyun 0xe0008300 0x8>; /* config space access registers */ 354*4882a593Smuzhiyun compatible = "fsl,mpc8349-pci"; 355*4882a593Smuzhiyun device_type = "pci"; 356*4882a593Smuzhiyun }; 357*4882a593Smuzhiyun 358*4882a593Smuzhiyun pci1: pci@e0008600 { 359*4882a593Smuzhiyun interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 360*4882a593Smuzhiyun interrupt-map = < 361*4882a593Smuzhiyun /* IDSEL 0x0E - MiniPCI Slot */ 362*4882a593Smuzhiyun 0x7000 0x0 0x0 0x1 &ipic 21 0x8 /* PCI_INTA */ 363*4882a593Smuzhiyun 364*4882a593Smuzhiyun /* IDSEL 0x0F - PCI Slot */ 365*4882a593Smuzhiyun 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */ 366*4882a593Smuzhiyun 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */ 367*4882a593Smuzhiyun >; 368*4882a593Smuzhiyun interrupt-parent = <&ipic>; 369*4882a593Smuzhiyun interrupts = <67 0x8>; 370*4882a593Smuzhiyun bus-range = <0x0 0x0>; 371*4882a593Smuzhiyun ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 372*4882a593Smuzhiyun 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000 373*4882a593Smuzhiyun 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>; 374*4882a593Smuzhiyun clock-frequency = <66666666>; 375*4882a593Smuzhiyun #interrupt-cells = <1>; 376*4882a593Smuzhiyun #size-cells = <2>; 377*4882a593Smuzhiyun #address-cells = <3>; 378*4882a593Smuzhiyun reg = <0xe0008600 0x100 /* internal registers */ 379*4882a593Smuzhiyun 0xe0008380 0x8>; /* config space access registers */ 380*4882a593Smuzhiyun compatible = "fsl,mpc8349-pci"; 381*4882a593Smuzhiyun device_type = "pci"; 382*4882a593Smuzhiyun }; 383*4882a593Smuzhiyun 384*4882a593Smuzhiyun localbus@e0005000 { 385*4882a593Smuzhiyun #address-cells = <2>; 386*4882a593Smuzhiyun #size-cells = <1>; 387*4882a593Smuzhiyun compatible = "fsl,mpc8349e-localbus", 388*4882a593Smuzhiyun "fsl,pq2pro-localbus", 389*4882a593Smuzhiyun "simple-bus"; 390*4882a593Smuzhiyun reg = <0xe0005000 0xd8>; 391*4882a593Smuzhiyun ranges = <0x0 0x0 0xfe000000 0x1000000 /* flash */ 392*4882a593Smuzhiyun 0x1 0x0 0xf8000000 0x20000 /* VSC 7385 */ 393*4882a593Smuzhiyun 0x2 0x0 0xf9000000 0x200000 /* exp slot */ 394*4882a593Smuzhiyun 0x3 0x0 0xf0000000 0x210>; /* CF slot */ 395*4882a593Smuzhiyun 396*4882a593Smuzhiyun flash@0,0 { 397*4882a593Smuzhiyun compatible = "cfi-flash"; 398*4882a593Smuzhiyun reg = <0x0 0x0 0x800000>; 399*4882a593Smuzhiyun bank-width = <2>; 400*4882a593Smuzhiyun device-width = <1>; 401*4882a593Smuzhiyun }; 402*4882a593Smuzhiyun 403*4882a593Smuzhiyun flash@0,800000 { 404*4882a593Smuzhiyun #address-cells = <1>; 405*4882a593Smuzhiyun #size-cells = <1>; 406*4882a593Smuzhiyun compatible = "cfi-flash"; 407*4882a593Smuzhiyun reg = <0x0 0x800000 0x800000>; 408*4882a593Smuzhiyun bank-width = <2>; 409*4882a593Smuzhiyun device-width = <1>; 410*4882a593Smuzhiyun }; 411*4882a593Smuzhiyun 412*4882a593Smuzhiyun pata@3,0 { 413*4882a593Smuzhiyun compatible = "fsl,mpc8349emitx-pata", "ata-generic"; 414*4882a593Smuzhiyun reg = <0x3 0x0 0x10 0x3 0x20c 0x4>; 415*4882a593Smuzhiyun reg-shift = <1>; 416*4882a593Smuzhiyun pio-mode = <6>; 417*4882a593Smuzhiyun interrupts = <23 0x8>; 418*4882a593Smuzhiyun interrupt-parent = <&ipic>; 419*4882a593Smuzhiyun }; 420*4882a593Smuzhiyun }; 421*4882a593Smuzhiyun}; 422