1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Device Tree Source for Emerson KSI8560 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Author: Alexandr Smirnov <asmirnov@ru.mvista.com> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Based on mpc8560ads.dts 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * 2008 (c) MontaVista, Software, Inc. This file is licensed under 9*4882a593Smuzhiyun * the terms of the GNU General Public License version 2. This program 10*4882a593Smuzhiyun * is licensed "as is" without any warranty of any kind, whether express 11*4882a593Smuzhiyun * or implied. 12*4882a593Smuzhiyun * 13*4882a593Smuzhiyun */ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun/dts-v1/; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun/ { 18*4882a593Smuzhiyun model = "KSI8560"; 19*4882a593Smuzhiyun compatible = "emerson,KSI8560"; 20*4882a593Smuzhiyun #address-cells = <1>; 21*4882a593Smuzhiyun #size-cells = <1>; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun aliases { 24*4882a593Smuzhiyun ethernet0 = &enet0; 25*4882a593Smuzhiyun ethernet1 = &enet1; 26*4882a593Smuzhiyun ethernet2 = &enet2; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun cpus { 30*4882a593Smuzhiyun #address-cells = <1>; 31*4882a593Smuzhiyun #size-cells = <0>; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun PowerPC,8560@0 { 34*4882a593Smuzhiyun device_type = "cpu"; 35*4882a593Smuzhiyun reg = <0>; 36*4882a593Smuzhiyun d-cache-line-size = <32>; 37*4882a593Smuzhiyun i-cache-line-size = <32>; 38*4882a593Smuzhiyun d-cache-size = <0x8000>; /* L1, 32K */ 39*4882a593Smuzhiyun i-cache-size = <0x8000>; /* L1, 32K */ 40*4882a593Smuzhiyun timebase-frequency = <0>; /* From U-boot */ 41*4882a593Smuzhiyun bus-frequency = <0>; /* From U-boot */ 42*4882a593Smuzhiyun clock-frequency = <0>; /* From U-boot */ 43*4882a593Smuzhiyun next-level-cache = <&L2>; 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun memory { 48*4882a593Smuzhiyun device_type = "memory"; 49*4882a593Smuzhiyun reg = <0x00000000 0x10000000>; /* Fixed by bootwrapper */ 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun soc@fdf00000 { 53*4882a593Smuzhiyun #address-cells = <1>; 54*4882a593Smuzhiyun #size-cells = <1>; 55*4882a593Smuzhiyun device_type = "soc"; 56*4882a593Smuzhiyun ranges = <0x00000000 0xfdf00000 0x00100000>; 57*4882a593Smuzhiyun bus-frequency = <0>; /* Fixed by bootwrapper */ 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun ecm-law@0 { 60*4882a593Smuzhiyun compatible = "fsl,ecm-law"; 61*4882a593Smuzhiyun reg = <0x0 0x1000>; 62*4882a593Smuzhiyun fsl,num-laws = <8>; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun ecm@1000 { 66*4882a593Smuzhiyun compatible = "fsl,mpc8560-ecm", "fsl,ecm"; 67*4882a593Smuzhiyun reg = <0x1000 0x1000>; 68*4882a593Smuzhiyun interrupts = <17 2>; 69*4882a593Smuzhiyun interrupt-parent = <&mpic>; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun memory-controller@2000 { 73*4882a593Smuzhiyun compatible = "fsl,mpc8540-memory-controller"; 74*4882a593Smuzhiyun reg = <0x2000 0x1000>; 75*4882a593Smuzhiyun interrupt-parent = <&mpic>; 76*4882a593Smuzhiyun interrupts = <0x12 0x2>; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun L2: l2-cache-controller@20000 { 80*4882a593Smuzhiyun compatible = "fsl,mpc8540-l2-cache-controller"; 81*4882a593Smuzhiyun reg = <0x20000 0x1000>; 82*4882a593Smuzhiyun cache-line-size = <0x20>; /* 32 bytes */ 83*4882a593Smuzhiyun cache-size = <0x40000>; /* L2, 256K */ 84*4882a593Smuzhiyun interrupt-parent = <&mpic>; 85*4882a593Smuzhiyun interrupts = <0x10 0x2>; 86*4882a593Smuzhiyun }; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun i2c@3000 { 89*4882a593Smuzhiyun #address-cells = <1>; 90*4882a593Smuzhiyun #size-cells = <0>; 91*4882a593Smuzhiyun cell-index = <0>; 92*4882a593Smuzhiyun compatible = "fsl-i2c"; 93*4882a593Smuzhiyun reg = <0x3000 0x100>; 94*4882a593Smuzhiyun interrupts = <0x2b 0x2>; 95*4882a593Smuzhiyun interrupt-parent = <&mpic>; 96*4882a593Smuzhiyun dfsrr; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun dma@21300 { 100*4882a593Smuzhiyun #address-cells = <1>; 101*4882a593Smuzhiyun #size-cells = <1>; 102*4882a593Smuzhiyun compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; 103*4882a593Smuzhiyun reg = <0x21300 0x4>; 104*4882a593Smuzhiyun ranges = <0x0 0x21100 0x200>; 105*4882a593Smuzhiyun cell-index = <0>; 106*4882a593Smuzhiyun dma-channel@0 { 107*4882a593Smuzhiyun compatible = "fsl,mpc8560-dma-channel", 108*4882a593Smuzhiyun "fsl,eloplus-dma-channel"; 109*4882a593Smuzhiyun reg = <0x0 0x80>; 110*4882a593Smuzhiyun cell-index = <0>; 111*4882a593Smuzhiyun interrupt-parent = <&mpic>; 112*4882a593Smuzhiyun interrupts = <20 2>; 113*4882a593Smuzhiyun }; 114*4882a593Smuzhiyun dma-channel@80 { 115*4882a593Smuzhiyun compatible = "fsl,mpc8560-dma-channel", 116*4882a593Smuzhiyun "fsl,eloplus-dma-channel"; 117*4882a593Smuzhiyun reg = <0x80 0x80>; 118*4882a593Smuzhiyun cell-index = <1>; 119*4882a593Smuzhiyun interrupt-parent = <&mpic>; 120*4882a593Smuzhiyun interrupts = <21 2>; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun dma-channel@100 { 123*4882a593Smuzhiyun compatible = "fsl,mpc8560-dma-channel", 124*4882a593Smuzhiyun "fsl,eloplus-dma-channel"; 125*4882a593Smuzhiyun reg = <0x100 0x80>; 126*4882a593Smuzhiyun cell-index = <2>; 127*4882a593Smuzhiyun interrupt-parent = <&mpic>; 128*4882a593Smuzhiyun interrupts = <22 2>; 129*4882a593Smuzhiyun }; 130*4882a593Smuzhiyun dma-channel@180 { 131*4882a593Smuzhiyun compatible = "fsl,mpc8560-dma-channel", 132*4882a593Smuzhiyun "fsl,eloplus-dma-channel"; 133*4882a593Smuzhiyun reg = <0x180 0x80>; 134*4882a593Smuzhiyun cell-index = <3>; 135*4882a593Smuzhiyun interrupt-parent = <&mpic>; 136*4882a593Smuzhiyun interrupts = <23 2>; 137*4882a593Smuzhiyun }; 138*4882a593Smuzhiyun }; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun enet0: ethernet@24000 { 141*4882a593Smuzhiyun #address-cells = <1>; 142*4882a593Smuzhiyun #size-cells = <1>; 143*4882a593Smuzhiyun device_type = "network"; 144*4882a593Smuzhiyun model = "TSEC"; 145*4882a593Smuzhiyun compatible = "gianfar"; 146*4882a593Smuzhiyun reg = <0x24000 0x1000>; 147*4882a593Smuzhiyun ranges = <0x0 0x24000 0x1000>; 148*4882a593Smuzhiyun /* Mac address filled in by bootwrapper */ 149*4882a593Smuzhiyun local-mac-address = [ 00 00 00 00 00 00 ]; 150*4882a593Smuzhiyun interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; 151*4882a593Smuzhiyun interrupt-parent = <&mpic>; 152*4882a593Smuzhiyun tbi-handle = <&tbi0>; 153*4882a593Smuzhiyun phy-handle = <&PHY1>; 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun mdio@520 { /* For TSECs */ 156*4882a593Smuzhiyun #address-cells = <1>; 157*4882a593Smuzhiyun #size-cells = <0>; 158*4882a593Smuzhiyun compatible = "fsl,gianfar-mdio"; 159*4882a593Smuzhiyun reg = <0x520 0x20>; 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun PHY1: ethernet-phy@1 { 162*4882a593Smuzhiyun interrupt-parent = <&mpic>; 163*4882a593Smuzhiyun reg = <0x1>; 164*4882a593Smuzhiyun }; 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun PHY2: ethernet-phy@2 { 167*4882a593Smuzhiyun interrupt-parent = <&mpic>; 168*4882a593Smuzhiyun reg = <0x2>; 169*4882a593Smuzhiyun }; 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun tbi0: tbi-phy@11 { 172*4882a593Smuzhiyun reg = <0x11>; 173*4882a593Smuzhiyun device_type = "tbi-phy"; 174*4882a593Smuzhiyun }; 175*4882a593Smuzhiyun }; 176*4882a593Smuzhiyun }; 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun enet1: ethernet@25000 { 179*4882a593Smuzhiyun #address-cells = <1>; 180*4882a593Smuzhiyun #size-cells = <1>; 181*4882a593Smuzhiyun device_type = "network"; 182*4882a593Smuzhiyun model = "TSEC"; 183*4882a593Smuzhiyun compatible = "gianfar"; 184*4882a593Smuzhiyun reg = <0x25000 0x1000>; 185*4882a593Smuzhiyun ranges = <0x0 0x25000 0x1000>; 186*4882a593Smuzhiyun /* Mac address filled in by bootwrapper */ 187*4882a593Smuzhiyun local-mac-address = [ 00 00 00 00 00 00 ]; 188*4882a593Smuzhiyun interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>; 189*4882a593Smuzhiyun interrupt-parent = <&mpic>; 190*4882a593Smuzhiyun tbi-handle = <&tbi1>; 191*4882a593Smuzhiyun phy-handle = <&PHY2>; 192*4882a593Smuzhiyun 193*4882a593Smuzhiyun mdio@520 { 194*4882a593Smuzhiyun #address-cells = <1>; 195*4882a593Smuzhiyun #size-cells = <0>; 196*4882a593Smuzhiyun compatible = "fsl,gianfar-tbi"; 197*4882a593Smuzhiyun reg = <0x520 0x20>; 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun tbi1: tbi-phy@11 { 200*4882a593Smuzhiyun reg = <0x11>; 201*4882a593Smuzhiyun device_type = "tbi-phy"; 202*4882a593Smuzhiyun }; 203*4882a593Smuzhiyun }; 204*4882a593Smuzhiyun }; 205*4882a593Smuzhiyun 206*4882a593Smuzhiyun mpic: pic@40000 { 207*4882a593Smuzhiyun #address-cells = <0>; 208*4882a593Smuzhiyun #interrupt-cells = <2>; 209*4882a593Smuzhiyun interrupt-controller; 210*4882a593Smuzhiyun reg = <0x40000 0x40000>; 211*4882a593Smuzhiyun device_type = "open-pic"; 212*4882a593Smuzhiyun }; 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun cpm@919c0 { 215*4882a593Smuzhiyun #address-cells = <1>; 216*4882a593Smuzhiyun #size-cells = <1>; 217*4882a593Smuzhiyun compatible = "fsl,mpc8560-cpm", "fsl,cpm2"; 218*4882a593Smuzhiyun reg = <0x919c0 0x30>; 219*4882a593Smuzhiyun ranges; 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun muram@80000 { 222*4882a593Smuzhiyun #address-cells = <1>; 223*4882a593Smuzhiyun #size-cells = <1>; 224*4882a593Smuzhiyun ranges = <0x0 0x80000 0x10000>; 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun data@0 { 227*4882a593Smuzhiyun compatible = "fsl,cpm-muram-data"; 228*4882a593Smuzhiyun reg = <0x0 0x4000 0x9000 0x2000>; 229*4882a593Smuzhiyun }; 230*4882a593Smuzhiyun }; 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun brg@919f0 { 233*4882a593Smuzhiyun compatible = "fsl,mpc8560-brg", 234*4882a593Smuzhiyun "fsl,cpm2-brg", 235*4882a593Smuzhiyun "fsl,cpm-brg"; 236*4882a593Smuzhiyun reg = <0x919f0 0x10 0x915f0 0x10>; 237*4882a593Smuzhiyun clock-frequency = <165000000>; /* 166MHz */ 238*4882a593Smuzhiyun }; 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun CPMPIC: pic@90c00 { 241*4882a593Smuzhiyun #address-cells = <0>; 242*4882a593Smuzhiyun #interrupt-cells = <2>; 243*4882a593Smuzhiyun interrupt-controller; 244*4882a593Smuzhiyun interrupts = <0x2e 0x2>; 245*4882a593Smuzhiyun interrupt-parent = <&mpic>; 246*4882a593Smuzhiyun reg = <0x90c00 0x80>; 247*4882a593Smuzhiyun compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; 248*4882a593Smuzhiyun }; 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun serial@91a00 { 251*4882a593Smuzhiyun device_type = "serial"; 252*4882a593Smuzhiyun compatible = "fsl,mpc8560-scc-uart", 253*4882a593Smuzhiyun "fsl,cpm2-scc-uart"; 254*4882a593Smuzhiyun reg = <0x91a00 0x20 0x88000 0x100>; 255*4882a593Smuzhiyun fsl,cpm-brg = <1>; 256*4882a593Smuzhiyun fsl,cpm-command = <0x800000>; 257*4882a593Smuzhiyun current-speed = <0x1c200>; 258*4882a593Smuzhiyun interrupts = <0x28 0x8>; 259*4882a593Smuzhiyun interrupt-parent = <&CPMPIC>; 260*4882a593Smuzhiyun }; 261*4882a593Smuzhiyun 262*4882a593Smuzhiyun serial@91a20 { 263*4882a593Smuzhiyun device_type = "serial"; 264*4882a593Smuzhiyun compatible = "fsl,mpc8560-scc-uart", 265*4882a593Smuzhiyun "fsl,cpm2-scc-uart"; 266*4882a593Smuzhiyun reg = <0x91a20 0x20 0x88100 0x100>; 267*4882a593Smuzhiyun fsl,cpm-brg = <2>; 268*4882a593Smuzhiyun fsl,cpm-command = <0x4a00000>; 269*4882a593Smuzhiyun current-speed = <0x1c200>; 270*4882a593Smuzhiyun interrupts = <0x29 0x8>; 271*4882a593Smuzhiyun interrupt-parent = <&CPMPIC>; 272*4882a593Smuzhiyun }; 273*4882a593Smuzhiyun 274*4882a593Smuzhiyun mdio@90d00 { /* For FCCs */ 275*4882a593Smuzhiyun #address-cells = <1>; 276*4882a593Smuzhiyun #size-cells = <0>; 277*4882a593Smuzhiyun compatible = "fsl,cpm2-mdio-bitbang"; 278*4882a593Smuzhiyun reg = <0x90d00 0x14>; 279*4882a593Smuzhiyun fsl,mdio-pin = <24>; 280*4882a593Smuzhiyun fsl,mdc-pin = <25>; 281*4882a593Smuzhiyun 282*4882a593Smuzhiyun PHY0: ethernet-phy@0 { 283*4882a593Smuzhiyun interrupt-parent = <&mpic>; 284*4882a593Smuzhiyun reg = <0x0>; 285*4882a593Smuzhiyun }; 286*4882a593Smuzhiyun }; 287*4882a593Smuzhiyun 288*4882a593Smuzhiyun enet2: ethernet@91300 { 289*4882a593Smuzhiyun device_type = "network"; 290*4882a593Smuzhiyun compatible = "fsl,mpc8560-fcc-enet", 291*4882a593Smuzhiyun "fsl,cpm2-fcc-enet"; 292*4882a593Smuzhiyun reg = <0x91300 0x20 0x88400 0x100 0x91390 0x1>; 293*4882a593Smuzhiyun /* Mac address filled in by bootwrapper */ 294*4882a593Smuzhiyun local-mac-address = [ 00 00 00 00 00 00 ]; 295*4882a593Smuzhiyun fsl,cpm-command = <0x12000300>; 296*4882a593Smuzhiyun interrupts = <0x20 0x8>; 297*4882a593Smuzhiyun interrupt-parent = <&CPMPIC>; 298*4882a593Smuzhiyun phy-handle = <&PHY0>; 299*4882a593Smuzhiyun }; 300*4882a593Smuzhiyun }; 301*4882a593Smuzhiyun }; 302*4882a593Smuzhiyun 303*4882a593Smuzhiyun localbus@fdf05000 { 304*4882a593Smuzhiyun #address-cells = <2>; 305*4882a593Smuzhiyun #size-cells = <1>; 306*4882a593Smuzhiyun compatible = "fsl,mpc8560-localbus", "simple-bus"; 307*4882a593Smuzhiyun reg = <0xfdf05000 0x68>; 308*4882a593Smuzhiyun 309*4882a593Smuzhiyun ranges = <0x0 0x0 0xe0000000 0x00800000 310*4882a593Smuzhiyun 0x4 0x0 0xe8080000 0x00080000>; 311*4882a593Smuzhiyun 312*4882a593Smuzhiyun flash@0,0 { 313*4882a593Smuzhiyun #address-cells = <1>; 314*4882a593Smuzhiyun #size-cells = <1>; 315*4882a593Smuzhiyun compatible = "jedec-flash"; 316*4882a593Smuzhiyun reg = <0x0 0x0 0x800000>; 317*4882a593Smuzhiyun bank-width = <0x2>; 318*4882a593Smuzhiyun 319*4882a593Smuzhiyun partition@0 { 320*4882a593Smuzhiyun label = "Primary Kernel"; 321*4882a593Smuzhiyun reg = <0x0 0x180000>; 322*4882a593Smuzhiyun }; 323*4882a593Smuzhiyun partition@180000 { 324*4882a593Smuzhiyun label = "Primary Filesystem"; 325*4882a593Smuzhiyun reg = <0x180000 0x580000>; 326*4882a593Smuzhiyun }; 327*4882a593Smuzhiyun partition@700000 { 328*4882a593Smuzhiyun label = "Monitor"; 329*4882a593Smuzhiyun reg = <0x300000 0x100000>; 330*4882a593Smuzhiyun read-only; 331*4882a593Smuzhiyun }; 332*4882a593Smuzhiyun }; 333*4882a593Smuzhiyun 334*4882a593Smuzhiyun cpld@4,0 { 335*4882a593Smuzhiyun compatible = "emerson,KSI8560-cpld"; 336*4882a593Smuzhiyun reg = <0x4 0x0 0x80000>; 337*4882a593Smuzhiyun }; 338*4882a593Smuzhiyun }; 339*4882a593Smuzhiyun 340*4882a593Smuzhiyun 341*4882a593Smuzhiyun chosen { 342*4882a593Smuzhiyun stdout-path = "/soc/cpm/serial@91a00"; 343*4882a593Smuzhiyun }; 344*4882a593Smuzhiyun}; 345