xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/powerpc/asp834x-redboot.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Analogue & Micro ASP8347 Device Tree Source
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2008 Codehermit
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun/ {
11*4882a593Smuzhiyun	model = "Analogue & Micro ASP8347E";
12*4882a593Smuzhiyun	compatible = "analogue-and-micro,asp8347e";
13*4882a593Smuzhiyun	#address-cells = <1>;
14*4882a593Smuzhiyun	#size-cells = <1>;
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun	aliases {
17*4882a593Smuzhiyun		ethernet0 = &enet0;
18*4882a593Smuzhiyun		ethernet1 = &enet1;
19*4882a593Smuzhiyun		serial0 = &serial0;
20*4882a593Smuzhiyun		serial1 = &serial1;
21*4882a593Smuzhiyun	};
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun	cpus {
24*4882a593Smuzhiyun		#address-cells = <1>;
25*4882a593Smuzhiyun		#size-cells = <0>;
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun		PowerPC,8347@0 {
28*4882a593Smuzhiyun			device_type = "cpu";
29*4882a593Smuzhiyun			reg = <0x0>;
30*4882a593Smuzhiyun			d-cache-line-size = <32>;
31*4882a593Smuzhiyun			i-cache-line-size = <32>;
32*4882a593Smuzhiyun			d-cache-size = <32768>;
33*4882a593Smuzhiyun			i-cache-size = <32768>;
34*4882a593Smuzhiyun			timebase-frequency = <0>;	// from bootloader
35*4882a593Smuzhiyun			bus-frequency = <0>;		// from bootloader
36*4882a593Smuzhiyun			clock-frequency = <0>;		// from bootloader
37*4882a593Smuzhiyun		};
38*4882a593Smuzhiyun	};
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun	memory {
41*4882a593Smuzhiyun		device_type = "memory";
42*4882a593Smuzhiyun		reg = <0x00000000 0x8000000>;	// 128MB at 0
43*4882a593Smuzhiyun	};
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun	localbus@ff005000 {
46*4882a593Smuzhiyun		#address-cells = <2>;
47*4882a593Smuzhiyun		#size-cells = <1>;
48*4882a593Smuzhiyun		compatible = "fsl,mpc8347e-localbus",
49*4882a593Smuzhiyun			     "fsl,pq2pro-localbus",
50*4882a593Smuzhiyun			     "simple-bus";
51*4882a593Smuzhiyun		reg = <0xff005000 0x1000>;
52*4882a593Smuzhiyun		interrupts = <77 0x8>;
53*4882a593Smuzhiyun		interrupt-parent = <&ipic>;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun		ranges = <
56*4882a593Smuzhiyun			0 0 0xf0000000 0x02000000
57*4882a593Smuzhiyun		>;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun		flash@0,0 {
60*4882a593Smuzhiyun			compatible = "cfi-flash";
61*4882a593Smuzhiyun			reg = <0 0 0x02000000>;
62*4882a593Smuzhiyun			bank-width = <2>;
63*4882a593Smuzhiyun			device-width = <2>;
64*4882a593Smuzhiyun		};
65*4882a593Smuzhiyun	};
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun	soc8349@ff000000 {
68*4882a593Smuzhiyun		#address-cells = <1>;
69*4882a593Smuzhiyun		#size-cells = <1>;
70*4882a593Smuzhiyun		device_type = "soc";
71*4882a593Smuzhiyun		ranges = <0x0 0xff000000 0x00100000>;
72*4882a593Smuzhiyun		reg = <0xff000000 0x00000200>;
73*4882a593Smuzhiyun		bus-frequency = <0>;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun		wdt@200 {
76*4882a593Smuzhiyun			device_type = "watchdog";
77*4882a593Smuzhiyun			compatible = "mpc83xx_wdt";
78*4882a593Smuzhiyun			reg = <0x200 0x100>;
79*4882a593Smuzhiyun		};
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun		i2c@3000 {
82*4882a593Smuzhiyun			#address-cells = <1>;
83*4882a593Smuzhiyun			#size-cells = <0>;
84*4882a593Smuzhiyun			cell-index = <0>;
85*4882a593Smuzhiyun			compatible = "fsl-i2c";
86*4882a593Smuzhiyun			reg = <0x3000 0x100>;
87*4882a593Smuzhiyun			interrupts = <14 0x8>;
88*4882a593Smuzhiyun			interrupt-parent = <&ipic>;
89*4882a593Smuzhiyun			dfsrr;
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun			rtc@68 {
92*4882a593Smuzhiyun				compatible = "dallas,ds1374";
93*4882a593Smuzhiyun				reg = <0x68>;
94*4882a593Smuzhiyun			};
95*4882a593Smuzhiyun		};
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun		i2c@3100 {
98*4882a593Smuzhiyun			#address-cells = <1>;
99*4882a593Smuzhiyun			#size-cells = <0>;
100*4882a593Smuzhiyun			cell-index = <1>;
101*4882a593Smuzhiyun			compatible = "fsl-i2c";
102*4882a593Smuzhiyun			reg = <0x3100 0x100>;
103*4882a593Smuzhiyun			interrupts = <15 0x8>;
104*4882a593Smuzhiyun			interrupt-parent = <&ipic>;
105*4882a593Smuzhiyun			dfsrr;
106*4882a593Smuzhiyun		};
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun		spi@7000 {
109*4882a593Smuzhiyun			cell-index = <0>;
110*4882a593Smuzhiyun			compatible = "fsl,spi";
111*4882a593Smuzhiyun			reg = <0x7000 0x1000>;
112*4882a593Smuzhiyun			interrupts = <16 0x8>;
113*4882a593Smuzhiyun			interrupt-parent = <&ipic>;
114*4882a593Smuzhiyun			mode = "cpu";
115*4882a593Smuzhiyun		};
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun		dma@82a8 {
118*4882a593Smuzhiyun			#address-cells = <1>;
119*4882a593Smuzhiyun			#size-cells = <1>;
120*4882a593Smuzhiyun			compatible = "fsl,mpc8347-dma", "fsl,elo-dma";
121*4882a593Smuzhiyun			reg = <0x82a8 4>;
122*4882a593Smuzhiyun			ranges = <0 0x8100 0x1a8>;
123*4882a593Smuzhiyun			interrupt-parent = <&ipic>;
124*4882a593Smuzhiyun			interrupts = <71 8>;
125*4882a593Smuzhiyun			cell-index = <0>;
126*4882a593Smuzhiyun			dma-channel@0 {
127*4882a593Smuzhiyun				compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel";
128*4882a593Smuzhiyun				reg = <0 0x80>;
129*4882a593Smuzhiyun				cell-index = <0>;
130*4882a593Smuzhiyun				interrupt-parent = <&ipic>;
131*4882a593Smuzhiyun				interrupts = <71 8>;
132*4882a593Smuzhiyun			};
133*4882a593Smuzhiyun			dma-channel@80 {
134*4882a593Smuzhiyun				compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel";
135*4882a593Smuzhiyun				reg = <0x80 0x80>;
136*4882a593Smuzhiyun				cell-index = <1>;
137*4882a593Smuzhiyun				interrupt-parent = <&ipic>;
138*4882a593Smuzhiyun				interrupts = <71 8>;
139*4882a593Smuzhiyun			};
140*4882a593Smuzhiyun			dma-channel@100 {
141*4882a593Smuzhiyun				compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel";
142*4882a593Smuzhiyun				reg = <0x100 0x80>;
143*4882a593Smuzhiyun				cell-index = <2>;
144*4882a593Smuzhiyun				interrupt-parent = <&ipic>;
145*4882a593Smuzhiyun				interrupts = <71 8>;
146*4882a593Smuzhiyun			};
147*4882a593Smuzhiyun			dma-channel@180 {
148*4882a593Smuzhiyun				compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel";
149*4882a593Smuzhiyun				reg = <0x180 0x28>;
150*4882a593Smuzhiyun				cell-index = <3>;
151*4882a593Smuzhiyun				interrupt-parent = <&ipic>;
152*4882a593Smuzhiyun				interrupts = <71 8>;
153*4882a593Smuzhiyun			};
154*4882a593Smuzhiyun		};
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun		/* phy type (ULPI or SERIAL) are only types supported for MPH */
157*4882a593Smuzhiyun		/* port = 0 or 1 */
158*4882a593Smuzhiyun		usb@22000 {
159*4882a593Smuzhiyun			compatible = "fsl-usb2-mph";
160*4882a593Smuzhiyun			reg = <0x22000 0x1000>;
161*4882a593Smuzhiyun			#address-cells = <1>;
162*4882a593Smuzhiyun			#size-cells = <0>;
163*4882a593Smuzhiyun			interrupt-parent = <&ipic>;
164*4882a593Smuzhiyun			interrupts = <39 0x8>;
165*4882a593Smuzhiyun			phy_type = "ulpi";
166*4882a593Smuzhiyun			port0;
167*4882a593Smuzhiyun		};
168*4882a593Smuzhiyun		/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
169*4882a593Smuzhiyun		usb@23000 {
170*4882a593Smuzhiyun			compatible = "fsl-usb2-dr";
171*4882a593Smuzhiyun			reg = <0x23000 0x1000>;
172*4882a593Smuzhiyun			#address-cells = <1>;
173*4882a593Smuzhiyun			#size-cells = <0>;
174*4882a593Smuzhiyun			interrupt-parent = <&ipic>;
175*4882a593Smuzhiyun			interrupts = <38 0x8>;
176*4882a593Smuzhiyun			dr_mode = "otg";
177*4882a593Smuzhiyun			phy_type = "ulpi";
178*4882a593Smuzhiyun		};
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun		enet0: ethernet@24000 {
181*4882a593Smuzhiyun			#address-cells = <1>;
182*4882a593Smuzhiyun			#size-cells = <1>;
183*4882a593Smuzhiyun			cell-index = <0>;
184*4882a593Smuzhiyun			device_type = "network";
185*4882a593Smuzhiyun			model = "TSEC";
186*4882a593Smuzhiyun			compatible = "gianfar";
187*4882a593Smuzhiyun			reg = <0x24000 0x1000>;
188*4882a593Smuzhiyun			ranges = <0x0 0x24000 0x1000>;
189*4882a593Smuzhiyun			local-mac-address = [ 00 08 e5 11 32 33 ];
190*4882a593Smuzhiyun			interrupts = <32 0x8 33 0x8 34 0x8>;
191*4882a593Smuzhiyun			interrupt-parent = <&ipic>;
192*4882a593Smuzhiyun			tbi-handle = <&tbi0>;
193*4882a593Smuzhiyun			phy-handle = <&phy0>;
194*4882a593Smuzhiyun			linux,network-index = <0>;
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun			mdio@520 {
197*4882a593Smuzhiyun				#address-cells = <1>;
198*4882a593Smuzhiyun				#size-cells = <0>;
199*4882a593Smuzhiyun				compatible = "fsl,gianfar-mdio";
200*4882a593Smuzhiyun				reg = <0x520 0x20>;
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun				phy0: ethernet-phy@0 {
203*4882a593Smuzhiyun					interrupt-parent = <&ipic>;
204*4882a593Smuzhiyun					interrupts = <17 0x8>;
205*4882a593Smuzhiyun					reg = <0x1>;
206*4882a593Smuzhiyun				};
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun				phy1: ethernet-phy@1 {
209*4882a593Smuzhiyun					interrupt-parent = <&ipic>;
210*4882a593Smuzhiyun					interrupts = <18 0x8>;
211*4882a593Smuzhiyun					reg = <0x2>;
212*4882a593Smuzhiyun				};
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun				tbi0: tbi-phy@11 {
215*4882a593Smuzhiyun					reg = <0x11>;
216*4882a593Smuzhiyun					device_type = "tbi-phy";
217*4882a593Smuzhiyun				};
218*4882a593Smuzhiyun			};
219*4882a593Smuzhiyun		};
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun		enet1: ethernet@25000 {
222*4882a593Smuzhiyun			#address-cells = <1>;
223*4882a593Smuzhiyun			#size-cells = <1>;
224*4882a593Smuzhiyun			cell-index = <1>;
225*4882a593Smuzhiyun			device_type = "network";
226*4882a593Smuzhiyun			model = "TSEC";
227*4882a593Smuzhiyun			compatible = "gianfar";
228*4882a593Smuzhiyun			reg = <0x25000 0x1000>;
229*4882a593Smuzhiyun			ranges = <0x0 0x25000 0x1000>;
230*4882a593Smuzhiyun			local-mac-address = [ 00 08 e5 11 32 34 ];
231*4882a593Smuzhiyun			interrupts = <35 0x8 36 0x8 37 0x8>;
232*4882a593Smuzhiyun			interrupt-parent = <&ipic>;
233*4882a593Smuzhiyun			tbi-handle = <&tbi1>;
234*4882a593Smuzhiyun			phy-handle = <&phy1>;
235*4882a593Smuzhiyun			linux,network-index = <1>;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun			mdio@520 {
238*4882a593Smuzhiyun				#address-cells = <1>;
239*4882a593Smuzhiyun				#size-cells = <0>;
240*4882a593Smuzhiyun				compatible = "fsl,gianfar-tbi";
241*4882a593Smuzhiyun				reg = <0x520 0x20>;
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun				tbi1: tbi-phy@11 {
244*4882a593Smuzhiyun					reg = <0x11>;
245*4882a593Smuzhiyun					device_type = "tbi-phy";
246*4882a593Smuzhiyun				};
247*4882a593Smuzhiyun			};
248*4882a593Smuzhiyun		};
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun		serial0: serial@4500 {
251*4882a593Smuzhiyun			cell-index = <0>;
252*4882a593Smuzhiyun			device_type = "serial";
253*4882a593Smuzhiyun			compatible = "fsl,ns16550", "ns16550";
254*4882a593Smuzhiyun			reg = <0x4500 0x100>;
255*4882a593Smuzhiyun			clock-frequency = <400000000>;
256*4882a593Smuzhiyun			interrupts = <9 0x8>;
257*4882a593Smuzhiyun			interrupt-parent = <&ipic>;
258*4882a593Smuzhiyun		};
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun		serial1: serial@4600 {
261*4882a593Smuzhiyun			cell-index = <1>;
262*4882a593Smuzhiyun			device_type = "serial";
263*4882a593Smuzhiyun			compatible = "fsl,ns16550", "ns16550";
264*4882a593Smuzhiyun			reg = <0x4600 0x100>;
265*4882a593Smuzhiyun			clock-frequency = <400000000>;
266*4882a593Smuzhiyun			interrupts = <10 0x8>;
267*4882a593Smuzhiyun			interrupt-parent = <&ipic>;
268*4882a593Smuzhiyun		};
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun		/* May need to remove if on a part without crypto engine */
271*4882a593Smuzhiyun		crypto@30000 {
272*4882a593Smuzhiyun			device_type = "crypto";
273*4882a593Smuzhiyun			model = "SEC2";
274*4882a593Smuzhiyun			compatible = "talitos";
275*4882a593Smuzhiyun			reg = <0x30000 0x10000>;
276*4882a593Smuzhiyun			interrupts = <11 0x8>;
277*4882a593Smuzhiyun			interrupt-parent = <&ipic>;
278*4882a593Smuzhiyun			num-channels = <4>;
279*4882a593Smuzhiyun			channel-fifo-len = <24>;
280*4882a593Smuzhiyun			exec-units-mask = <0x0000007e>;
281*4882a593Smuzhiyun			/* desc mask is for rev2.0,
282*4882a593Smuzhiyun			 * we need runtime fixup for >2.0 */
283*4882a593Smuzhiyun			descriptor-types-mask = <0x01010ebf>;
284*4882a593Smuzhiyun		};
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun		/* IPIC
287*4882a593Smuzhiyun		 * interrupts cell = <intr #, sense>
288*4882a593Smuzhiyun		 * sense values match linux IORESOURCE_IRQ_* defines:
289*4882a593Smuzhiyun		 * sense == 8: Level, low assertion
290*4882a593Smuzhiyun		 * sense == 2: Edge, high-to-low change
291*4882a593Smuzhiyun		 */
292*4882a593Smuzhiyun		ipic: pic@700 {
293*4882a593Smuzhiyun			interrupt-controller;
294*4882a593Smuzhiyun			#address-cells = <0>;
295*4882a593Smuzhiyun			#interrupt-cells = <2>;
296*4882a593Smuzhiyun			reg = <0x700 0x100>;
297*4882a593Smuzhiyun			device_type = "ipic";
298*4882a593Smuzhiyun		};
299*4882a593Smuzhiyun	};
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun	chosen {
302*4882a593Smuzhiyun		bootargs = "console=ttyS0,38400 root=/dev/mtdblock3 rootfstype=jffs2";
303*4882a593Smuzhiyun		stdout-path = &serial0;
304*4882a593Smuzhiyun	};
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun};
307