1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * TI Syscon Reset definitions 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef __DT_BINDINGS_RESET_TI_SYSCON_H__ 9*4882a593Smuzhiyun #define __DT_BINDINGS_RESET_TI_SYSCON_H__ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /* 12*4882a593Smuzhiyun * The reset does not support the feature and corresponding 13*4882a593Smuzhiyun * values are not valid 14*4882a593Smuzhiyun */ 15*4882a593Smuzhiyun #define ASSERT_NONE (1 << 0) 16*4882a593Smuzhiyun #define DEASSERT_NONE (1 << 1) 17*4882a593Smuzhiyun #define STATUS_NONE (1 << 2) 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun /* When set this function is activated by setting(vs clearing) this bit */ 20*4882a593Smuzhiyun #define ASSERT_SET (1 << 3) 21*4882a593Smuzhiyun #define DEASSERT_SET (1 << 4) 22*4882a593Smuzhiyun #define STATUS_SET (1 << 5) 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun /* The following are the inverse of the above and are added for consistency */ 25*4882a593Smuzhiyun #define ASSERT_CLEAR (0 << 3) 26*4882a593Smuzhiyun #define DEASSERT_CLEAR (0 << 4) 27*4882a593Smuzhiyun #define STATUS_CLEAR (0 << 5) 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun #endif 30