1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) 2017 Cogent Embedded Inc. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun #ifndef __DT_BINDINGS_POWER_R8A77970_SYSC_H__ 6*4882a593Smuzhiyun #define __DT_BINDINGS_POWER_R8A77970_SYSC_H__ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun /* 9*4882a593Smuzhiyun * These power domain indices match the numbers of the interrupt bits 10*4882a593Smuzhiyun * representing the power areas in the various Interrupt Registers 11*4882a593Smuzhiyun * (e.g. SYSCISR, Interrupt Status Register) 12*4882a593Smuzhiyun */ 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define R8A77970_PD_CA53_CPU0 5 15*4882a593Smuzhiyun #define R8A77970_PD_CA53_CPU1 6 16*4882a593Smuzhiyun #define R8A77970_PD_CA53_SCU 21 17*4882a593Smuzhiyun #define R8A77970_PD_A2IR0 23 18*4882a593Smuzhiyun #define R8A77970_PD_A3IR 24 19*4882a593Smuzhiyun #define R8A77970_PD_A2IR1 27 20*4882a593Smuzhiyun #define R8A77970_PD_A2DP 28 21*4882a593Smuzhiyun #define R8A77970_PD_A2CN 29 22*4882a593Smuzhiyun #define R8A77970_PD_A2SC0 30 23*4882a593Smuzhiyun #define R8A77970_PD_A2SC1 31 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun /* Always-on power area */ 26*4882a593Smuzhiyun #define R8A77970_PD_ALWAYS_ON 32 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #endif /* __DT_BINDINGS_POWER_R8A77970_SYSC_H__ */ 29