1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * This header provides constants for the Qualcomm PMIC GPIO binding. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef _DT_BINDINGS_PINCTRL_QCOM_PMIC_GPIO_H 7*4882a593Smuzhiyun #define _DT_BINDINGS_PINCTRL_QCOM_PMIC_GPIO_H 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #define PMIC_GPIO_PULL_UP_30 0 10*4882a593Smuzhiyun #define PMIC_GPIO_PULL_UP_1P5 1 11*4882a593Smuzhiyun #define PMIC_GPIO_PULL_UP_31P5 2 12*4882a593Smuzhiyun #define PMIC_GPIO_PULL_UP_1P5_30 3 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define PMIC_GPIO_STRENGTH_NO 0 15*4882a593Smuzhiyun #define PMIC_GPIO_STRENGTH_HIGH 1 16*4882a593Smuzhiyun #define PMIC_GPIO_STRENGTH_MED 2 17*4882a593Smuzhiyun #define PMIC_GPIO_STRENGTH_LOW 3 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun /* 20*4882a593Smuzhiyun * Note: PM8018 GPIO3 and GPIO4 are supporting 21*4882a593Smuzhiyun * only S3 and L2 options (1.8V) 22*4882a593Smuzhiyun */ 23*4882a593Smuzhiyun #define PM8018_GPIO_L6 0 24*4882a593Smuzhiyun #define PM8018_GPIO_L5 1 25*4882a593Smuzhiyun #define PM8018_GPIO_S3 2 26*4882a593Smuzhiyun #define PM8018_GPIO_L14 3 27*4882a593Smuzhiyun #define PM8018_GPIO_L2 4 28*4882a593Smuzhiyun #define PM8018_GPIO_L4 5 29*4882a593Smuzhiyun #define PM8018_GPIO_VDD 6 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun /* 32*4882a593Smuzhiyun * Note: PM8038 GPIO7 and GPIO8 are supporting 33*4882a593Smuzhiyun * only L11 and L4 options (1.8V) 34*4882a593Smuzhiyun */ 35*4882a593Smuzhiyun #define PM8038_GPIO_VPH 0 36*4882a593Smuzhiyun #define PM8038_GPIO_BB 1 37*4882a593Smuzhiyun #define PM8038_GPIO_L11 2 38*4882a593Smuzhiyun #define PM8038_GPIO_L15 3 39*4882a593Smuzhiyun #define PM8038_GPIO_L4 4 40*4882a593Smuzhiyun #define PM8038_GPIO_L3 5 41*4882a593Smuzhiyun #define PM8038_GPIO_L17 6 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun #define PM8058_GPIO_VPH 0 44*4882a593Smuzhiyun #define PM8058_GPIO_BB 1 45*4882a593Smuzhiyun #define PM8058_GPIO_S3 2 46*4882a593Smuzhiyun #define PM8058_GPIO_L3 3 47*4882a593Smuzhiyun #define PM8058_GPIO_L7 4 48*4882a593Smuzhiyun #define PM8058_GPIO_L6 5 49*4882a593Smuzhiyun #define PM8058_GPIO_L5 6 50*4882a593Smuzhiyun #define PM8058_GPIO_L2 7 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun /* 53*4882a593Smuzhiyun * Note: PM8916 GPIO1 and GPIO2 are supporting 54*4882a593Smuzhiyun * only L2(1.15V) and L5(1.8V) options 55*4882a593Smuzhiyun */ 56*4882a593Smuzhiyun #define PM8916_GPIO_VPH 0 57*4882a593Smuzhiyun #define PM8916_GPIO_L2 2 58*4882a593Smuzhiyun #define PM8916_GPIO_L5 3 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun #define PM8917_GPIO_VPH 0 61*4882a593Smuzhiyun #define PM8917_GPIO_S4 2 62*4882a593Smuzhiyun #define PM8917_GPIO_L15 3 63*4882a593Smuzhiyun #define PM8917_GPIO_L4 4 64*4882a593Smuzhiyun #define PM8917_GPIO_L3 5 65*4882a593Smuzhiyun #define PM8917_GPIO_L17 6 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun #define PM8921_GPIO_VPH 0 68*4882a593Smuzhiyun #define PM8921_GPIO_BB 1 69*4882a593Smuzhiyun #define PM8921_GPIO_S4 2 70*4882a593Smuzhiyun #define PM8921_GPIO_L15 3 71*4882a593Smuzhiyun #define PM8921_GPIO_L4 4 72*4882a593Smuzhiyun #define PM8921_GPIO_L3 5 73*4882a593Smuzhiyun #define PM8921_GPIO_L17 6 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun /* 76*4882a593Smuzhiyun * Note: PM8941 gpios from 15 to 18 are supporting 77*4882a593Smuzhiyun * only S3 and L6 options (1.8V) 78*4882a593Smuzhiyun */ 79*4882a593Smuzhiyun #define PM8941_GPIO_VPH 0 80*4882a593Smuzhiyun #define PM8941_GPIO_L1 1 81*4882a593Smuzhiyun #define PM8941_GPIO_S3 2 82*4882a593Smuzhiyun #define PM8941_GPIO_L6 3 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun /* 85*4882a593Smuzhiyun * Note: PMA8084 gpios from 15 to 18 are supporting 86*4882a593Smuzhiyun * only S4 and L6 options (1.8V) 87*4882a593Smuzhiyun */ 88*4882a593Smuzhiyun #define PMA8084_GPIO_VPH 0 89*4882a593Smuzhiyun #define PMA8084_GPIO_L1 1 90*4882a593Smuzhiyun #define PMA8084_GPIO_S4 2 91*4882a593Smuzhiyun #define PMA8084_GPIO_L6 3 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun #define PM8994_GPIO_VPH 0 94*4882a593Smuzhiyun #define PM8994_GPIO_S4 2 95*4882a593Smuzhiyun #define PM8994_GPIO_L12 3 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun /* To be used with "function" */ 98*4882a593Smuzhiyun #define PMIC_GPIO_FUNC_NORMAL "normal" 99*4882a593Smuzhiyun #define PMIC_GPIO_FUNC_PAIRED "paired" 100*4882a593Smuzhiyun #define PMIC_GPIO_FUNC_FUNC1 "func1" 101*4882a593Smuzhiyun #define PMIC_GPIO_FUNC_FUNC2 "func2" 102*4882a593Smuzhiyun #define PMIC_GPIO_FUNC_FUNC3 "func3" 103*4882a593Smuzhiyun #define PMIC_GPIO_FUNC_FUNC4 "func4" 104*4882a593Smuzhiyun #define PMIC_GPIO_FUNC_DTEST1 "dtest1" 105*4882a593Smuzhiyun #define PMIC_GPIO_FUNC_DTEST2 "dtest2" 106*4882a593Smuzhiyun #define PMIC_GPIO_FUNC_DTEST3 "dtest3" 107*4882a593Smuzhiyun #define PMIC_GPIO_FUNC_DTEST4 "dtest4" 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun #define PM8038_GPIO1_2_LPG_DRV PMIC_GPIO_FUNC_FUNC1 110*4882a593Smuzhiyun #define PM8038_GPIO3_5V_BOOST_EN PMIC_GPIO_FUNC_FUNC1 111*4882a593Smuzhiyun #define PM8038_GPIO4_SSBI_ALT_CLK PMIC_GPIO_FUNC_FUNC1 112*4882a593Smuzhiyun #define PM8038_GPIO5_6_EXT_REG_EN PMIC_GPIO_FUNC_FUNC1 113*4882a593Smuzhiyun #define PM8038_GPIO10_11_EXT_REG_EN PMIC_GPIO_FUNC_FUNC1 114*4882a593Smuzhiyun #define PM8038_GPIO6_7_CLK PMIC_GPIO_FUNC_FUNC1 115*4882a593Smuzhiyun #define PM8038_GPIO9_BAT_ALRM_OUT PMIC_GPIO_FUNC_FUNC1 116*4882a593Smuzhiyun #define PM8038_GPIO6_12_KYPD_DRV PMIC_GPIO_FUNC_FUNC2 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun #define PM8058_GPIO7_8_MP3_CLK PMIC_GPIO_FUNC_FUNC1 119*4882a593Smuzhiyun #define PM8058_GPIO7_8_BCLK_19P2MHZ PMIC_GPIO_FUNC_FUNC2 120*4882a593Smuzhiyun #define PM8058_GPIO9_26_KYPD_DRV PMIC_GPIO_FUNC_FUNC1 121*4882a593Smuzhiyun #define PM8058_GPIO21_23_UART_TX PMIC_GPIO_FUNC_FUNC2 122*4882a593Smuzhiyun #define PM8058_GPIO24_26_LPG_DRV PMIC_GPIO_FUNC_FUNC2 123*4882a593Smuzhiyun #define PM8058_GPIO33_BCLK_19P2MHZ PMIC_GPIO_FUNC_FUNC1 124*4882a593Smuzhiyun #define PM8058_GPIO34_35_MP3_CLK PMIC_GPIO_FUNC_FUNC1 125*4882a593Smuzhiyun #define PM8058_GPIO36_BCLK_19P2MHZ PMIC_GPIO_FUNC_FUNC1 126*4882a593Smuzhiyun #define PM8058_GPIO37_UPL_OUT PMIC_GPIO_FUNC_FUNC1 127*4882a593Smuzhiyun #define PM8058_GPIO37_UART_M_RX PMIC_GPIO_FUNC_FUNC2 128*4882a593Smuzhiyun #define PM8058_GPIO38_XO_SLEEP_CLK PMIC_GPIO_FUNC_FUNC1 129*4882a593Smuzhiyun #define PM8058_GPIO38_39_CLK_32KHZ PMIC_GPIO_FUNC_FUNC2 130*4882a593Smuzhiyun #define PM8058_GPIO39_MP3_CLK PMIC_GPIO_FUNC_FUNC1 131*4882a593Smuzhiyun #define PM8058_GPIO40_EXT_BB_EN PMIC_GPIO_FUNC_FUNC1 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun #define PM8916_GPIO1_BAT_ALRM_OUT PMIC_GPIO_FUNC_FUNC1 134*4882a593Smuzhiyun #define PM8916_GPIO1_KEYP_DRV PMIC_GPIO_FUNC_FUNC2 135*4882a593Smuzhiyun #define PM8916_GPIO2_DIV_CLK PMIC_GPIO_FUNC_FUNC1 136*4882a593Smuzhiyun #define PM8916_GPIO2_SLEEP_CLK PMIC_GPIO_FUNC_FUNC2 137*4882a593Smuzhiyun #define PM8916_GPIO3_KEYP_DRV PMIC_GPIO_FUNC_FUNC1 138*4882a593Smuzhiyun #define PM8916_GPIO4_KEYP_DRV PMIC_GPIO_FUNC_FUNC2 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun #define PM8917_GPIO9_18_KEYP_DRV PMIC_GPIO_FUNC_FUNC1 141*4882a593Smuzhiyun #define PM8917_GPIO20_BAT_ALRM_OUT PMIC_GPIO_FUNC_FUNC1 142*4882a593Smuzhiyun #define PM8917_GPIO21_23_UART_TX PMIC_GPIO_FUNC_FUNC2 143*4882a593Smuzhiyun #define PM8917_GPIO25_26_EXT_REG_EN PMIC_GPIO_FUNC_FUNC1 144*4882a593Smuzhiyun #define PM8917_GPIO37_38_XO_SLEEP_CLK PMIC_GPIO_FUNC_FUNC1 145*4882a593Smuzhiyun #define PM8917_GPIO37_38_MP3_CLK PMIC_GPIO_FUNC_FUNC2 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun #define PM8941_GPIO9_14_KYPD_DRV PMIC_GPIO_FUNC_FUNC1 148*4882a593Smuzhiyun #define PM8941_GPIO15_18_DIV_CLK PMIC_GPIO_FUNC_FUNC1 149*4882a593Smuzhiyun #define PM8941_GPIO15_18_SLEEP_CLK PMIC_GPIO_FUNC_FUNC2 150*4882a593Smuzhiyun #define PM8941_GPIO23_26_KYPD_DRV PMIC_GPIO_FUNC_FUNC1 151*4882a593Smuzhiyun #define PM8941_GPIO23_26_LPG_DRV_HI PMIC_GPIO_FUNC_FUNC2 152*4882a593Smuzhiyun #define PM8941_GPIO31_BAT_ALRM_OUT PMIC_GPIO_FUNC_FUNC1 153*4882a593Smuzhiyun #define PM8941_GPIO33_36_LPG_DRV_3D PMIC_GPIO_FUNC_FUNC1 154*4882a593Smuzhiyun #define PM8941_GPIO33_36_LPG_DRV_HI PMIC_GPIO_FUNC_FUNC2 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun #define PMA8084_GPIO4_5_LPG_DRV PMIC_GPIO_FUNC_FUNC1 157*4882a593Smuzhiyun #define PMA8084_GPIO7_10_LPG_DRV PMIC_GPIO_FUNC_FUNC1 158*4882a593Smuzhiyun #define PMA8084_GPIO5_14_KEYP_DRV PMIC_GPIO_FUNC_FUNC2 159*4882a593Smuzhiyun #define PMA8084_GPIO19_21_KEYP_DRV PMIC_GPIO_FUNC_FUNC2 160*4882a593Smuzhiyun #define PMA8084_GPIO15_18_DIV_CLK PMIC_GPIO_FUNC_FUNC1 161*4882a593Smuzhiyun #define PMA8084_GPIO15_18_SLEEP_CLK PMIC_GPIO_FUNC_FUNC2 162*4882a593Smuzhiyun #define PMA8084_GPIO22_BAT_ALRM_OUT PMIC_GPIO_FUNC_FUNC1 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun #endif 165