1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms 5*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual 6*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a 7*4882a593Smuzhiyun * whole. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * a) This file is free software; you can redistribute it and/or 10*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License as 11*4882a593Smuzhiyun * published by the Free Software Foundation; either version 2 of the 12*4882a593Smuzhiyun * License, or (at your option) any later version. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * This file is distributed in the hope that it will be useful, 15*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of 16*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17*4882a593Smuzhiyun * GNU General Public License for more details. 18*4882a593Smuzhiyun * 19*4882a593Smuzhiyun * Or, alternatively, 20*4882a593Smuzhiyun * 21*4882a593Smuzhiyun * b) Permission is hereby granted, free of charge, to any person 22*4882a593Smuzhiyun * obtaining a copy of this software and associated documentation 23*4882a593Smuzhiyun * files (the "Software"), to deal in the Software without 24*4882a593Smuzhiyun * restriction, including without limitation the rights to use, 25*4882a593Smuzhiyun * copy, modify, merge, publish, distribute, sublicense, and/or 26*4882a593Smuzhiyun * sell copies of the Software, and to permit persons to whom the 27*4882a593Smuzhiyun * Software is furnished to do so, subject to the following 28*4882a593Smuzhiyun * conditions: 29*4882a593Smuzhiyun * 30*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be 31*4882a593Smuzhiyun * included in all copies or substantial portions of the Software. 32*4882a593Smuzhiyun * 33*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35*4882a593Smuzhiyun * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37*4882a593Smuzhiyun * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38*4882a593Smuzhiyun * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39*4882a593Smuzhiyun * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE. 41*4882a593Smuzhiyun */ 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun #ifndef _DT_BINDINGS_CLK_SUN8I_H3_H_ 44*4882a593Smuzhiyun #define _DT_BINDINGS_CLK_SUN8I_H3_H_ 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun #define CLK_PLL_VIDEO 6 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun #define CLK_PLL_PERIPH0 9 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun #define CLK_CPUX 14 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun #define CLK_BUS_CE 20 53*4882a593Smuzhiyun #define CLK_BUS_DMA 21 54*4882a593Smuzhiyun #define CLK_BUS_MMC0 22 55*4882a593Smuzhiyun #define CLK_BUS_MMC1 23 56*4882a593Smuzhiyun #define CLK_BUS_MMC2 24 57*4882a593Smuzhiyun #define CLK_BUS_NAND 25 58*4882a593Smuzhiyun #define CLK_BUS_DRAM 26 59*4882a593Smuzhiyun #define CLK_BUS_EMAC 27 60*4882a593Smuzhiyun #define CLK_BUS_TS 28 61*4882a593Smuzhiyun #define CLK_BUS_HSTIMER 29 62*4882a593Smuzhiyun #define CLK_BUS_SPI0 30 63*4882a593Smuzhiyun #define CLK_BUS_SPI1 31 64*4882a593Smuzhiyun #define CLK_BUS_OTG 32 65*4882a593Smuzhiyun #define CLK_BUS_EHCI0 33 66*4882a593Smuzhiyun #define CLK_BUS_EHCI1 34 67*4882a593Smuzhiyun #define CLK_BUS_EHCI2 35 68*4882a593Smuzhiyun #define CLK_BUS_EHCI3 36 69*4882a593Smuzhiyun #define CLK_BUS_OHCI0 37 70*4882a593Smuzhiyun #define CLK_BUS_OHCI1 38 71*4882a593Smuzhiyun #define CLK_BUS_OHCI2 39 72*4882a593Smuzhiyun #define CLK_BUS_OHCI3 40 73*4882a593Smuzhiyun #define CLK_BUS_VE 41 74*4882a593Smuzhiyun #define CLK_BUS_TCON0 42 75*4882a593Smuzhiyun #define CLK_BUS_TCON1 43 76*4882a593Smuzhiyun #define CLK_BUS_DEINTERLACE 44 77*4882a593Smuzhiyun #define CLK_BUS_CSI 45 78*4882a593Smuzhiyun #define CLK_BUS_TVE 46 79*4882a593Smuzhiyun #define CLK_BUS_HDMI 47 80*4882a593Smuzhiyun #define CLK_BUS_DE 48 81*4882a593Smuzhiyun #define CLK_BUS_GPU 49 82*4882a593Smuzhiyun #define CLK_BUS_MSGBOX 50 83*4882a593Smuzhiyun #define CLK_BUS_SPINLOCK 51 84*4882a593Smuzhiyun #define CLK_BUS_CODEC 52 85*4882a593Smuzhiyun #define CLK_BUS_SPDIF 53 86*4882a593Smuzhiyun #define CLK_BUS_PIO 54 87*4882a593Smuzhiyun #define CLK_BUS_THS 55 88*4882a593Smuzhiyun #define CLK_BUS_I2S0 56 89*4882a593Smuzhiyun #define CLK_BUS_I2S1 57 90*4882a593Smuzhiyun #define CLK_BUS_I2S2 58 91*4882a593Smuzhiyun #define CLK_BUS_I2C0 59 92*4882a593Smuzhiyun #define CLK_BUS_I2C1 60 93*4882a593Smuzhiyun #define CLK_BUS_I2C2 61 94*4882a593Smuzhiyun #define CLK_BUS_UART0 62 95*4882a593Smuzhiyun #define CLK_BUS_UART1 63 96*4882a593Smuzhiyun #define CLK_BUS_UART2 64 97*4882a593Smuzhiyun #define CLK_BUS_UART3 65 98*4882a593Smuzhiyun #define CLK_BUS_SCR0 66 99*4882a593Smuzhiyun #define CLK_BUS_EPHY 67 100*4882a593Smuzhiyun #define CLK_BUS_DBG 68 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun #define CLK_THS 69 103*4882a593Smuzhiyun #define CLK_NAND 70 104*4882a593Smuzhiyun #define CLK_MMC0 71 105*4882a593Smuzhiyun #define CLK_MMC0_SAMPLE 72 106*4882a593Smuzhiyun #define CLK_MMC0_OUTPUT 73 107*4882a593Smuzhiyun #define CLK_MMC1 74 108*4882a593Smuzhiyun #define CLK_MMC1_SAMPLE 75 109*4882a593Smuzhiyun #define CLK_MMC1_OUTPUT 76 110*4882a593Smuzhiyun #define CLK_MMC2 77 111*4882a593Smuzhiyun #define CLK_MMC2_SAMPLE 78 112*4882a593Smuzhiyun #define CLK_MMC2_OUTPUT 79 113*4882a593Smuzhiyun #define CLK_TS 80 114*4882a593Smuzhiyun #define CLK_CE 81 115*4882a593Smuzhiyun #define CLK_SPI0 82 116*4882a593Smuzhiyun #define CLK_SPI1 83 117*4882a593Smuzhiyun #define CLK_I2S0 84 118*4882a593Smuzhiyun #define CLK_I2S1 85 119*4882a593Smuzhiyun #define CLK_I2S2 86 120*4882a593Smuzhiyun #define CLK_SPDIF 87 121*4882a593Smuzhiyun #define CLK_USB_PHY0 88 122*4882a593Smuzhiyun #define CLK_USB_PHY1 89 123*4882a593Smuzhiyun #define CLK_USB_PHY2 90 124*4882a593Smuzhiyun #define CLK_USB_PHY3 91 125*4882a593Smuzhiyun #define CLK_USB_OHCI0 92 126*4882a593Smuzhiyun #define CLK_USB_OHCI1 93 127*4882a593Smuzhiyun #define CLK_USB_OHCI2 94 128*4882a593Smuzhiyun #define CLK_USB_OHCI3 95 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun #define CLK_DRAM_VE 97 131*4882a593Smuzhiyun #define CLK_DRAM_CSI 98 132*4882a593Smuzhiyun #define CLK_DRAM_DEINTERLACE 99 133*4882a593Smuzhiyun #define CLK_DRAM_TS 100 134*4882a593Smuzhiyun #define CLK_DE 101 135*4882a593Smuzhiyun #define CLK_TCON0 102 136*4882a593Smuzhiyun #define CLK_TVE 103 137*4882a593Smuzhiyun #define CLK_DEINTERLACE 104 138*4882a593Smuzhiyun #define CLK_CSI_MISC 105 139*4882a593Smuzhiyun #define CLK_CSI_SCLK 106 140*4882a593Smuzhiyun #define CLK_CSI_MCLK 107 141*4882a593Smuzhiyun #define CLK_VE 108 142*4882a593Smuzhiyun #define CLK_AC_DIG 109 143*4882a593Smuzhiyun #define CLK_AVS 110 144*4882a593Smuzhiyun #define CLK_HDMI 111 145*4882a593Smuzhiyun #define CLK_HDMI_DDC 112 146*4882a593Smuzhiyun #define CLK_MBUS 113 147*4882a593Smuzhiyun #define CLK_GPU 114 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun /* New clocks imported in H5 */ 150*4882a593Smuzhiyun #define CLK_BUS_SCR1 115 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun #endif /* _DT_BINDINGS_CLK_SUN8I_H3_H_ */ 153