1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (c) 2013-2014 Hisilicon Limited. 4*4882a593Smuzhiyun * Copyright (c) 2013-2014 Linaro Limited. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Author: Haojian Zhuang <haojian.zhuang@linaro.org> 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef __DTS_HIP04_CLOCK_H 10*4882a593Smuzhiyun #define __DTS_HIP04_CLOCK_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define HIP04_NONE_CLOCK 0 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun /* fixed rate & fixed factor clocks */ 15*4882a593Smuzhiyun #define HIP04_OSC50M 1 16*4882a593Smuzhiyun #define HIP04_CLK_50M 2 17*4882a593Smuzhiyun #define HIP04_CLK_168M 3 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #define HIP04_NR_CLKS 64 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #endif /* __DTS_HIP04_CLOCK_H */ 22