1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device Tree File for TMPV7708 RM main board 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * (C) Copyright 2020, Toshiba Corporation. 6*4882a593Smuzhiyun * (C) Copyright 2020, Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/dts-v1/; 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun#include "tmpv7708.dtsi" 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun/ { 14*4882a593Smuzhiyun model = "Toshiba TMPV7708 RM main board"; 15*4882a593Smuzhiyun compatible = "toshiba,tmpv7708-rm-mbrc", "toshiba,tmpv7708"; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun aliases { 18*4882a593Smuzhiyun serial0 = &uart0; 19*4882a593Smuzhiyun serial1 = &uart1; 20*4882a593Smuzhiyun }; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun chosen { 23*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun /* 768MB memory */ 27*4882a593Smuzhiyun memory@80000000 { 28*4882a593Smuzhiyun device_type = "memory"; 29*4882a593Smuzhiyun reg = <0x0 0x80000000 0x0 0x30000000>; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun}; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun&uart0 { 34*4882a593Smuzhiyun status = "okay"; 35*4882a593Smuzhiyun clocks = <&uart_clk>; 36*4882a593Smuzhiyun clock-names = "apb_pclk"; 37*4882a593Smuzhiyun}; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun&uart1 { 40*4882a593Smuzhiyun status = "okay"; 41*4882a593Smuzhiyun clocks = <&uart_clk>; 42*4882a593Smuzhiyun clock-names = "apb_pclk"; 43*4882a593Smuzhiyun}; 44