xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm64/rockchip/rk3588s-evb1-lp4x.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun#include "dt-bindings/usb/pd.h"
8*4882a593Smuzhiyun#include "rk3588s.dtsi"
9*4882a593Smuzhiyun#include "rk3588s-evb.dtsi"
10*4882a593Smuzhiyun#include "rk3588s-rk806-dual.dtsi"
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	aw883xx_sound: aw883x-sound {
14*4882a593Smuzhiyun		status = "disabled";
15*4882a593Smuzhiyun		compatible = "rockchip,multicodecs-card";
16*4882a593Smuzhiyun		rockchip,card-name = "rockchip-aw883xx";
17*4882a593Smuzhiyun		rockchip,format = "i2s";
18*4882a593Smuzhiyun		rockchip,mclk-fs = <256>;
19*4882a593Smuzhiyun		rockchip,cpu = <&i2s0_8ch>;
20*4882a593Smuzhiyun		rockchip,codec = <&aw883xx_1 &aw883xx_2 &aw883xx_3 &aw883xx_4>;
21*4882a593Smuzhiyun	};
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun	combophy_avdd0v85: combophy-avdd0v85 {
24*4882a593Smuzhiyun		compatible = "regulator-fixed";
25*4882a593Smuzhiyun		regulator-name = "combophy_avdd0v85";
26*4882a593Smuzhiyun		regulator-boot-on;
27*4882a593Smuzhiyun		regulator-always-on;
28*4882a593Smuzhiyun		regulator-min-microvolt = <850000>;
29*4882a593Smuzhiyun		regulator-max-microvolt = <850000>;
30*4882a593Smuzhiyun		vin-supply = <&vdd_0v85_s0>;
31*4882a593Smuzhiyun	};
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun	combophy_avdd1v8: combophy-avdd1v8 {
34*4882a593Smuzhiyun		compatible = "regulator-fixed";
35*4882a593Smuzhiyun		regulator-name = "combophy_avdd1v8";
36*4882a593Smuzhiyun		regulator-boot-on;
37*4882a593Smuzhiyun		regulator-always-on;
38*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
39*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
40*4882a593Smuzhiyun		vin-supply = <&avcc_1v8_s0>;
41*4882a593Smuzhiyun	};
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun	es7202_sound_micarray: es7202-sound-micarray {
44*4882a593Smuzhiyun		status = "okay";
45*4882a593Smuzhiyun		compatible = "simple-audio-card";
46*4882a593Smuzhiyun		simple-audio-card,format = "i2s";
47*4882a593Smuzhiyun		simple-audio-card,name = "rockchip,sound-micarray";
48*4882a593Smuzhiyun		simple-audio-card,mclk-fs = <256>;
49*4882a593Smuzhiyun		simple-audio-card,dai-link@0 {
50*4882a593Smuzhiyun			format = "pdm";
51*4882a593Smuzhiyun			cpu {
52*4882a593Smuzhiyun				sound-dai = <&pdm0>;
53*4882a593Smuzhiyun			};
54*4882a593Smuzhiyun			codec {
55*4882a593Smuzhiyun				sound-dai = <&es7202>;
56*4882a593Smuzhiyun			};
57*4882a593Smuzhiyun		};
58*4882a593Smuzhiyun	};
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun	es8326_sound: es8326-sound {
61*4882a593Smuzhiyun		status = "disabled";
62*4882a593Smuzhiyun		compatible = "rockchip,multicodecs-card";
63*4882a593Smuzhiyun		rockchip,card-name = "rockchip-es8326";
64*4882a593Smuzhiyun		rockchip,format = "i2s";
65*4882a593Smuzhiyun		rockchip,mclk-fs = <256>;
66*4882a593Smuzhiyun		rockchip,cpu = <&i2s1_8ch>;
67*4882a593Smuzhiyun		rockchip,codec = <&es8326>;
68*4882a593Smuzhiyun		rockchip,audio-routing =
69*4882a593Smuzhiyun		"Headphone", "HPOL",
70*4882a593Smuzhiyun		"Headphone", "HPOR",
71*4882a593Smuzhiyun		"Headphone", "Headphone Power",
72*4882a593Smuzhiyun		"Headphone", "Headphone Power",
73*4882a593Smuzhiyun		"MIC1", "Headset Mic",
74*4882a593Smuzhiyun		"MIC2", "Main Mic";
75*4882a593Smuzhiyun	};
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun	es8388_sound: es8388-sound {
78*4882a593Smuzhiyun		status = "okay";
79*4882a593Smuzhiyun		compatible = "rockchip,multicodecs-card";
80*4882a593Smuzhiyun		rockchip,card-name = "rockchip-es8388";
81*4882a593Smuzhiyun		hp-det-gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>;
82*4882a593Smuzhiyun		io-channels = <&saradc 3>;
83*4882a593Smuzhiyun		io-channel-names = "adc-detect";
84*4882a593Smuzhiyun		keyup-threshold-microvolt = <1800000>;
85*4882a593Smuzhiyun		poll-interval = <100>;
86*4882a593Smuzhiyun		spk-con-gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
87*4882a593Smuzhiyun		hp-con-gpio = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>;
88*4882a593Smuzhiyun		rockchip,format = "i2s";
89*4882a593Smuzhiyun		rockchip,mclk-fs = <256>;
90*4882a593Smuzhiyun		rockchip,cpu = <&i2s0_8ch>;
91*4882a593Smuzhiyun		rockchip,codec = <&es8388>;
92*4882a593Smuzhiyun		rockchip,audio-routing =
93*4882a593Smuzhiyun			"Headphone", "LOUT1",
94*4882a593Smuzhiyun			"Headphone", "ROUT1",
95*4882a593Smuzhiyun			"Speaker", "LOUT2",
96*4882a593Smuzhiyun			"Speaker", "ROUT2",
97*4882a593Smuzhiyun			"Headphone", "Headphone Power",
98*4882a593Smuzhiyun			"Headphone", "Headphone Power",
99*4882a593Smuzhiyun			"Speaker", "Speaker Power",
100*4882a593Smuzhiyun			"Speaker", "Speaker Power",
101*4882a593Smuzhiyun			"LINPUT1", "Main Mic",
102*4882a593Smuzhiyun			"LINPUT2", "Main Mic",
103*4882a593Smuzhiyun			"RINPUT1", "Headset Mic",
104*4882a593Smuzhiyun			"RINPUT2", "Headset Mic";
105*4882a593Smuzhiyun		pinctrl-names = "default";
106*4882a593Smuzhiyun		pinctrl-0 = <&hp_det>;
107*4882a593Smuzhiyun		play-pause-key {
108*4882a593Smuzhiyun			label = "playpause";
109*4882a593Smuzhiyun			linux,code = <KEY_PLAYPAUSE>;
110*4882a593Smuzhiyun			press-threshold-microvolt = <2000>;
111*4882a593Smuzhiyun		};
112*4882a593Smuzhiyun	};
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun	fan: pwm-fan {
115*4882a593Smuzhiyun		compatible = "pwm-fan";
116*4882a593Smuzhiyun		#cooling-cells = <2>;
117*4882a593Smuzhiyun		pwms = <&pwm11 0 50000 0>;
118*4882a593Smuzhiyun		cooling-levels = <0 50 100 150 200 255>;
119*4882a593Smuzhiyun		rockchip,temp-trips = <
120*4882a593Smuzhiyun			50000	1
121*4882a593Smuzhiyun			55000	2
122*4882a593Smuzhiyun			60000	3
123*4882a593Smuzhiyun			65000	4
124*4882a593Smuzhiyun			70000	5
125*4882a593Smuzhiyun		>;
126*4882a593Smuzhiyun	};
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun	hall_sensor: hall-mh248 {
129*4882a593Smuzhiyun		compatible = "hall-mh248";
130*4882a593Smuzhiyun		pinctrl-names = "default";
131*4882a593Smuzhiyun		pinctrl-0 = <&mh248_irq_gpio>;
132*4882a593Smuzhiyun		irq-gpio = <&gpio0 RK_PD4 IRQ_TYPE_EDGE_BOTH>;
133*4882a593Smuzhiyun		hall-active = <1>;
134*4882a593Smuzhiyun		status = "okay";
135*4882a593Smuzhiyun	};
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun	panel-edp {
138*4882a593Smuzhiyun		compatible = "simple-panel";
139*4882a593Smuzhiyun		backlight = <&backlight>;
140*4882a593Smuzhiyun		power-supply = <&vcc3v3_lcd_edp>;
141*4882a593Smuzhiyun		prepare-delay-ms = <120>;
142*4882a593Smuzhiyun		enable-delay-ms = <120>;
143*4882a593Smuzhiyun		unprepare-delay-ms = <120>;
144*4882a593Smuzhiyun		disable-delay-ms = <120>;
145*4882a593Smuzhiyun		width-mm = <129>;
146*4882a593Smuzhiyun		height-mm = <171>;
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun		panel-timing {
149*4882a593Smuzhiyun			clock-frequency = <200000000>;
150*4882a593Smuzhiyun			hactive = <1536>;
151*4882a593Smuzhiyun			vactive = <2048>;
152*4882a593Smuzhiyun			hfront-porch = <12>;
153*4882a593Smuzhiyun			hsync-len = <16>;
154*4882a593Smuzhiyun			hback-porch = <48>;
155*4882a593Smuzhiyun			vfront-porch = <8>;
156*4882a593Smuzhiyun			vsync-len = <4>;
157*4882a593Smuzhiyun			vback-porch = <8>;
158*4882a593Smuzhiyun			hsync-active = <0>;
159*4882a593Smuzhiyun			vsync-active = <0>;
160*4882a593Smuzhiyun			de-active = <0>;
161*4882a593Smuzhiyun			pixelclk-active = <0>;
162*4882a593Smuzhiyun		};
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun		port {
165*4882a593Smuzhiyun			panel_in_edp: endpoint {
166*4882a593Smuzhiyun				remote-endpoint = <&edp_out_panel>;
167*4882a593Smuzhiyun			};
168*4882a593Smuzhiyun		};
169*4882a593Smuzhiyun	};
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun	vbus5v0_typec: vbus5v0-typec {
172*4882a593Smuzhiyun		compatible = "regulator-fixed";
173*4882a593Smuzhiyun		regulator-name = "vbus5v0_typec";
174*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
175*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
176*4882a593Smuzhiyun		enable-active-high;
177*4882a593Smuzhiyun		gpio = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
178*4882a593Smuzhiyun		vin-supply = <&vcc5v0_usb>;
179*4882a593Smuzhiyun		pinctrl-names = "default";
180*4882a593Smuzhiyun		pinctrl-0 = <&typec5v_pwren>;
181*4882a593Smuzhiyun	};
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun	vcc3v3_lcd_edp: vcc3v3-lcd-edp {
184*4882a593Smuzhiyun		compatible = "regulator-fixed";
185*4882a593Smuzhiyun		regulator-name = "vcc3v3_lcd_edp";
186*4882a593Smuzhiyun		gpio = <&gpio1 RK_PA5 GPIO_ACTIVE_HIGH>;
187*4882a593Smuzhiyun		enable-active-high;
188*4882a593Smuzhiyun		regulator-boot-on;
189*4882a593Smuzhiyun		vin-supply = <&vcc_3v3_s3>;
190*4882a593Smuzhiyun	};
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun	vcc3v3_pcie20: vcc3v3-pcie20 {
193*4882a593Smuzhiyun		compatible = "regulator-fixed";
194*4882a593Smuzhiyun		regulator-name = "vcc3v3_pcie20";
195*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
196*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
197*4882a593Smuzhiyun		enable-active-high;
198*4882a593Smuzhiyun		gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
199*4882a593Smuzhiyun		startup-delay-us = <5000>;
200*4882a593Smuzhiyun		vin-supply = <&vcc12v_dcin>;
201*4882a593Smuzhiyun	};
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun	vcc5v0_host: vcc5v0-host {
204*4882a593Smuzhiyun		compatible = "regulator-fixed";
205*4882a593Smuzhiyun		regulator-name = "vcc5v0_host";
206*4882a593Smuzhiyun		regulator-boot-on;
207*4882a593Smuzhiyun		regulator-always-on;
208*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
209*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
210*4882a593Smuzhiyun		enable-active-high;
211*4882a593Smuzhiyun		gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>;
212*4882a593Smuzhiyun		vin-supply = <&vcc5v0_usb>;
213*4882a593Smuzhiyun		pinctrl-names = "default";
214*4882a593Smuzhiyun		pinctrl-0 = <&vcc5v0_host_en>;
215*4882a593Smuzhiyun	};
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun	wireless_bluetooth: wireless-bluetooth {
218*4882a593Smuzhiyun		compatible = "bluetooth-platdata";
219*4882a593Smuzhiyun		clocks = <&hym8563>;
220*4882a593Smuzhiyun		clock-names = "ext_clock";
221*4882a593Smuzhiyun		uart_rts_gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>;
222*4882a593Smuzhiyun		pinctrl-names = "default", "rts_gpio";
223*4882a593Smuzhiyun		pinctrl-0 = <&uart8m1_rtsn>, <&bt_gpio>;
224*4882a593Smuzhiyun		pinctrl-1 = <&uart8_gpios>;
225*4882a593Smuzhiyun		BT,reset_gpio    = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>;
226*4882a593Smuzhiyun		BT,wake_gpio     = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
227*4882a593Smuzhiyun		BT,wake_host_irq = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
228*4882a593Smuzhiyun		status = "okay";
229*4882a593Smuzhiyun	};
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun	wireless_wlan: wireless-wlan {
232*4882a593Smuzhiyun		compatible = "wlan-platdata";
233*4882a593Smuzhiyun		wifi_chip_type = "ap6275p";
234*4882a593Smuzhiyun		pinctrl-names = "default";
235*4882a593Smuzhiyun		pinctrl-0 = <&wifi_host_wake_irq>, <&wifi_poweren_gpio>;
236*4882a593Smuzhiyun		WIFI,host_wake_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
237*4882a593Smuzhiyun		WIFI,poweren_gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
238*4882a593Smuzhiyun		status = "okay";
239*4882a593Smuzhiyun	};
240*4882a593Smuzhiyun};
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun&backlight {
243*4882a593Smuzhiyun	pwms = <&pwm12 0 25000 0>;
244*4882a593Smuzhiyun	power-supply = <&vcc3v3_lcd_edp>;
245*4882a593Smuzhiyun	status = "okay";
246*4882a593Smuzhiyun};
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun&combphy0_ps {
249*4882a593Smuzhiyun	status = "okay";
250*4882a593Smuzhiyun};
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun&dp0 {
253*4882a593Smuzhiyun	status = "okay";
254*4882a593Smuzhiyun};
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun&dp0_in_vp1 {
257*4882a593Smuzhiyun	status = "okay";
258*4882a593Smuzhiyun};
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun&dp0_sound{
261*4882a593Smuzhiyun	status = "okay";
262*4882a593Smuzhiyun};
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun&edp0 {
265*4882a593Smuzhiyun	force-hpd;
266*4882a593Smuzhiyun	status = "okay";
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun	ports {
269*4882a593Smuzhiyun		port@1 {
270*4882a593Smuzhiyun			reg = <1>;
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun			edp_out_panel: endpoint {
273*4882a593Smuzhiyun				remote-endpoint = <&panel_in_edp>;
274*4882a593Smuzhiyun			};
275*4882a593Smuzhiyun		};
276*4882a593Smuzhiyun	};
277*4882a593Smuzhiyun};
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun&edp0_in_vp2 {
280*4882a593Smuzhiyun	status = "okay";
281*4882a593Smuzhiyun};
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun&hdptxphy0 {
284*4882a593Smuzhiyun	/* Single Vdiff Training Table for power reduction (optional) */
285*4882a593Smuzhiyun	training-table = /bits/ 8 <
286*4882a593Smuzhiyun		/* voltage swing 0, pre-emphasis 0->3 */
287*4882a593Smuzhiyun		0x0d 0x00 0x00 0x00 0x00 0x00
288*4882a593Smuzhiyun		0x0d 0x00 0x00 0x00 0x00 0x00
289*4882a593Smuzhiyun		0x0d 0x00 0x00 0x00 0x00 0x00
290*4882a593Smuzhiyun		0x0d 0x00 0x00 0x00 0x00 0x00
291*4882a593Smuzhiyun		/* voltage swing 1, pre-emphasis 0->2 */
292*4882a593Smuzhiyun		0x0d 0x00 0x00 0x00 0x00 0x00
293*4882a593Smuzhiyun		0x0d 0x00 0x00 0x00 0x00 0x00
294*4882a593Smuzhiyun		0x0d 0x00 0x00 0x00 0x00 0x00
295*4882a593Smuzhiyun		/* voltage swing 2, pre-emphasis 0->1 */
296*4882a593Smuzhiyun		0x0d 0x00 0x00 0x00 0x00 0x00
297*4882a593Smuzhiyun		0x0d 0x00 0x00 0x00 0x00 0x00
298*4882a593Smuzhiyun		/* voltage swing 3, pre-emphasis 0 */
299*4882a593Smuzhiyun		0x0d 0x00 0x00 0x00 0x00 0x00
300*4882a593Smuzhiyun	>;
301*4882a593Smuzhiyun	status = "okay";
302*4882a593Smuzhiyun};
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun&i2c3 {
305*4882a593Smuzhiyun	status = "okay";
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun	es8388: es8388@11 {
308*4882a593Smuzhiyun		status = "okay";
309*4882a593Smuzhiyun		#sound-dai-cells = <0>;
310*4882a593Smuzhiyun		compatible = "everest,es8388", "everest,es8323";
311*4882a593Smuzhiyun		reg = <0x11>;
312*4882a593Smuzhiyun		clocks = <&mclkout_i2s0>;
313*4882a593Smuzhiyun		clock-names = "mclk";
314*4882a593Smuzhiyun		assigned-clocks = <&mclkout_i2s0>;
315*4882a593Smuzhiyun		assigned-clock-rates = <12288000>;
316*4882a593Smuzhiyun		pinctrl-names = "default";
317*4882a593Smuzhiyun		pinctrl-0 = <&i2s0_mclk>;
318*4882a593Smuzhiyun	};
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun	es8326: es8326@18 {
321*4882a593Smuzhiyun		status = "disabled";
322*4882a593Smuzhiyun		#sound-dai-cells = <0>;
323*4882a593Smuzhiyun		compatible = "everest,es8326";
324*4882a593Smuzhiyun		reg = <0x18>;
325*4882a593Smuzhiyun		clocks = <&mclkout_i2s1>;
326*4882a593Smuzhiyun		clock-names = "mclk";
327*4882a593Smuzhiyun		assigned-clocks = <&mclkout_i2s1>;
328*4882a593Smuzhiyun		assigned-clock-rates = <12288000>;
329*4882a593Smuzhiyun		pinctrl-names = "default";
330*4882a593Smuzhiyun		pinctrl-0 = <&i2s1m0_mclk>;
331*4882a593Smuzhiyun		mclk-rate = <12288000>;
332*4882a593Smuzhiyun		mic1-src = [22];
333*4882a593Smuzhiyun		mic2-src = [44];
334*4882a593Smuzhiyun		jack-pol = [0e];
335*4882a593Smuzhiyun	};
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun	es7202: es7202@32 {
338*4882a593Smuzhiyun		status = "okay";
339*4882a593Smuzhiyun		#sound-dai-cells = <0>;
340*4882a593Smuzhiyun		compatible = "ES7202_PDM_ADC_1";
341*4882a593Smuzhiyun		power-supply = <&vcc_1v8_s0>;	/* only 1v8 or 3v3, default is 3v3 */
342*4882a593Smuzhiyun		reg = <0x32>;
343*4882a593Smuzhiyun	};
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun	aw883xx_1: aw883xx@34 {
346*4882a593Smuzhiyun		compatible = "awinic,aw883xx_smartpa";
347*4882a593Smuzhiyun		reg = <0x34>;
348*4882a593Smuzhiyun		#sound-dai-cells = <0>;
349*4882a593Smuzhiyun		reset-gpio = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
350*4882a593Smuzhiyun		pinctrl-0 = <&aw_rst1_gpio>;
351*4882a593Smuzhiyun		pinctrl-names = "default";
352*4882a593Smuzhiyun		sound-channel = <0>;
353*4882a593Smuzhiyun		re-min = <1000>;
354*4882a593Smuzhiyun		re-max= <40000>;
355*4882a593Smuzhiyun		status = "disabled";
356*4882a593Smuzhiyun	};
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun	aw883xx_2: aw883xx@35 {
359*4882a593Smuzhiyun		compatible = "awinic,aw883xx_smartpa";
360*4882a593Smuzhiyun		reg = <0x35>;
361*4882a593Smuzhiyun		#sound-dai-cells = <0>;
362*4882a593Smuzhiyun		reset-gpio = <&gpio1 RK_PA5 GPIO_ACTIVE_HIGH>;
363*4882a593Smuzhiyun		pinctrl-0 = <&aw_rst2_gpio>;
364*4882a593Smuzhiyun		pinctrl-names = "default";
365*4882a593Smuzhiyun		sound-channel = <1>;
366*4882a593Smuzhiyun		re-min = <1000>;
367*4882a593Smuzhiyun		re-max= <40000>;
368*4882a593Smuzhiyun		status = "disabled";
369*4882a593Smuzhiyun	};
370*4882a593Smuzhiyun};
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun&i2c4 {
373*4882a593Smuzhiyun	pinctrl-names = "default";
374*4882a593Smuzhiyun	pinctrl-0 = <&i2c4m3_xfer>;
375*4882a593Smuzhiyun	status = "okay";
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun	aw883xx_3: aw883xx@34 {
378*4882a593Smuzhiyun		compatible = "awinic,aw883xx_smartpa";
379*4882a593Smuzhiyun		reg = <0x34>;
380*4882a593Smuzhiyun		#sound-dai-cells = <0>;
381*4882a593Smuzhiyun		reset-gpio = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
382*4882a593Smuzhiyun		pinctrl-0 = <&aw_rst3_gpio>;
383*4882a593Smuzhiyun		pinctrl-names = "default";
384*4882a593Smuzhiyun		sound-channel = <2>;
385*4882a593Smuzhiyun		re-min = <1000>;
386*4882a593Smuzhiyun		re-max= <40000>;
387*4882a593Smuzhiyun		status = "disabled";
388*4882a593Smuzhiyun	};
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun	aw883xx_4: aw883xx@35 {
391*4882a593Smuzhiyun		compatible = "awinic,aw883xx_smartpa";
392*4882a593Smuzhiyun		reg = <0x35>;
393*4882a593Smuzhiyun		#sound-dai-cells = <0>;
394*4882a593Smuzhiyun		reset-gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>;
395*4882a593Smuzhiyun		pinctrl-0 = <&aw_rst4_gpio>;
396*4882a593Smuzhiyun		pinctrl-names = "default";
397*4882a593Smuzhiyun		sound-channel = <3>;
398*4882a593Smuzhiyun		re-min = <1000>;
399*4882a593Smuzhiyun		re-max= <40000>;
400*4882a593Smuzhiyun		status = "disabled";
401*4882a593Smuzhiyun	};
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun	gsl3673@40 {
404*4882a593Smuzhiyun		compatible = "GSL,GSL3673";
405*4882a593Smuzhiyun		reg = <0x40>;
406*4882a593Smuzhiyun		screen_max_x = <1536>;
407*4882a593Smuzhiyun		screen_max_y = <2048>;
408*4882a593Smuzhiyun		irq_gpio_number = <&gpio1 RK_PB5 IRQ_TYPE_LEVEL_LOW>;
409*4882a593Smuzhiyun		rst_gpio_number = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>;
410*4882a593Smuzhiyun	};
411*4882a593Smuzhiyun};
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun&i2c5 {
414*4882a593Smuzhiyun	status = "okay";
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun	ls_stk3332: light@47 {
417*4882a593Smuzhiyun		compatible = "ls_stk3332";
418*4882a593Smuzhiyun		status = "disabled";
419*4882a593Smuzhiyun		reg = <0x47>;
420*4882a593Smuzhiyun		type = <SENSOR_TYPE_LIGHT>;
421*4882a593Smuzhiyun		irq_enable = <0>;
422*4882a593Smuzhiyun		als_threshold_high = <100>;
423*4882a593Smuzhiyun		als_threshold_low = <10>;
424*4882a593Smuzhiyun		als_ctrl_gain = <2>; /* 0:x1 1:x4 2:x16 3:x64 */
425*4882a593Smuzhiyun		poll_delay_ms = <100>;
426*4882a593Smuzhiyun	};
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun	ps_stk3332: proximity@47 {
429*4882a593Smuzhiyun		compatible = "ps_stk3332";
430*4882a593Smuzhiyun		status = "disabled";
431*4882a593Smuzhiyun		reg = <0x47>;
432*4882a593Smuzhiyun		type = <SENSOR_TYPE_PROXIMITY>;
433*4882a593Smuzhiyun		//pinctrl-names = "default";
434*4882a593Smuzhiyun		//pinctrl-0 = <&gpio3_c6>;
435*4882a593Smuzhiyun		//irq-gpio = <&gpio3 RK_PC6 IRQ_TYPE_LEVEL_LOW>;
436*4882a593Smuzhiyun		//irq_enable = <1>;
437*4882a593Smuzhiyun		ps_threshold_high = <0x200>;
438*4882a593Smuzhiyun		ps_threshold_low = <0x100>;
439*4882a593Smuzhiyun		ps_ctrl_gain = <3>; /* 0:x1 1:x2 2:x5 3:x8 */
440*4882a593Smuzhiyun		ps_led_current = <4>; /* 0:3.125mA 1:6.25mA 2:12.5mA 3:25mA 4:50mA 5:100mA*/
441*4882a593Smuzhiyun		poll_delay_ms = <100>;
442*4882a593Smuzhiyun	};
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun	mpu6500_acc: mpu_acc@68 {
445*4882a593Smuzhiyun		compatible = "mpu6500_acc";
446*4882a593Smuzhiyun		reg = <0x68>;
447*4882a593Smuzhiyun		irq-gpio = <&gpio3 RK_PB4 IRQ_TYPE_EDGE_RISING>;
448*4882a593Smuzhiyun		irq_enable = <0>;
449*4882a593Smuzhiyun		poll_delay_ms = <30>;
450*4882a593Smuzhiyun		type = <SENSOR_TYPE_ACCEL>;
451*4882a593Smuzhiyun		layout = <5>;
452*4882a593Smuzhiyun	};
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun	mpu6500_gyro: mpu_gyro@68 {
455*4882a593Smuzhiyun		compatible = "mpu6500_gyro";
456*4882a593Smuzhiyun		reg = <0x68>;
457*4882a593Smuzhiyun		poll_delay_ms = <30>;
458*4882a593Smuzhiyun		type = <SENSOR_TYPE_GYROSCOPE>;
459*4882a593Smuzhiyun		layout = <5>;
460*4882a593Smuzhiyun	};
461*4882a593Smuzhiyun};
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun&i2c8 {
464*4882a593Smuzhiyun	status = "okay";
465*4882a593Smuzhiyun	pinctrl-names = "default";
466*4882a593Smuzhiyun	pinctrl-0 = <&i2c8m2_xfer>;
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun	usbc0: fusb302@22 {
469*4882a593Smuzhiyun		compatible = "fcs,fusb302";
470*4882a593Smuzhiyun		reg = <0x22>;
471*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
472*4882a593Smuzhiyun		interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
473*4882a593Smuzhiyun		pinctrl-names = "default";
474*4882a593Smuzhiyun		pinctrl-0 = <&usbc0_int>;
475*4882a593Smuzhiyun		vbus-supply = <&vbus5v0_typec>;
476*4882a593Smuzhiyun		status = "okay";
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun		ports {
479*4882a593Smuzhiyun			#address-cells = <1>;
480*4882a593Smuzhiyun			#size-cells = <0>;
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun			port@0 {
483*4882a593Smuzhiyun				reg = <0>;
484*4882a593Smuzhiyun				usbc0_role_sw: endpoint@0 {
485*4882a593Smuzhiyun					remote-endpoint = <&dwc3_0_role_switch>;
486*4882a593Smuzhiyun				};
487*4882a593Smuzhiyun			};
488*4882a593Smuzhiyun		};
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun		usb_con: connector {
491*4882a593Smuzhiyun			compatible = "usb-c-connector";
492*4882a593Smuzhiyun			label = "USB-C";
493*4882a593Smuzhiyun			data-role = "dual";
494*4882a593Smuzhiyun			power-role = "dual";
495*4882a593Smuzhiyun			try-power-role = "sink";
496*4882a593Smuzhiyun			op-sink-microwatt = <1000000>;
497*4882a593Smuzhiyun			sink-pdos =
498*4882a593Smuzhiyun				<PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>;
499*4882a593Smuzhiyun			source-pdos =
500*4882a593Smuzhiyun				<PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun			altmodes {
503*4882a593Smuzhiyun				#address-cells = <1>;
504*4882a593Smuzhiyun				#size-cells = <0>;
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun				altmode@0 {
507*4882a593Smuzhiyun					reg = <0>;
508*4882a593Smuzhiyun					svid = <0xff01>;
509*4882a593Smuzhiyun					vdo = <0xffffffff>;
510*4882a593Smuzhiyun				};
511*4882a593Smuzhiyun			};
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun			ports {
514*4882a593Smuzhiyun				#address-cells = <1>;
515*4882a593Smuzhiyun				#size-cells = <0>;
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun				port@0 {
518*4882a593Smuzhiyun					reg = <0>;
519*4882a593Smuzhiyun					usbc0_orien_sw: endpoint {
520*4882a593Smuzhiyun						remote-endpoint = <&usbdp_phy0_orientation_switch>;
521*4882a593Smuzhiyun					};
522*4882a593Smuzhiyun				};
523*4882a593Smuzhiyun
524*4882a593Smuzhiyun				port@1 {
525*4882a593Smuzhiyun					reg = <1>;
526*4882a593Smuzhiyun					dp_altmode_mux: endpoint {
527*4882a593Smuzhiyun						remote-endpoint = <&usbdp_phy0_dp_altmode_mux>;
528*4882a593Smuzhiyun					};
529*4882a593Smuzhiyun				};
530*4882a593Smuzhiyun			};
531*4882a593Smuzhiyun		};
532*4882a593Smuzhiyun	};
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun	hym8563: hym8563@51 {
535*4882a593Smuzhiyun		compatible = "haoyu,hym8563";
536*4882a593Smuzhiyun		reg = <0x51>;
537*4882a593Smuzhiyun		#clock-cells = <0>;
538*4882a593Smuzhiyun		clock-frequency = <32768>;
539*4882a593Smuzhiyun		clock-output-names = "hym8563";
540*4882a593Smuzhiyun		pinctrl-names = "default";
541*4882a593Smuzhiyun		pinctrl-0 = <&hym8563_int>;
542*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
543*4882a593Smuzhiyun		interrupts = <RK_PC4 IRQ_TYPE_LEVEL_LOW>;
544*4882a593Smuzhiyun		wakeup-source;
545*4882a593Smuzhiyun	};
546*4882a593Smuzhiyun};
547*4882a593Smuzhiyun
548*4882a593Smuzhiyun&pcie2x1l1 {
549*4882a593Smuzhiyun	reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
550*4882a593Smuzhiyun	vpcie3v3-supply = <&vcc3v3_pcie20>;
551*4882a593Smuzhiyun	status = "okay";
552*4882a593Smuzhiyun};
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun&pcie2x1l2 {
555*4882a593Smuzhiyun	reset-gpios = <&gpio4 RK_PC1 GPIO_ACTIVE_HIGH>;
556*4882a593Smuzhiyun	rockchip,skip-scan-in-resume;
557*4882a593Smuzhiyun	status = "okay";
558*4882a593Smuzhiyun};
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun&pdm0 {
561*4882a593Smuzhiyun	status = "okay";
562*4882a593Smuzhiyun};
563*4882a593Smuzhiyun
564*4882a593Smuzhiyun&pinctrl {
565*4882a593Smuzhiyun	headphone {
566*4882a593Smuzhiyun		hp_det: hp-det {
567*4882a593Smuzhiyun			rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
568*4882a593Smuzhiyun		};
569*4882a593Smuzhiyun	};
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun	hym8563 {
572*4882a593Smuzhiyun		hym8563_int: hym8563-int {
573*4882a593Smuzhiyun			rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
574*4882a593Smuzhiyun		};
575*4882a593Smuzhiyun	};
576*4882a593Smuzhiyun
577*4882a593Smuzhiyun	lcd {
578*4882a593Smuzhiyun		lcd_rst_gpio: lcd-rst-gpio {
579*4882a593Smuzhiyun			rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
580*4882a593Smuzhiyun		};
581*4882a593Smuzhiyun	};
582*4882a593Smuzhiyun
583*4882a593Smuzhiyun	aw883x {
584*4882a593Smuzhiyun		aw_rst1_gpio: aw-rst1-gpio {
585*4882a593Smuzhiyun			rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
586*4882a593Smuzhiyun		};
587*4882a593Smuzhiyun		aw_rst2_gpio: aw-rst2-gpio {
588*4882a593Smuzhiyun			rockchip,pins = <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
589*4882a593Smuzhiyun		};
590*4882a593Smuzhiyun		aw_rst3_gpio: aw-rst3-gpio {
591*4882a593Smuzhiyun			rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
592*4882a593Smuzhiyun		};
593*4882a593Smuzhiyun		aw_rst4_gpio: aw-rst4-gpio {
594*4882a593Smuzhiyun			rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
595*4882a593Smuzhiyun		};
596*4882a593Smuzhiyun	};
597*4882a593Smuzhiyun
598*4882a593Smuzhiyun	sensor {
599*4882a593Smuzhiyun		mh248_irq_gpio: mh248_irq_gpio {
600*4882a593Smuzhiyun			rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
601*4882a593Smuzhiyun		};
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun		mpu6500_irq_gpio: mpu6500_irq_gpio {
604*4882a593Smuzhiyun			rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
605*4882a593Smuzhiyun		};
606*4882a593Smuzhiyun	};
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun	usb {
609*4882a593Smuzhiyun		vcc5v0_host_en: vcc5v0-host-en {
610*4882a593Smuzhiyun			rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
611*4882a593Smuzhiyun		};
612*4882a593Smuzhiyun	};
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun	usb-typec {
615*4882a593Smuzhiyun		usbc0_int: usbc0-int {
616*4882a593Smuzhiyun			rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
617*4882a593Smuzhiyun		};
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun		typec5v_pwren: typec5v-pwren {
620*4882a593Smuzhiyun			rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
621*4882a593Smuzhiyun		};
622*4882a593Smuzhiyun	};
623*4882a593Smuzhiyun
624*4882a593Smuzhiyun	wireless-bluetooth {
625*4882a593Smuzhiyun		uart8_gpios: uart8-gpios {
626*4882a593Smuzhiyun			rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
627*4882a593Smuzhiyun		};
628*4882a593Smuzhiyun
629*4882a593Smuzhiyun		bt_gpio: bt-gpio {
630*4882a593Smuzhiyun			rockchip,pins =
631*4882a593Smuzhiyun				<3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
632*4882a593Smuzhiyun				<3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>,
633*4882a593Smuzhiyun				<3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>;
634*4882a593Smuzhiyun		};
635*4882a593Smuzhiyun	};
636*4882a593Smuzhiyun
637*4882a593Smuzhiyun	wireless-wlan {
638*4882a593Smuzhiyun		wifi_host_wake_irq: wifi-host-wake-irq {
639*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>;
640*4882a593Smuzhiyun		};
641*4882a593Smuzhiyun
642*4882a593Smuzhiyun		wifi_poweren_gpio: wifi-poweren-gpio {
643*4882a593Smuzhiyun			rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>;
644*4882a593Smuzhiyun		};
645*4882a593Smuzhiyun	};
646*4882a593Smuzhiyun};
647*4882a593Smuzhiyun
648*4882a593Smuzhiyun&pwm3 {
649*4882a593Smuzhiyun	compatible = "rockchip,remotectl-pwm";
650*4882a593Smuzhiyun	pinctrl-names = "default";
651*4882a593Smuzhiyun	pinctrl-0 = <&pwm3m3_pins>;
652*4882a593Smuzhiyun	remote_pwm_id = <3>;
653*4882a593Smuzhiyun	handle_cpu_id = <1>;
654*4882a593Smuzhiyun	remote_support_psci = <0>;
655*4882a593Smuzhiyun	status = "okay";
656*4882a593Smuzhiyun
657*4882a593Smuzhiyun	ir_key1 {
658*4882a593Smuzhiyun		rockchip,usercode = <0x4040>;
659*4882a593Smuzhiyun		rockchip,key_table =
660*4882a593Smuzhiyun			<0xf2   KEY_REPLY>,
661*4882a593Smuzhiyun			<0xba   KEY_BACK>,
662*4882a593Smuzhiyun			<0xf4   KEY_UP>,
663*4882a593Smuzhiyun			<0xf1   KEY_DOWN>,
664*4882a593Smuzhiyun			<0xef   KEY_LEFT>,
665*4882a593Smuzhiyun			<0xee   KEY_RIGHT>,
666*4882a593Smuzhiyun			<0xbd   KEY_HOME>,
667*4882a593Smuzhiyun			<0xea   KEY_VOLUMEUP>,
668*4882a593Smuzhiyun			<0xe3   KEY_VOLUMEDOWN>,
669*4882a593Smuzhiyun			<0xe2   KEY_SEARCH>,
670*4882a593Smuzhiyun			<0xb2   KEY_POWER>,
671*4882a593Smuzhiyun			<0xbc   KEY_MUTE>,
672*4882a593Smuzhiyun			<0xec   KEY_MENU>,
673*4882a593Smuzhiyun			<0xbf   0x190>,
674*4882a593Smuzhiyun			<0xe0   0x191>,
675*4882a593Smuzhiyun			<0xe1   0x192>,
676*4882a593Smuzhiyun			<0xe9   183>,
677*4882a593Smuzhiyun			<0xe6   248>,
678*4882a593Smuzhiyun			<0xe8   185>,
679*4882a593Smuzhiyun			<0xe7   186>,
680*4882a593Smuzhiyun			<0xf0   388>,
681*4882a593Smuzhiyun			<0xbe   0x175>;
682*4882a593Smuzhiyun	};
683*4882a593Smuzhiyun
684*4882a593Smuzhiyun	ir_key2 {
685*4882a593Smuzhiyun		rockchip,usercode = <0xff00>;
686*4882a593Smuzhiyun		rockchip,key_table =
687*4882a593Smuzhiyun			<0xf9   KEY_HOME>,
688*4882a593Smuzhiyun			<0xbf   KEY_BACK>,
689*4882a593Smuzhiyun			<0xfb   KEY_MENU>,
690*4882a593Smuzhiyun			<0xaa   KEY_REPLY>,
691*4882a593Smuzhiyun			<0xb9   KEY_UP>,
692*4882a593Smuzhiyun			<0xe9   KEY_DOWN>,
693*4882a593Smuzhiyun			<0xb8   KEY_LEFT>,
694*4882a593Smuzhiyun			<0xea   KEY_RIGHT>,
695*4882a593Smuzhiyun			<0xeb   KEY_VOLUMEDOWN>,
696*4882a593Smuzhiyun			<0xef   KEY_VOLUMEUP>,
697*4882a593Smuzhiyun			<0xf7   KEY_MUTE>,
698*4882a593Smuzhiyun			<0xe7   KEY_POWER>,
699*4882a593Smuzhiyun			<0xfc   KEY_POWER>,
700*4882a593Smuzhiyun			<0xa9   KEY_VOLUMEDOWN>,
701*4882a593Smuzhiyun			<0xa8   KEY_PLAYPAUSE>,
702*4882a593Smuzhiyun			<0xe0   KEY_VOLUMEDOWN>,
703*4882a593Smuzhiyun			<0xa5   KEY_VOLUMEDOWN>,
704*4882a593Smuzhiyun			<0xab   183>,
705*4882a593Smuzhiyun			<0xb7   388>,
706*4882a593Smuzhiyun			<0xe8   388>,
707*4882a593Smuzhiyun			<0xf8   184>,
708*4882a593Smuzhiyun			<0xaf   185>,
709*4882a593Smuzhiyun			<0xed   KEY_VOLUMEDOWN>,
710*4882a593Smuzhiyun			<0xee   186>,
711*4882a593Smuzhiyun			<0xb3   KEY_VOLUMEDOWN>,
712*4882a593Smuzhiyun			<0xf1   KEY_VOLUMEDOWN>,
713*4882a593Smuzhiyun			<0xf2   KEY_VOLUMEDOWN>,
714*4882a593Smuzhiyun			<0xf3   KEY_SEARCH>,
715*4882a593Smuzhiyun			<0xb4   KEY_VOLUMEDOWN>,
716*4882a593Smuzhiyun			<0xa4   KEY_SETUP>,
717*4882a593Smuzhiyun			<0xbe   KEY_SEARCH>;
718*4882a593Smuzhiyun	};
719*4882a593Smuzhiyun
720*4882a593Smuzhiyun	ir_key3 {
721*4882a593Smuzhiyun		rockchip,usercode = <0x1dcc>;
722*4882a593Smuzhiyun		rockchip,key_table =
723*4882a593Smuzhiyun			<0xee   KEY_REPLY>,
724*4882a593Smuzhiyun			<0xf0   KEY_BACK>,
725*4882a593Smuzhiyun			<0xf8   KEY_UP>,
726*4882a593Smuzhiyun			<0xbb   KEY_DOWN>,
727*4882a593Smuzhiyun			<0xef   KEY_LEFT>,
728*4882a593Smuzhiyun			<0xed   KEY_RIGHT>,
729*4882a593Smuzhiyun			<0xfc   KEY_HOME>,
730*4882a593Smuzhiyun			<0xf1   KEY_VOLUMEUP>,
731*4882a593Smuzhiyun			<0xfd   KEY_VOLUMEDOWN>,
732*4882a593Smuzhiyun			<0xb7   KEY_SEARCH>,
733*4882a593Smuzhiyun			<0xff   KEY_POWER>,
734*4882a593Smuzhiyun			<0xf3   KEY_MUTE>,
735*4882a593Smuzhiyun			<0xbf   KEY_MENU>,
736*4882a593Smuzhiyun			<0xf9   0x191>,
737*4882a593Smuzhiyun			<0xf5   0x192>,
738*4882a593Smuzhiyun			<0xb3   388>,
739*4882a593Smuzhiyun			<0xbe   KEY_1>,
740*4882a593Smuzhiyun			<0xba   KEY_2>,
741*4882a593Smuzhiyun			<0xb2   KEY_3>,
742*4882a593Smuzhiyun			<0xbd   KEY_4>,
743*4882a593Smuzhiyun			<0xf9   KEY_5>,
744*4882a593Smuzhiyun			<0xb1   KEY_6>,
745*4882a593Smuzhiyun			<0xfc   KEY_7>,
746*4882a593Smuzhiyun			<0xf8   KEY_8>,
747*4882a593Smuzhiyun			<0xb0   KEY_9>,
748*4882a593Smuzhiyun			<0xb6   KEY_0>,
749*4882a593Smuzhiyun			<0xb5   KEY_BACKSPACE>;
750*4882a593Smuzhiyun	};
751*4882a593Smuzhiyun};
752*4882a593Smuzhiyun
753*4882a593Smuzhiyun&pwm11 {
754*4882a593Smuzhiyun	pinctrl-0 = <&pwm11m1_pins>;
755*4882a593Smuzhiyun	status = "okay";
756*4882a593Smuzhiyun};
757*4882a593Smuzhiyun
758*4882a593Smuzhiyun&pwm12 {
759*4882a593Smuzhiyun	pinctrl-0 = <&pwm12m1_pins>;
760*4882a593Smuzhiyun	status = "okay";
761*4882a593Smuzhiyun};
762*4882a593Smuzhiyun
763*4882a593Smuzhiyun&route_edp0 {
764*4882a593Smuzhiyun	connect = <&vp2_out_edp0>;
765*4882a593Smuzhiyun	status = "okay";
766*4882a593Smuzhiyun};
767*4882a593Smuzhiyun
768*4882a593Smuzhiyun&sdmmc {
769*4882a593Smuzhiyun	status = "okay";
770*4882a593Smuzhiyun};
771*4882a593Smuzhiyun
772*4882a593Smuzhiyun&spdif_tx1 {
773*4882a593Smuzhiyun	status = "disabled";
774*4882a593Smuzhiyun	pinctrl-names = "default";
775*4882a593Smuzhiyun	pinctrl-0 = <&spdif1m1_tx>;
776*4882a593Smuzhiyun};
777*4882a593Smuzhiyun
778*4882a593Smuzhiyun&spdif_tx1_dc {
779*4882a593Smuzhiyun	status = "okay";
780*4882a593Smuzhiyun};
781*4882a593Smuzhiyun
782*4882a593Smuzhiyun&spdif_tx1_sound {
783*4882a593Smuzhiyun	status = "okay";
784*4882a593Smuzhiyun};
785*4882a593Smuzhiyun
786*4882a593Smuzhiyun&spdif_tx2 {
787*4882a593Smuzhiyun	status = "okay";
788*4882a593Smuzhiyun};
789*4882a593Smuzhiyun
790*4882a593Smuzhiyun&u2phy0_otg {
791*4882a593Smuzhiyun	rockchip,typec-vbus-det;
792*4882a593Smuzhiyun};
793*4882a593Smuzhiyun
794*4882a593Smuzhiyun&u2phy2_host {
795*4882a593Smuzhiyun	phy-supply = <&vcc5v0_host>;
796*4882a593Smuzhiyun};
797*4882a593Smuzhiyun
798*4882a593Smuzhiyun&u2phy3_host {
799*4882a593Smuzhiyun	phy-supply = <&vcc5v0_host>;
800*4882a593Smuzhiyun};
801*4882a593Smuzhiyun
802*4882a593Smuzhiyun&uart8 {
803*4882a593Smuzhiyun	status = "okay";
804*4882a593Smuzhiyun	pinctrl-names = "default";
805*4882a593Smuzhiyun	pinctrl-0 = <&uart8m1_xfer &uart8m1_ctsn>;
806*4882a593Smuzhiyun};
807*4882a593Smuzhiyun
808*4882a593Smuzhiyun&usbdp_phy0 {
809*4882a593Smuzhiyun	orientation-switch;
810*4882a593Smuzhiyun	svid = <0xff01>;
811*4882a593Smuzhiyun	sbu1-dc-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>;
812*4882a593Smuzhiyun	sbu2-dc-gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_HIGH>;
813*4882a593Smuzhiyun
814*4882a593Smuzhiyun	port {
815*4882a593Smuzhiyun		#address-cells = <1>;
816*4882a593Smuzhiyun		#size-cells = <0>;
817*4882a593Smuzhiyun		usbdp_phy0_orientation_switch: endpoint@0 {
818*4882a593Smuzhiyun			reg = <0>;
819*4882a593Smuzhiyun			remote-endpoint = <&usbc0_orien_sw>;
820*4882a593Smuzhiyun		};
821*4882a593Smuzhiyun
822*4882a593Smuzhiyun		usbdp_phy0_dp_altmode_mux: endpoint@1 {
823*4882a593Smuzhiyun			reg = <1>;
824*4882a593Smuzhiyun			remote-endpoint = <&dp_altmode_mux>;
825*4882a593Smuzhiyun		};
826*4882a593Smuzhiyun	};
827*4882a593Smuzhiyun};
828*4882a593Smuzhiyun
829*4882a593Smuzhiyun&usbdrd_dwc3_0 {
830*4882a593Smuzhiyun	usb-role-switch;
831*4882a593Smuzhiyun	port {
832*4882a593Smuzhiyun		#address-cells = <1>;
833*4882a593Smuzhiyun		#size-cells = <0>;
834*4882a593Smuzhiyun		dwc3_0_role_switch: endpoint@0 {
835*4882a593Smuzhiyun			reg = <0>;
836*4882a593Smuzhiyun			remote-endpoint = <&usbc0_role_sw>;
837*4882a593Smuzhiyun		};
838*4882a593Smuzhiyun	};
839*4882a593Smuzhiyun};
840*4882a593Smuzhiyun
841*4882a593Smuzhiyun&usbhost3_0 {
842*4882a593Smuzhiyun	status = "disabled";
843*4882a593Smuzhiyun};
844*4882a593Smuzhiyun
845*4882a593Smuzhiyun&usbhost_dwc3_0 {
846*4882a593Smuzhiyun	status = "disabled";
847*4882a593Smuzhiyun};
848*4882a593Smuzhiyun
849*4882a593Smuzhiyun/* vp0 & vp3 are not used on this board */
850*4882a593Smuzhiyun&vp0 {
851*4882a593Smuzhiyun	/delete-property/ rockchip,plane-mask;
852*4882a593Smuzhiyun	/delete-property/ rockchip,primary-plane;
853*4882a593Smuzhiyun};
854*4882a593Smuzhiyun
855*4882a593Smuzhiyun&vp1 {
856*4882a593Smuzhiyun	rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0 |
857*4882a593Smuzhiyun				1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1)>;
858*4882a593Smuzhiyun	rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART1>;
859*4882a593Smuzhiyun};
860*4882a593Smuzhiyun
861*4882a593Smuzhiyun&vp2 {
862*4882a593Smuzhiyun	rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER2 | 1 << ROCKCHIP_VOP2_ESMART2 |
863*4882a593Smuzhiyun				1 << ROCKCHIP_VOP2_CLUSTER3 | 1 << ROCKCHIP_VOP2_ESMART3)>;
864*4882a593Smuzhiyun	rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART2>;
865*4882a593Smuzhiyun};
866*4882a593Smuzhiyun
867*4882a593Smuzhiyun&vp3 {
868*4882a593Smuzhiyun	/delete-property/ rockchip,plane-mask;
869*4882a593Smuzhiyun	/delete-property/ rockchip,primary-plane;
870*4882a593Smuzhiyun};
871