xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm64/rockchip/rk3588-vehicle.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
8*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h>
9*4882a593Smuzhiyun#include <dt-bindings/pinctrl/rockchip.h>
10*4882a593Smuzhiyun#include <dt-bindings/input/rk-input.h>
11*4882a593Smuzhiyun#include <dt-bindings/display/drm_mipi_dsi.h>
12*4882a593Smuzhiyun#include <dt-bindings/display/rockchip_vop.h>
13*4882a593Smuzhiyun#include <dt-bindings/sensor-dev.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun/ {
16*4882a593Smuzhiyun	adc_keys: adc-keys {
17*4882a593Smuzhiyun		compatible = "adc-keys";
18*4882a593Smuzhiyun		io-channels = <&saradc 1>;
19*4882a593Smuzhiyun		io-channel-names = "buttons";
20*4882a593Smuzhiyun		keyup-threshold-microvolt = <1800000>;
21*4882a593Smuzhiyun		poll-interval = <100>;
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun		vol-up-key {
24*4882a593Smuzhiyun			label = "volume up";
25*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEUP>;
26*4882a593Smuzhiyun			press-threshold-microvolt = <17000>;
27*4882a593Smuzhiyun		};
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun		vol-down-key {
30*4882a593Smuzhiyun			label = "volume down";
31*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEDOWN>;
32*4882a593Smuzhiyun			press-threshold-microvolt = <417000>;
33*4882a593Smuzhiyun		};
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun		menu-key {
36*4882a593Smuzhiyun			label = "menu";
37*4882a593Smuzhiyun			linux,code = <KEY_MENU>;
38*4882a593Smuzhiyun			press-threshold-microvolt = <890000>;
39*4882a593Smuzhiyun		};
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun		back-key {
42*4882a593Smuzhiyun			label = "back";
43*4882a593Smuzhiyun			linux,code = <KEY_BACK>;
44*4882a593Smuzhiyun			press-threshold-microvolt = <1235000>;
45*4882a593Smuzhiyun		};
46*4882a593Smuzhiyun	};
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun	backlight: backlight {
49*4882a593Smuzhiyun		compatible = "pwm-backlight";
50*4882a593Smuzhiyun		brightness-levels = <
51*4882a593Smuzhiyun			  0  20  20  21  21  22  22  23
52*4882a593Smuzhiyun			 23  24  24  25  25  26  26  27
53*4882a593Smuzhiyun			 27  28  28  29  29  30  30  31
54*4882a593Smuzhiyun			 31  32  32  33  33  34  34  35
55*4882a593Smuzhiyun			 35  36  36  37  37  38  38  39
56*4882a593Smuzhiyun			 40  41  42  43  44  45  46  47
57*4882a593Smuzhiyun			 48  49  50  51  52  53  54  55
58*4882a593Smuzhiyun			 56  57  58  59  60  61  62  63
59*4882a593Smuzhiyun			 64  65  66  67  68  69  70  71
60*4882a593Smuzhiyun			 72  73  74  75  76  77  78  79
61*4882a593Smuzhiyun			 80  81  82  83  84  85  86  87
62*4882a593Smuzhiyun			 88  89  90  91  92  93  94  95
63*4882a593Smuzhiyun			 96  97  98  99 100 101 102 103
64*4882a593Smuzhiyun			104 105 106 107 108 109 110 111
65*4882a593Smuzhiyun			112 113 114 115 116 117 118 119
66*4882a593Smuzhiyun			120 121 122 123 124 125 126 127
67*4882a593Smuzhiyun			128 129 130 131 132 133 134 135
68*4882a593Smuzhiyun			136 137 138 139 140 141 142 143
69*4882a593Smuzhiyun			144 145 146 147 148 149 150 151
70*4882a593Smuzhiyun			152 153 154 155 156 157 158 159
71*4882a593Smuzhiyun			160 161 162 163 164 165 166 167
72*4882a593Smuzhiyun			168 169 170 171 172 173 174 175
73*4882a593Smuzhiyun			176 177 178 179 180 181 182 183
74*4882a593Smuzhiyun			184 185 186 187 188 189 190 191
75*4882a593Smuzhiyun			192 193 194 195 196 197 198 199
76*4882a593Smuzhiyun			200 201 202 203 204 205 206 207
77*4882a593Smuzhiyun			208 209 210 211 212 213 214 215
78*4882a593Smuzhiyun			216 217 218 219 220 221 222 223
79*4882a593Smuzhiyun			224 225 226 227 228 229 230 231
80*4882a593Smuzhiyun			232 233 234 235 236 237 238 239
81*4882a593Smuzhiyun			240 241 242 243 244 245 246 247
82*4882a593Smuzhiyun			248 249 250 251 252 253 254 255
83*4882a593Smuzhiyun		>;
84*4882a593Smuzhiyun		default-brightness-level = <200>;
85*4882a593Smuzhiyun	};
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun	hdmi0_sound: hdmi0-sound {
88*4882a593Smuzhiyun		status = "disabled";
89*4882a593Smuzhiyun		compatible = "rockchip,hdmi";
90*4882a593Smuzhiyun		rockchip,mclk-fs = <128>;
91*4882a593Smuzhiyun		rockchip,card-name = "rockchip-hdmi0";
92*4882a593Smuzhiyun		rockchip,cpu = <&i2s5_8ch>;
93*4882a593Smuzhiyun		rockchip,codec = <&hdmi0>;
94*4882a593Smuzhiyun		rockchip,jack-det;
95*4882a593Smuzhiyun	};
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun	hdmi1_sound: hdmi1-sound {
98*4882a593Smuzhiyun		status = "disabled";
99*4882a593Smuzhiyun		compatible = "rockchip,hdmi";
100*4882a593Smuzhiyun		rockchip,mclk-fs = <128>;
101*4882a593Smuzhiyun		rockchip,card-name = "rockchip-hdmi1";
102*4882a593Smuzhiyun		rockchip,cpu = <&i2s6_8ch>;
103*4882a593Smuzhiyun		rockchip,codec = <&hdmi1>;
104*4882a593Smuzhiyun		rockchip,jack-det;
105*4882a593Smuzhiyun	};
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun	dp0_sound: dp0-sound {
108*4882a593Smuzhiyun		status = "disabled";
109*4882a593Smuzhiyun		compatible = "rockchip,hdmi";
110*4882a593Smuzhiyun		rockchip,card-name= "rockchip-dp0";
111*4882a593Smuzhiyun		rockchip,mclk-fs = <512>;
112*4882a593Smuzhiyun		rockchip,cpu = <&spdif_tx2>;
113*4882a593Smuzhiyun		rockchip,codec = <&dp0 1>;
114*4882a593Smuzhiyun		rockchip,jack-det;
115*4882a593Smuzhiyun	};
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun	dp1_sound: dp1-sound {
118*4882a593Smuzhiyun		status = "disabled";
119*4882a593Smuzhiyun		compatible = "rockchip,hdmi";
120*4882a593Smuzhiyun		rockchip,card-name= "rockchip-dp1";
121*4882a593Smuzhiyun		rockchip,mclk-fs = <512>;
122*4882a593Smuzhiyun		rockchip,cpu = <&spdif_tx5>;
123*4882a593Smuzhiyun		rockchip,codec = <&dp1 1>;
124*4882a593Smuzhiyun		rockchip,jack-det;
125*4882a593Smuzhiyun	};
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun	leds: leds {
128*4882a593Smuzhiyun		compatible = "gpio-leds";
129*4882a593Smuzhiyun		work_led: work {
130*4882a593Smuzhiyun			gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>;
131*4882a593Smuzhiyun			linux,default-trigger = "heartbeat";
132*4882a593Smuzhiyun		};
133*4882a593Smuzhiyun	};
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun	spdif_tx1_dc: spdif-tx1-dc {
136*4882a593Smuzhiyun		status = "disabled";
137*4882a593Smuzhiyun		compatible = "linux,spdif-dit";
138*4882a593Smuzhiyun		#sound-dai-cells = <0>;
139*4882a593Smuzhiyun	};
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun	spdif_tx1_sound: spdif-tx1-sound {
142*4882a593Smuzhiyun		status = "disabled";
143*4882a593Smuzhiyun		compatible = "simple-audio-card";
144*4882a593Smuzhiyun		simple-audio-card,name = "rockchip,spdif-tx1";
145*4882a593Smuzhiyun		simple-audio-card,mclk-fs = <128>;
146*4882a593Smuzhiyun		simple-audio-card,cpu {
147*4882a593Smuzhiyun			sound-dai = <&spdif_tx1>;
148*4882a593Smuzhiyun		};
149*4882a593Smuzhiyun		simple-audio-card,codec {
150*4882a593Smuzhiyun			sound-dai = <&spdif_tx1_dc>;
151*4882a593Smuzhiyun		};
152*4882a593Smuzhiyun	};
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun	test-power {
155*4882a593Smuzhiyun		status = "okay";
156*4882a593Smuzhiyun	};
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun	vcc12v_dcin: vcc12v-dcin {
159*4882a593Smuzhiyun		compatible = "regulator-fixed";
160*4882a593Smuzhiyun		regulator-name = "vcc12v_dcin";
161*4882a593Smuzhiyun		regulator-always-on;
162*4882a593Smuzhiyun		regulator-boot-on;
163*4882a593Smuzhiyun		regulator-min-microvolt = <12000000>;
164*4882a593Smuzhiyun		regulator-max-microvolt = <12000000>;
165*4882a593Smuzhiyun	};
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun	vcc5v0_sys: vcc5v0-sys {
168*4882a593Smuzhiyun		compatible = "regulator-fixed";
169*4882a593Smuzhiyun		regulator-name = "vcc5v0_sys";
170*4882a593Smuzhiyun		regulator-always-on;
171*4882a593Smuzhiyun		regulator-boot-on;
172*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
173*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
174*4882a593Smuzhiyun		vin-supply = <&vcc12v_dcin>;
175*4882a593Smuzhiyun	};
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun	vcc5v0_usbdcin: vcc5v0-usbdcin {
178*4882a593Smuzhiyun		compatible = "regulator-fixed";
179*4882a593Smuzhiyun		regulator-name = "vcc5v0_usbdcin";
180*4882a593Smuzhiyun		regulator-always-on;
181*4882a593Smuzhiyun		regulator-boot-on;
182*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
183*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
184*4882a593Smuzhiyun		vin-supply = <&vcc12v_dcin>;
185*4882a593Smuzhiyun	};
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun	vcc5v0_usb: vcc5v0-usb {
188*4882a593Smuzhiyun		compatible = "regulator-fixed";
189*4882a593Smuzhiyun		regulator-name = "vcc5v0_usb";
190*4882a593Smuzhiyun		regulator-always-on;
191*4882a593Smuzhiyun		regulator-boot-on;
192*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
193*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
194*4882a593Smuzhiyun		vin-supply = <&vcc5v0_usbdcin>;
195*4882a593Smuzhiyun	};
196*4882a593Smuzhiyun};
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun&av1d_mmu {
199*4882a593Smuzhiyun	status = "okay";
200*4882a593Smuzhiyun};
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun&cpu_l0 {
203*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_lit_s0>;
204*4882a593Smuzhiyun	mem-supply = <&vdd_cpu_lit_mem_s0>;
205*4882a593Smuzhiyun};
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun&cpu_b0 {
208*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_big0_s0>;
209*4882a593Smuzhiyun	mem-supply = <&vdd_cpu_big0_mem_s0>;
210*4882a593Smuzhiyun};
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun&cpu_b2 {
213*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_big1_s0>;
214*4882a593Smuzhiyun	mem-supply = <&vdd_cpu_big1_mem_s0>;
215*4882a593Smuzhiyun};
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun&gpu {
218*4882a593Smuzhiyun	mali-supply = <&vdd_gpu_s0>;
219*4882a593Smuzhiyun	mem-supply = <&vdd_gpu_mem_s0>;
220*4882a593Smuzhiyun	status = "okay";
221*4882a593Smuzhiyun};
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun&i2s0_8ch {
224*4882a593Smuzhiyun	status = "okay";
225*4882a593Smuzhiyun	pinctrl-0 = <&i2s0_lrck
226*4882a593Smuzhiyun		     &i2s0_sclk
227*4882a593Smuzhiyun		     &i2s0_sdi0
228*4882a593Smuzhiyun		     &i2s0_sdo0>;
229*4882a593Smuzhiyun};
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun&iep {
232*4882a593Smuzhiyun	status = "okay";
233*4882a593Smuzhiyun};
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun&iep_mmu {
236*4882a593Smuzhiyun	status = "okay";
237*4882a593Smuzhiyun};
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun&jpegd {
240*4882a593Smuzhiyun	status = "okay";
241*4882a593Smuzhiyun};
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun&jpegd_mmu {
244*4882a593Smuzhiyun	status = "okay";
245*4882a593Smuzhiyun};
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun&jpege_ccu {
248*4882a593Smuzhiyun	status = "okay";
249*4882a593Smuzhiyun};
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun&jpege0 {
252*4882a593Smuzhiyun	status = "okay";
253*4882a593Smuzhiyun};
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun&jpege0_mmu {
256*4882a593Smuzhiyun	status = "okay";
257*4882a593Smuzhiyun};
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun&jpege1 {
260*4882a593Smuzhiyun	status = "okay";
261*4882a593Smuzhiyun};
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun&jpege1_mmu {
264*4882a593Smuzhiyun	status = "okay";
265*4882a593Smuzhiyun};
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun&jpege2 {
268*4882a593Smuzhiyun	status = "okay";
269*4882a593Smuzhiyun};
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun&jpege2_mmu {
272*4882a593Smuzhiyun	status = "okay";
273*4882a593Smuzhiyun};
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun&jpege3 {
276*4882a593Smuzhiyun	status = "okay";
277*4882a593Smuzhiyun};
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun&jpege3_mmu {
280*4882a593Smuzhiyun	status = "okay";
281*4882a593Smuzhiyun};
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun&mpp_srv {
284*4882a593Smuzhiyun	status = "okay";
285*4882a593Smuzhiyun};
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun&rga3_core0 {
288*4882a593Smuzhiyun	status = "okay";
289*4882a593Smuzhiyun};
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun&rga3_0_mmu {
292*4882a593Smuzhiyun	status = "okay";
293*4882a593Smuzhiyun};
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun&rga3_core1 {
296*4882a593Smuzhiyun	status = "okay";
297*4882a593Smuzhiyun};
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun&rga3_1_mmu {
300*4882a593Smuzhiyun	status = "okay";
301*4882a593Smuzhiyun};
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun&rga2 {
304*4882a593Smuzhiyun	status = "okay";
305*4882a593Smuzhiyun};
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun&rknpu {
308*4882a593Smuzhiyun	rknpu-supply = <&vdd_npu_s0>;
309*4882a593Smuzhiyun	mem-supply = <&vdd_npu_mem_s0>;
310*4882a593Smuzhiyun	status = "okay";
311*4882a593Smuzhiyun};
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun&rknpu_mmu {
314*4882a593Smuzhiyun	status = "okay";
315*4882a593Smuzhiyun};
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun&rkvdec_ccu {
318*4882a593Smuzhiyun	status = "okay";
319*4882a593Smuzhiyun};
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun&rkvdec0 {
322*4882a593Smuzhiyun	status = "okay";
323*4882a593Smuzhiyun};
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun&rkvdec0_mmu {
326*4882a593Smuzhiyun	status = "okay";
327*4882a593Smuzhiyun};
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun&rkvdec1 {
330*4882a593Smuzhiyun	status = "okay";
331*4882a593Smuzhiyun};
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun&rkvdec1_mmu {
334*4882a593Smuzhiyun	status = "okay";
335*4882a593Smuzhiyun};
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun&rkvenc_ccu {
338*4882a593Smuzhiyun	status = "okay";
339*4882a593Smuzhiyun};
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun&rkvenc0 {
342*4882a593Smuzhiyun	venc-supply = <&vdd_vdenc_s0>;
343*4882a593Smuzhiyun	mem-supply = <&vdd_vdenc_mem_s0>;
344*4882a593Smuzhiyun	status = "okay";
345*4882a593Smuzhiyun};
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun&rkvenc0_mmu {
348*4882a593Smuzhiyun	status = "okay";
349*4882a593Smuzhiyun};
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun&rkvenc1 {
352*4882a593Smuzhiyun	venc-supply = <&vdd_vdenc_s0>;
353*4882a593Smuzhiyun	mem-supply = <&vdd_vdenc_mem_s0>;
354*4882a593Smuzhiyun	status = "okay";
355*4882a593Smuzhiyun};
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun&rkvenc1_mmu {
358*4882a593Smuzhiyun	status = "okay";
359*4882a593Smuzhiyun};
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun&rockchip_suspend {
362*4882a593Smuzhiyun	status = "okay";
363*4882a593Smuzhiyun	rockchip,sleep-debug-en = <1>;
364*4882a593Smuzhiyun};
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun&saradc {
367*4882a593Smuzhiyun	status = "okay";
368*4882a593Smuzhiyun	vref-supply = <&vcc_1v8_s0>;
369*4882a593Smuzhiyun};
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun&sdhci {
372*4882a593Smuzhiyun	bus-width = <8>;
373*4882a593Smuzhiyun	no-sdio;
374*4882a593Smuzhiyun	no-sd;
375*4882a593Smuzhiyun	non-removable;
376*4882a593Smuzhiyun	max-frequency = <200000000>;
377*4882a593Smuzhiyun	mmc-hs400-1_8v;
378*4882a593Smuzhiyun	mmc-hs400-enhanced-strobe;
379*4882a593Smuzhiyun	status = "okay";
380*4882a593Smuzhiyun};
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun&sdmmc {
383*4882a593Smuzhiyun	max-frequency = <150000000>;
384*4882a593Smuzhiyun	no-sdio;
385*4882a593Smuzhiyun	no-mmc;
386*4882a593Smuzhiyun	bus-width = <4>;
387*4882a593Smuzhiyun	cap-mmc-highspeed;
388*4882a593Smuzhiyun	cap-sd-highspeed;
389*4882a593Smuzhiyun	disable-wp;
390*4882a593Smuzhiyun	sd-uhs-sdr104;
391*4882a593Smuzhiyun	vqmmc-supply = <&vccio_sd_s0>;
392*4882a593Smuzhiyun	status = "disabled";
393*4882a593Smuzhiyun};
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun&tsadc {
396*4882a593Smuzhiyun	status = "okay";
397*4882a593Smuzhiyun};
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun&u2phy0 {
400*4882a593Smuzhiyun	status = "okay";
401*4882a593Smuzhiyun};
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun&u2phy1 {
404*4882a593Smuzhiyun	status = "okay";
405*4882a593Smuzhiyun};
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun&u2phy2 {
408*4882a593Smuzhiyun	status = "okay";
409*4882a593Smuzhiyun};
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun&u2phy3 {
412*4882a593Smuzhiyun	status = "okay";
413*4882a593Smuzhiyun};
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun&u2phy0_otg {
416*4882a593Smuzhiyun	status = "okay";
417*4882a593Smuzhiyun};
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun&u2phy1_otg {
420*4882a593Smuzhiyun	status = "okay";
421*4882a593Smuzhiyun};
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun&u2phy2_host {
424*4882a593Smuzhiyun	status = "okay";
425*4882a593Smuzhiyun};
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun&u2phy3_host {
428*4882a593Smuzhiyun	status = "okay";
429*4882a593Smuzhiyun};
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun&usb_host0_ehci {
432*4882a593Smuzhiyun	status = "okay";
433*4882a593Smuzhiyun};
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun&usb_host0_ohci {
436*4882a593Smuzhiyun	status = "okay";
437*4882a593Smuzhiyun};
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun&usb_host1_ehci {
440*4882a593Smuzhiyun	status = "okay";
441*4882a593Smuzhiyun};
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun&usb_host1_ohci {
444*4882a593Smuzhiyun	status = "okay";
445*4882a593Smuzhiyun};
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun&usbdp_phy0 {
448*4882a593Smuzhiyun	status = "okay";
449*4882a593Smuzhiyun};
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun&usbdp_phy0_dp {
452*4882a593Smuzhiyun	status = "okay";
453*4882a593Smuzhiyun};
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun&usbdp_phy0_u3 {
456*4882a593Smuzhiyun	status = "okay";
457*4882a593Smuzhiyun};
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun&usbdp_phy1 {
460*4882a593Smuzhiyun	status = "okay";
461*4882a593Smuzhiyun};
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun&usbdp_phy1_dp {
464*4882a593Smuzhiyun	status = "okay";
465*4882a593Smuzhiyun};
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun&usbdp_phy1_u3 {
468*4882a593Smuzhiyun	status = "okay";
469*4882a593Smuzhiyun};
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun&usbdrd3_0 {
472*4882a593Smuzhiyun	status = "okay";
473*4882a593Smuzhiyun};
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun&usbdrd_dwc3_0 {
476*4882a593Smuzhiyun	dr_mode = "otg";
477*4882a593Smuzhiyun	status = "okay";
478*4882a593Smuzhiyun};
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun&usbhost3_0 {
481*4882a593Smuzhiyun	status = "okay";
482*4882a593Smuzhiyun};
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun&usbhost_dwc3_0 {
485*4882a593Smuzhiyun	status = "okay";
486*4882a593Smuzhiyun};
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun&usbdrd3_1 {
489*4882a593Smuzhiyun	status = "okay";
490*4882a593Smuzhiyun};
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun&usbdrd_dwc3_1 {
493*4882a593Smuzhiyun	status = "okay";
494*4882a593Smuzhiyun};
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun&vdpu {
497*4882a593Smuzhiyun	status = "okay";
498*4882a593Smuzhiyun};
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun&vdpu_mmu {
501*4882a593Smuzhiyun	status = "okay";
502*4882a593Smuzhiyun};
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun&vepu {
505*4882a593Smuzhiyun	status = "okay";
506*4882a593Smuzhiyun};
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun&vop {
509*4882a593Smuzhiyun	status = "okay";
510*4882a593Smuzhiyun};
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun&vop_mmu {
513*4882a593Smuzhiyun	status = "okay";
514*4882a593Smuzhiyun};
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun/* vp0 & vp1 splice for 8K output */
517*4882a593Smuzhiyun&vp0 {
518*4882a593Smuzhiyun	rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0)>;
519*4882a593Smuzhiyun	rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART0>;
520*4882a593Smuzhiyun};
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun&vp1 {
523*4882a593Smuzhiyun	rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1)>;
524*4882a593Smuzhiyun	rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART1>;
525*4882a593Smuzhiyun};
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun&vp2 {
528*4882a593Smuzhiyun	rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER2 | 1 << ROCKCHIP_VOP2_ESMART2)>;
529*4882a593Smuzhiyun	rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART2>;
530*4882a593Smuzhiyun};
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun&vp3 {
533*4882a593Smuzhiyun	rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER3 | 1 << ROCKCHIP_VOP2_ESMART3)>;
534*4882a593Smuzhiyun	rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART3>;
535*4882a593Smuzhiyun};
536