1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
4 *
5 */
6
7&mipi_dcphy0 {
8	status = "okay";
9};
10
11&csi2_dcphy0 {
12	status = "okay";
13
14	ports {
15		#address-cells = <1>;
16		#size-cells = <0>;
17		port@0 {
18			reg = <0>;
19			#address-cells = <1>;
20			#size-cells = <0>;
21
22			mipi_dcphy0_in: endpoint@1 {
23				reg = <1>;
24				remote-endpoint = <&thcv244_out>;
25				data-lanes = <1 2 3 4>;
26			};
27		};
28		port@1 {
29			reg = <1>;
30			#address-cells = <1>;
31			#size-cells = <0>;
32
33			csidcphy0_out: endpoint@0 {
34				reg = <0>;
35				remote-endpoint = <&mipi0_csi2_input>;
36			};
37		};
38	};
39};
40
41&i2c8 {
42	status = "okay";
43	pinctrl-names = "default";
44	pinctrl-0 = <&i2c8m2_xfer>;
45
46	thcv244: thcv244@b {
47		compatible = "thine,thcv244";
48		status = "okay";
49		reg = <0xb>;
50		// clocks = <&cru CLK_MIPI_CAMARAOUT_M1>;
51		// clock-names = "xvclk";
52		// power-domains = <&power RK3588_PD_VI>;
53		// pinctrl-names = "default";
54		// pinctrl-0 = <&mipim0_camera1_clk>;
55		// rockchip,grf = <&sys_grf>;
56		/*power-gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;*/
57		// reset-gpios = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
58		rockchip,camera-module-index = <0>;
59		rockchip,camera-module-facing = "back";
60		rockchip,camera-module-name = "thcv244";
61		rockchip,camera-module-lens-name = "thcv244";
62
63		port {
64			thcv244_out: endpoint {
65				remote-endpoint = <&mipi_dcphy0_in>;
66				data-lanes = <1 2 3 4>;
67			};
68		};
69	};
70};
71
72&mipi0_csi2 {
73	status = "okay";
74
75	ports {
76		#address-cells = <1>;
77		#size-cells = <0>;
78
79		port@0 {
80			reg = <0>;
81			#address-cells = <1>;
82			#size-cells = <0>;
83
84			mipi0_csi2_input: endpoint@1 {
85				reg = <1>;
86				remote-endpoint = <&csidcphy0_out>;
87			};
88		};
89
90		port@1 {
91			reg = <1>;
92			#address-cells = <1>;
93			#size-cells = <0>;
94
95			mipi0_csi2_output: endpoint@0 {
96				reg = <0>;
97				remote-endpoint = <&cif_mipi0_in>;
98			};
99		};
100	};
101};
102
103&rkcif_mipi_lvds {
104	status = "okay";
105	/* parameters for do cif reset detecting:
106	 * index0: monitor mode,
107		   0 for idle,
108		   1 for continue,
109		   2 for trigger,
110		   3 for hotplug (for nextchip)
111	 * index1: the frame id to start timer,
112		   min is 2
113	 * index2: frame num of monitoring cycle
114	 * index3: err time for keep monitoring
115		   after finding out err (ms)
116	 * index4: csi2 err reference val for resetting
117	 */
118	rockchip,cif-monitor = <3 2 1 1000 5>;
119
120	port {
121		cif_mipi0_in: endpoint {
122			remote-endpoint = <&mipi0_csi2_output>;
123		};
124	};
125};
126
127&rkcif {
128	status = "okay";
129	rockchip,android-usb-camerahal-enable;
130};
131
132&rkcif_mmu {
133	status = "okay";
134};
135