1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun/ {
8*4882a593Smuzhiyun	compatible = "rockchip,rk3568-toybrick-sd0-mipi-tx0", "rockchip,rk3568";
9*4882a593Smuzhiyun};
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/*
12*4882a593Smuzhiyun * mipi_dphy0 needs to be enabled
13*4882a593Smuzhiyun * when dsi0 is enabled
14*4882a593Smuzhiyun */
15*4882a593Smuzhiyun&backlight {
16*4882a593Smuzhiyun	status = "okay";
17*4882a593Smuzhiyun	pwms = <&pwm14 0 25000 0>;
18*4882a593Smuzhiyun};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun&dsi0 {
21*4882a593Smuzhiyun	status = "okay";
22*4882a593Smuzhiyun};
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun&dsi0_in_vp0 {
25*4882a593Smuzhiyun	status = "disabled";
26*4882a593Smuzhiyun};
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun&dsi0_in_vp1 {
29*4882a593Smuzhiyun	status = "okay";
30*4882a593Smuzhiyun};
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun&dsi0_panel {
33*4882a593Smuzhiyun	power-supply = <&vcc3v3_lcd0_n>;
34*4882a593Smuzhiyun};
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun&i2c1 {
37*4882a593Smuzhiyun	status = "okay";
38*4882a593Smuzhiyun	power-supply = <&vcc3v3_lcd0_n>;
39*4882a593Smuzhiyun	gt1x: gt1x@14 {
40*4882a593Smuzhiyun		compatible = "goodix,gt1x";
41*4882a593Smuzhiyun		status = "okay";
42*4882a593Smuzhiyun		reg = <0x14>;
43*4882a593Smuzhiyun		pinctrl-names = "default";
44*4882a593Smuzhiyun		pinctrl-0 = <&touch_pin>;
45*4882a593Smuzhiyun		goodix,rst-gpio = <&gpio4 RK_PC3 GPIO_ACTIVE_HIGH>;
46*4882a593Smuzhiyun		goodix,irq-gpio = <&gpio4 RK_PC2 IRQ_TYPE_LEVEL_LOW>;
47*4882a593Smuzhiyun	};
48*4882a593Smuzhiyun};
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun&pwm14{
51*4882a593Smuzhiyun	status = "okay";
52*4882a593Smuzhiyun};
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun&route_dsi0 {
55*4882a593Smuzhiyun	status = "okay";
56*4882a593Smuzhiyun	connect = <&vp1_out_dsi0>;
57*4882a593Smuzhiyun};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun&vcc3v3_lcd0_n {
60*4882a593Smuzhiyun	gpio = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
61*4882a593Smuzhiyun	enable-active-high;
62*4882a593Smuzhiyun};
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun&video_phy0 {
65*4882a593Smuzhiyun	status = "okay";
66*4882a593Smuzhiyun};
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun&pinctrl {
69*4882a593Smuzhiyun	touch {
70*4882a593Smuzhiyun		touch_pin: touch-pin {
71*4882a593Smuzhiyun			rockchip,pins =
72*4882a593Smuzhiyun				<4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up>,
73*4882a593Smuzhiyun				<4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
74*4882a593Smuzhiyun		};
75*4882a593Smuzhiyun	};
76*4882a593Smuzhiyun};
77