1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2020 Rockchip Electronics Co., Ltd. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include "rk3568.dtsi" 8*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 9*4882a593Smuzhiyun#include <dt-bindings/pinctrl/rockchip.h> 10*4882a593Smuzhiyun#include <dt-bindings/input/rk-input.h> 11*4882a593Smuzhiyun#include <dt-bindings/display/drm_mipi_dsi.h> 12*4882a593Smuzhiyun#include <dt-bindings/sensor-dev.h> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun/ { 15*4882a593Smuzhiyun adc_keys: adc-keys { 16*4882a593Smuzhiyun compatible = "adc-keys"; 17*4882a593Smuzhiyun io-channels = <&saradc 0>; 18*4882a593Smuzhiyun io-channel-names = "buttons"; 19*4882a593Smuzhiyun keyup-threshold-microvolt = <1800000>; 20*4882a593Smuzhiyun poll-interval = <100>; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun vol-up-key { 23*4882a593Smuzhiyun label = "volume up"; 24*4882a593Smuzhiyun linux,code = <KEY_VOLUMEUP>; 25*4882a593Smuzhiyun press-threshold-microvolt = <1750>; 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun vol-down-key { 29*4882a593Smuzhiyun label = "volume down"; 30*4882a593Smuzhiyun linux,code = <KEY_VOLUMEDOWN>; 31*4882a593Smuzhiyun press-threshold-microvolt = <297500>; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun dc_12v: dc-12v { 36*4882a593Smuzhiyun compatible = "regulator-fixed"; 37*4882a593Smuzhiyun regulator-name = "dc_12v"; 38*4882a593Smuzhiyun regulator-always-on; 39*4882a593Smuzhiyun regulator-boot-on; 40*4882a593Smuzhiyun regulator-min-microvolt = <12000000>; 41*4882a593Smuzhiyun regulator-max-microvolt = <12000000>; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun hdmi_sound: hdmi-sound { 45*4882a593Smuzhiyun compatible = "simple-audio-card"; 46*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 47*4882a593Smuzhiyun simple-audio-card,mclk-fs = <128>; 48*4882a593Smuzhiyun simple-audio-card,name = "hdmi-sound"; 49*4882a593Smuzhiyun status = "okay"; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun simple-audio-card,cpu { 52*4882a593Smuzhiyun sound-dai = <&i2s0_8ch>; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun simple-audio-card,codec { 55*4882a593Smuzhiyun sound-dai = <&hdmi>; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun reserved-memory { 60*4882a593Smuzhiyun #address-cells = <2>; 61*4882a593Smuzhiyun #size-cells = <2>; 62*4882a593Smuzhiyun ranges; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun rknpu_reserved: rknpu { 65*4882a593Smuzhiyun compatible = "shared-dma-pool"; 66*4882a593Smuzhiyun inactive; 67*4882a593Smuzhiyun reusable; 68*4882a593Smuzhiyun size = <0x0 0x20000000>; 69*4882a593Smuzhiyun alignment = <0x0 0x1000>; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun spdif-sound { 74*4882a593Smuzhiyun status = "okay"; 75*4882a593Smuzhiyun compatible = "simple-audio-card"; 76*4882a593Smuzhiyun simple-audio-card,name = "ROCKCHIP,SPDIF"; 77*4882a593Smuzhiyun simple-audio-card,mclk-fs = <128>; 78*4882a593Smuzhiyun simple-audio-card,cpu { 79*4882a593Smuzhiyun sound-dai = <&spdif_8ch>; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun simple-audio-card,codec { 82*4882a593Smuzhiyun sound-dai = <&spdif_out>; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun spdif_out: spdif-out { 87*4882a593Smuzhiyun status = "okay"; 88*4882a593Smuzhiyun compatible = "linux,spdif-dit"; 89*4882a593Smuzhiyun #sound-dai-cells = <0>; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun vcc3v3_sys: vcc3v3-sys { 93*4882a593Smuzhiyun compatible = "regulator-fixed"; 94*4882a593Smuzhiyun regulator-name = "vcc3v3_sys"; 95*4882a593Smuzhiyun regulator-always-on; 96*4882a593Smuzhiyun regulator-boot-on; 97*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 98*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 99*4882a593Smuzhiyun vin-supply = <&dc_12v>; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun vcc5v0_sys: vcc5v0-sys { 103*4882a593Smuzhiyun compatible = "regulator-fixed"; 104*4882a593Smuzhiyun regulator-name = "vcc5v0_sys"; 105*4882a593Smuzhiyun regulator-always-on; 106*4882a593Smuzhiyun regulator-boot-on; 107*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 108*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 109*4882a593Smuzhiyun vin-supply = <&dc_12v>; 110*4882a593Smuzhiyun }; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun vcc5v0_host: vcc5v0-host-regulator { 113*4882a593Smuzhiyun compatible = "regulator-fixed"; 114*4882a593Smuzhiyun enable-active-high; 115*4882a593Smuzhiyun gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; 116*4882a593Smuzhiyun pinctrl-names = "default"; 117*4882a593Smuzhiyun pinctrl-0 = <&vcc5v0_host_en>; 118*4882a593Smuzhiyun regulator-name = "vcc5v0_host"; 119*4882a593Smuzhiyun regulator-always-on; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun vcc_1v8: vcc_1v8 { 123*4882a593Smuzhiyun compatible = "regulator-fixed"; 124*4882a593Smuzhiyun regulator-name = "vcc_1v8"; 125*4882a593Smuzhiyun regulator-always-on; 126*4882a593Smuzhiyun regulator-boot-on; 127*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 128*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 129*4882a593Smuzhiyun vin-supply = <&vcc5v0_sys>; 130*4882a593Smuzhiyun }; 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun vcc_3v3: vcc_3v3{ 133*4882a593Smuzhiyun compatible = "regulator-fixed"; 134*4882a593Smuzhiyun regulator-name = "vcc_3v3"; 135*4882a593Smuzhiyun regulator-always-on; 136*4882a593Smuzhiyun regulator-boot-on; 137*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 138*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 139*4882a593Smuzhiyun vin-supply = <&vcc5v0_sys>; 140*4882a593Smuzhiyun }; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun vdd_fixed: vdd-fixed { 143*4882a593Smuzhiyun compatible = "regulator-fixed"; 144*4882a593Smuzhiyun regulator-name = "vdd_fixed"; 145*4882a593Smuzhiyun regulator-min-microvolt = <900000>; 146*4882a593Smuzhiyun regulator-max-microvolt = <900000>; 147*4882a593Smuzhiyun regulator-always-on; 148*4882a593Smuzhiyun regulator-boot-on; 149*4882a593Smuzhiyun vin-supply = <&vcc5v0_sys>; 150*4882a593Smuzhiyun }; 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun vdd_logic: vdd-logic { 153*4882a593Smuzhiyun compatible = "pwm-regulator"; 154*4882a593Smuzhiyun pwms = <&pwm1 0 5000 1>; 155*4882a593Smuzhiyun regulator-name = "vdd_logic"; 156*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 157*4882a593Smuzhiyun regulator-max-microvolt = <1200000>; 158*4882a593Smuzhiyun regulator-init-microvolt = <900000>; 159*4882a593Smuzhiyun regulator-always-on; 160*4882a593Smuzhiyun regulator-boot-on; 161*4882a593Smuzhiyun regulator-settling-time-up-us = <250>; 162*4882a593Smuzhiyun pwm-supply = <&vcc5v0_sys>; 163*4882a593Smuzhiyun status = "okay"; 164*4882a593Smuzhiyun }; 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun vdd_npu: vdd-npu { 167*4882a593Smuzhiyun compatible = "pwm-regulator"; 168*4882a593Smuzhiyun pwms = <&pwm2 0 5000 1>; 169*4882a593Smuzhiyun regulator-name = "vdd_npu"; 170*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 171*4882a593Smuzhiyun regulator-max-microvolt = <1200000>; 172*4882a593Smuzhiyun regulator-init-microvolt = <950000>; 173*4882a593Smuzhiyun regulator-always-on; 174*4882a593Smuzhiyun regulator-boot-on; 175*4882a593Smuzhiyun regulator-settling-time-up-us = <250>; 176*4882a593Smuzhiyun pwm-supply = <&vcc5v0_sys>; 177*4882a593Smuzhiyun status = "okay"; 178*4882a593Smuzhiyun }; 179*4882a593Smuzhiyun}; 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun&bus_npu { 182*4882a593Smuzhiyun bus-supply = <&vdd_logic>; 183*4882a593Smuzhiyun pvtm-supply = <&vdd_cpu>; 184*4882a593Smuzhiyun status = "okay"; 185*4882a593Smuzhiyun}; 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun&combphy0_us { 188*4882a593Smuzhiyun status = "okay"; 189*4882a593Smuzhiyun}; 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun&cpu0 { 192*4882a593Smuzhiyun cpu-supply = <&vdd_cpu>; 193*4882a593Smuzhiyun}; 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun&cpu0_opp_table { 196*4882a593Smuzhiyun /delete-node/ opp-1992000000; 197*4882a593Smuzhiyun}; 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun&CPU_SLEEP { 200*4882a593Smuzhiyun status = "disabled"; 201*4882a593Smuzhiyun}; 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun&dsi0_in_vp0 { 204*4882a593Smuzhiyun status = "disabled"; 205*4882a593Smuzhiyun}; 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun&dsi0_in_vp1 { 208*4882a593Smuzhiyun status = "okay"; 209*4882a593Smuzhiyun}; 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun&dsi1_in_vp0 { 212*4882a593Smuzhiyun status = "disabled"; 213*4882a593Smuzhiyun}; 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun&dsi1_in_vp1 { 216*4882a593Smuzhiyun status = "okay"; 217*4882a593Smuzhiyun}; 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun&edp { 220*4882a593Smuzhiyun hpd-gpios = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>; 221*4882a593Smuzhiyun status = "okay"; 222*4882a593Smuzhiyun}; 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun&edp_in_vp0 { 225*4882a593Smuzhiyun status = "disabled"; 226*4882a593Smuzhiyun}; 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun&edp_in_vp1 { 229*4882a593Smuzhiyun status = "okay"; 230*4882a593Smuzhiyun}; 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun&edp_phy { 233*4882a593Smuzhiyun status = "okay"; 234*4882a593Smuzhiyun}; 235*4882a593Smuzhiyun 236*4882a593Smuzhiyun&gpu { 237*4882a593Smuzhiyun mali-supply = <&vdd_fixed>; 238*4882a593Smuzhiyun status = "okay"; 239*4882a593Smuzhiyun}; 240*4882a593Smuzhiyun 241*4882a593Smuzhiyun&gpu_opp_table { 242*4882a593Smuzhiyun /delete-node/ opp-800000000; 243*4882a593Smuzhiyun}; 244*4882a593Smuzhiyun 245*4882a593Smuzhiyun&hdmi { 246*4882a593Smuzhiyun skip-check-420-mode; 247*4882a593Smuzhiyun status = "okay"; 248*4882a593Smuzhiyun}; 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun&hdmi_in_vp0 { 251*4882a593Smuzhiyun status = "okay"; 252*4882a593Smuzhiyun}; 253*4882a593Smuzhiyun 254*4882a593Smuzhiyun&hdmi_in_vp1 { 255*4882a593Smuzhiyun status = "disabled"; 256*4882a593Smuzhiyun}; 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun&i2c0 { 259*4882a593Smuzhiyun status = "okay"; 260*4882a593Smuzhiyun 261*4882a593Smuzhiyun vdd_cpu: tcs4525@1c { 262*4882a593Smuzhiyun compatible = "tcs,tcs4525"; 263*4882a593Smuzhiyun reg = <0x1c>; 264*4882a593Smuzhiyun vin-supply = <&vcc5v0_sys>; 265*4882a593Smuzhiyun regulator-compatible = "fan53555-reg"; 266*4882a593Smuzhiyun regulator-name = "vdd_cpu"; 267*4882a593Smuzhiyun regulator-min-microvolt = <712500>; 268*4882a593Smuzhiyun regulator-max-microvolt = <1390000>; 269*4882a593Smuzhiyun regulator-init-microvolt = <900000>; 270*4882a593Smuzhiyun regulator-ramp-delay = <2300>; 271*4882a593Smuzhiyun fcs,suspend-voltage-selector = <1>; 272*4882a593Smuzhiyun regulator-boot-on; 273*4882a593Smuzhiyun regulator-always-on; 274*4882a593Smuzhiyun regulator-state-mem { 275*4882a593Smuzhiyun regulator-off-in-suspend; 276*4882a593Smuzhiyun }; 277*4882a593Smuzhiyun }; 278*4882a593Smuzhiyun}; 279*4882a593Smuzhiyun 280*4882a593Smuzhiyun&i2s0_8ch { 281*4882a593Smuzhiyun status = "okay"; 282*4882a593Smuzhiyun}; 283*4882a593Smuzhiyun 284*4882a593Smuzhiyun&i2s1_8ch { 285*4882a593Smuzhiyun status = "okay"; 286*4882a593Smuzhiyun rockchip,clk-trcm = <1>; 287*4882a593Smuzhiyun pinctrl-names = "default"; 288*4882a593Smuzhiyun pinctrl-0 = <&i2s1m0_sclktx 289*4882a593Smuzhiyun &i2s1m0_lrcktx 290*4882a593Smuzhiyun &i2s1m0_sdi0 291*4882a593Smuzhiyun &i2s1m0_sdo0>; 292*4882a593Smuzhiyun}; 293*4882a593Smuzhiyun 294*4882a593Smuzhiyun&iep { 295*4882a593Smuzhiyun status = "okay"; 296*4882a593Smuzhiyun}; 297*4882a593Smuzhiyun 298*4882a593Smuzhiyun&iep_mmu { 299*4882a593Smuzhiyun status = "okay"; 300*4882a593Smuzhiyun}; 301*4882a593Smuzhiyun 302*4882a593Smuzhiyun&jpegd { 303*4882a593Smuzhiyun status = "okay"; 304*4882a593Smuzhiyun}; 305*4882a593Smuzhiyun 306*4882a593Smuzhiyun&jpegd_mmu { 307*4882a593Smuzhiyun status = "okay"; 308*4882a593Smuzhiyun}; 309*4882a593Smuzhiyun 310*4882a593Smuzhiyun&video_phy0 { 311*4882a593Smuzhiyun status = "okay"; 312*4882a593Smuzhiyun}; 313*4882a593Smuzhiyun 314*4882a593Smuzhiyun&video_phy1 { 315*4882a593Smuzhiyun status = "okay"; 316*4882a593Smuzhiyun}; 317*4882a593Smuzhiyun 318*4882a593Smuzhiyun&mpp_srv { 319*4882a593Smuzhiyun status = "okay"; 320*4882a593Smuzhiyun}; 321*4882a593Smuzhiyun 322*4882a593Smuzhiyun/* Need to be modified according to the actual hardware */ 323*4882a593Smuzhiyun&pmu_io_domains { 324*4882a593Smuzhiyun status = "okay"; 325*4882a593Smuzhiyun pmuio2-supply = <&vcc_3v3>; 326*4882a593Smuzhiyun vccio1-supply = <&vcc_3v3>; 327*4882a593Smuzhiyun vccio3-supply = <&vcc_3v3>; 328*4882a593Smuzhiyun vccio4-supply = <&vcc_3v3>; 329*4882a593Smuzhiyun vccio5-supply = <&vcc_3v3>; 330*4882a593Smuzhiyun vccio6-supply = <&vcc_3v3>; 331*4882a593Smuzhiyun vccio7-supply = <&vcc_3v3>; 332*4882a593Smuzhiyun}; 333*4882a593Smuzhiyun 334*4882a593Smuzhiyun&pwm1 { 335*4882a593Smuzhiyun status = "okay"; 336*4882a593Smuzhiyun pinctrl-names = "active"; 337*4882a593Smuzhiyun}; 338*4882a593Smuzhiyun 339*4882a593Smuzhiyun&pwm2 { 340*4882a593Smuzhiyun status = "okay"; 341*4882a593Smuzhiyun pinctrl-names = "active"; 342*4882a593Smuzhiyun}; 343*4882a593Smuzhiyun 344*4882a593Smuzhiyun&rk_rga { 345*4882a593Smuzhiyun status = "okay"; 346*4882a593Smuzhiyun}; 347*4882a593Smuzhiyun 348*4882a593Smuzhiyun&rknpu { 349*4882a593Smuzhiyun memory-region = <&rknpu_reserved>; 350*4882a593Smuzhiyun rknpu-supply = <&vdd_npu>; 351*4882a593Smuzhiyun status = "okay"; 352*4882a593Smuzhiyun}; 353*4882a593Smuzhiyun 354*4882a593Smuzhiyun&rknpu_mmu { 355*4882a593Smuzhiyun status = "disabled"; 356*4882a593Smuzhiyun}; 357*4882a593Smuzhiyun 358*4882a593Smuzhiyun&rkvdec { 359*4882a593Smuzhiyun rockchip,disable-auto-freq; 360*4882a593Smuzhiyun assigned-clock-rates = <396000000>, <396000000>, <396000000>, <600000000>; 361*4882a593Smuzhiyun status = "okay"; 362*4882a593Smuzhiyun}; 363*4882a593Smuzhiyun 364*4882a593Smuzhiyun&rkvdec_mmu { 365*4882a593Smuzhiyun status = "okay"; 366*4882a593Smuzhiyun}; 367*4882a593Smuzhiyun 368*4882a593Smuzhiyun&rkvdec_sram { 369*4882a593Smuzhiyun reg = <0x0 0x10000>; 370*4882a593Smuzhiyun}; 371*4882a593Smuzhiyun 372*4882a593Smuzhiyun&rkvenc { 373*4882a593Smuzhiyun status = "okay"; 374*4882a593Smuzhiyun}; 375*4882a593Smuzhiyun 376*4882a593Smuzhiyun&rkvenc_mmu { 377*4882a593Smuzhiyun status = "okay"; 378*4882a593Smuzhiyun}; 379*4882a593Smuzhiyun 380*4882a593Smuzhiyun&route_hdmi { 381*4882a593Smuzhiyun status = "okay"; 382*4882a593Smuzhiyun connect = <&vp0_out_hdmi>; 383*4882a593Smuzhiyun}; 384*4882a593Smuzhiyun 385*4882a593Smuzhiyun&saradc { 386*4882a593Smuzhiyun status = "okay"; 387*4882a593Smuzhiyun vref-supply = <&vcc_1v8>; 388*4882a593Smuzhiyun}; 389*4882a593Smuzhiyun 390*4882a593Smuzhiyun&sdhci { 391*4882a593Smuzhiyun bus-width = <8>; 392*4882a593Smuzhiyun no-sdio; 393*4882a593Smuzhiyun no-sd; 394*4882a593Smuzhiyun non-removable; 395*4882a593Smuzhiyun status = "okay"; 396*4882a593Smuzhiyun}; 397*4882a593Smuzhiyun 398*4882a593Smuzhiyun&sfc { 399*4882a593Smuzhiyun status = "okay"; 400*4882a593Smuzhiyun 401*4882a593Smuzhiyun flash@0 { 402*4882a593Smuzhiyun compatible = "spi-nand"; 403*4882a593Smuzhiyun reg = <0>; 404*4882a593Smuzhiyun spi-max-frequency = <75000000>; 405*4882a593Smuzhiyun spi-rx-bus-width = <4>; 406*4882a593Smuzhiyun spi-tx-bus-width = <1>; 407*4882a593Smuzhiyun }; 408*4882a593Smuzhiyun}; 409*4882a593Smuzhiyun 410*4882a593Smuzhiyun&spdif_8ch { 411*4882a593Smuzhiyun status = "okay"; 412*4882a593Smuzhiyun}; 413*4882a593Smuzhiyun 414*4882a593Smuzhiyun&sram { 415*4882a593Smuzhiyun reg = <0x0 0xfdcc0000 0x0 0x10000>; 416*4882a593Smuzhiyun ranges = <0x0 0x0 0xfdcc0000 0x10000>; 417*4882a593Smuzhiyun}; 418*4882a593Smuzhiyun 419*4882a593Smuzhiyun&tsadc { 420*4882a593Smuzhiyun status = "okay"; 421*4882a593Smuzhiyun}; 422*4882a593Smuzhiyun 423*4882a593Smuzhiyun&u2phy0_host { 424*4882a593Smuzhiyun phy-supply = <&vcc5v0_host>; 425*4882a593Smuzhiyun status = "okay"; 426*4882a593Smuzhiyun}; 427*4882a593Smuzhiyun 428*4882a593Smuzhiyun&u2phy0_otg { 429*4882a593Smuzhiyun phy-supply = <&vcc5v0_host>; 430*4882a593Smuzhiyun status = "okay"; 431*4882a593Smuzhiyun}; 432*4882a593Smuzhiyun 433*4882a593Smuzhiyun&u2phy1_host { 434*4882a593Smuzhiyun phy-supply = <&vcc5v0_host>; 435*4882a593Smuzhiyun status = "okay"; 436*4882a593Smuzhiyun}; 437*4882a593Smuzhiyun 438*4882a593Smuzhiyun&u2phy1_otg { 439*4882a593Smuzhiyun phy-supply = <&vcc5v0_host>; 440*4882a593Smuzhiyun status = "okay"; 441*4882a593Smuzhiyun}; 442*4882a593Smuzhiyun 443*4882a593Smuzhiyun&usb2phy0 { 444*4882a593Smuzhiyun status = "okay"; 445*4882a593Smuzhiyun}; 446*4882a593Smuzhiyun 447*4882a593Smuzhiyun&usb2phy1 { 448*4882a593Smuzhiyun status = "okay"; 449*4882a593Smuzhiyun}; 450*4882a593Smuzhiyun 451*4882a593Smuzhiyun&usb_host0_ehci { 452*4882a593Smuzhiyun status = "okay"; 453*4882a593Smuzhiyun}; 454*4882a593Smuzhiyun 455*4882a593Smuzhiyun&usb_host0_ohci { 456*4882a593Smuzhiyun status = "okay"; 457*4882a593Smuzhiyun}; 458*4882a593Smuzhiyun 459*4882a593Smuzhiyun&usb_host1_ehci { 460*4882a593Smuzhiyun status = "okay"; 461*4882a593Smuzhiyun}; 462*4882a593Smuzhiyun 463*4882a593Smuzhiyun&usb_host1_ohci { 464*4882a593Smuzhiyun status = "okay"; 465*4882a593Smuzhiyun}; 466*4882a593Smuzhiyun 467*4882a593Smuzhiyun&usbdrd_dwc3 { 468*4882a593Smuzhiyun dr_mode = "otg"; 469*4882a593Smuzhiyun extcon = <&usb2phy0>; 470*4882a593Smuzhiyun status = "okay"; 471*4882a593Smuzhiyun}; 472*4882a593Smuzhiyun 473*4882a593Smuzhiyun&usbdrd30 { 474*4882a593Smuzhiyun status = "okay"; 475*4882a593Smuzhiyun}; 476*4882a593Smuzhiyun 477*4882a593Smuzhiyun&usbhost_dwc3 { 478*4882a593Smuzhiyun phys = <&u2phy0_host>; 479*4882a593Smuzhiyun phy-names = "usb2-phy"; 480*4882a593Smuzhiyun maximum-speed = "high-speed"; 481*4882a593Smuzhiyun status = "okay"; 482*4882a593Smuzhiyun}; 483*4882a593Smuzhiyun 484*4882a593Smuzhiyun&usbhost30 { 485*4882a593Smuzhiyun status = "okay"; 486*4882a593Smuzhiyun}; 487*4882a593Smuzhiyun 488*4882a593Smuzhiyun&vdpu { 489*4882a593Smuzhiyun status = "okay"; 490*4882a593Smuzhiyun}; 491*4882a593Smuzhiyun 492*4882a593Smuzhiyun&vdpu_mmu { 493*4882a593Smuzhiyun status = "okay"; 494*4882a593Smuzhiyun}; 495*4882a593Smuzhiyun 496*4882a593Smuzhiyun&vepu { 497*4882a593Smuzhiyun status = "okay"; 498*4882a593Smuzhiyun}; 499*4882a593Smuzhiyun 500*4882a593Smuzhiyun&vepu_mmu { 501*4882a593Smuzhiyun status = "okay"; 502*4882a593Smuzhiyun}; 503*4882a593Smuzhiyun 504*4882a593Smuzhiyun&vop { 505*4882a593Smuzhiyun status = "okay"; 506*4882a593Smuzhiyun assigned-clocks = <&cru DCLK_VOP1>; 507*4882a593Smuzhiyun assigned-clock-parents = <&cru PLL_VPLL>; 508*4882a593Smuzhiyun}; 509*4882a593Smuzhiyun 510*4882a593Smuzhiyun&vop_mmu { 511*4882a593Smuzhiyun status = "okay"; 512*4882a593Smuzhiyun}; 513*4882a593Smuzhiyun 514*4882a593Smuzhiyun&pinctrl { 515*4882a593Smuzhiyun usb { 516*4882a593Smuzhiyun vcc5v0_host_en: vcc5v0-host-en { 517*4882a593Smuzhiyun rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; 518*4882a593Smuzhiyun }; 519*4882a593Smuzhiyun }; 520*4882a593Smuzhiyun}; 521