xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm64/rockchip/rk3568-evb2-lp4x-v10.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun/dts-v1/;
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
10*4882a593Smuzhiyun#include <dt-bindings/pinctrl/rockchip.h>
11*4882a593Smuzhiyun#include "rk3568.dtsi"
12*4882a593Smuzhiyun#include "rk3568-evb.dtsi"
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun/ {
15*4882a593Smuzhiyun	model = "Rockchip RK3568 EVB2 LP4X V10 Board";
16*4882a593Smuzhiyun	compatible = "rockchip,rk3568-evb2-lp4x-v10", "rockchip,rk3568";
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun	rk_headset: rk-headset {
19*4882a593Smuzhiyun		compatible = "rockchip_headset";
20*4882a593Smuzhiyun		headset_gpio = <&gpio4 RK_PC1 GPIO_ACTIVE_LOW>;
21*4882a593Smuzhiyun		pinctrl-names = "default";
22*4882a593Smuzhiyun		pinctrl-0 = <&hp_det>;
23*4882a593Smuzhiyun	};
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun	vcc2v5_sys: vcc2v5-ddr {
26*4882a593Smuzhiyun		compatible = "regulator-fixed";
27*4882a593Smuzhiyun		regulator-name = "vcc2v5-sys";
28*4882a593Smuzhiyun		regulator-always-on;
29*4882a593Smuzhiyun		regulator-boot-on;
30*4882a593Smuzhiyun		regulator-min-microvolt = <2500000>;
31*4882a593Smuzhiyun		regulator-max-microvolt = <2500000>;
32*4882a593Smuzhiyun		vin-supply = <&vcc3v3_sys>;
33*4882a593Smuzhiyun	};
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun	vcc3v3_pcie: gpio-regulator {
36*4882a593Smuzhiyun		compatible = "regulator-fixed";
37*4882a593Smuzhiyun		regulator-name = "vcc3v3_pcie";
38*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
39*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
40*4882a593Smuzhiyun		enable-active-high;
41*4882a593Smuzhiyun		gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
42*4882a593Smuzhiyun		startup-delay-us = <5000>;
43*4882a593Smuzhiyun		vin-supply = <&dc_12v>;
44*4882a593Smuzhiyun	};
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun	qsgmii_3v3: gpio-regulator {
47*4882a593Smuzhiyun		compatible = "regulator-gpio";
48*4882a593Smuzhiyun		regulator-name = "qsgmii_3v3";
49*4882a593Smuzhiyun		regulator-min-microvolt = <0100000>;
50*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
51*4882a593Smuzhiyun		gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
52*4882a593Smuzhiyun		gpios-states = <0x1>;
53*4882a593Smuzhiyun		states = <0100000 0x0
54*4882a593Smuzhiyun			  3300000 0x1>;
55*4882a593Smuzhiyun	};
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun	vcc3v3_bu: vcc3v3-bu {
58*4882a593Smuzhiyun		compatible = "regulator-fixed";
59*4882a593Smuzhiyun		regulator-name = "vcc3v3_bu";
60*4882a593Smuzhiyun		regulator-always-on;
61*4882a593Smuzhiyun		regulator-boot-on;
62*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
63*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
64*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
65*4882a593Smuzhiyun	};
66*4882a593Smuzhiyun};
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun&bt_sound {
69*4882a593Smuzhiyun	status = "disabled";
70*4882a593Smuzhiyun	simple-audio-card,cpu {
71*4882a593Smuzhiyun		sound-dai = <&i2s2_2ch>;
72*4882a593Smuzhiyun	};
73*4882a593Smuzhiyun};
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun&combphy0_us {
76*4882a593Smuzhiyun	status = "okay";
77*4882a593Smuzhiyun};
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun&combphy1_usq {
80*4882a593Smuzhiyun	status = "okay";
81*4882a593Smuzhiyun};
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun&combphy2_psq {
84*4882a593Smuzhiyun	status = "okay";
85*4882a593Smuzhiyun};
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun/*
88*4882a593Smuzhiyun * video_phy0 needs to be enabled
89*4882a593Smuzhiyun * when dsi0 is enabled
90*4882a593Smuzhiyun */
91*4882a593Smuzhiyun&dsi0 {
92*4882a593Smuzhiyun	status = "okay";
93*4882a593Smuzhiyun};
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun&dsi0_in_vp0 {
96*4882a593Smuzhiyun	status = "disabled";
97*4882a593Smuzhiyun};
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun&dsi0_in_vp1 {
100*4882a593Smuzhiyun	status = "okay";
101*4882a593Smuzhiyun};
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun&dsi0_panel {
104*4882a593Smuzhiyun	power-supply = <&vcc3v3_lcd0_n>;
105*4882a593Smuzhiyun};
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun/*
108*4882a593Smuzhiyun * video_phy1 needs to be enabled
109*4882a593Smuzhiyun * when dsi1 is enabled
110*4882a593Smuzhiyun */
111*4882a593Smuzhiyun&dsi1 {
112*4882a593Smuzhiyun	status = "disabled";
113*4882a593Smuzhiyun};
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun&dsi1_in_vp0 {
116*4882a593Smuzhiyun	status = "disabled";
117*4882a593Smuzhiyun};
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun&dsi1_in_vp1 {
120*4882a593Smuzhiyun	status = "disabled";
121*4882a593Smuzhiyun};
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun&dsi1_panel {
124*4882a593Smuzhiyun	power-supply = <&vcc3v3_lcd1_n>;
125*4882a593Smuzhiyun};
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun&gmac0 {
128*4882a593Smuzhiyun	phy-supply = <&qsgmii_3v3>;
129*4882a593Smuzhiyun	phy-mode = "qsgmii";
130*4882a593Smuzhiyun	rockchip,xpcs = <&xpcs>;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>;
133*4882a593Smuzhiyun	assigned-clock-parents = <&gmac0_xpcsclk>;
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun	power-domains = <&power RK3568_PD_PIPE>;
136*4882a593Smuzhiyun	phys = <&combphy1_usq PHY_TYPE_QSGMII>;
137*4882a593Smuzhiyun	phy-handle = <&qsgmii_phy0>;
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun	status = "okay";
140*4882a593Smuzhiyun};
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun&gmac1 {
143*4882a593Smuzhiyun	phy-supply = <&qsgmii_3v3>;
144*4882a593Smuzhiyun	phy-mode = "qsgmii";
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun	snps,reset-gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>;
147*4882a593Smuzhiyun	snps,reset-active-low;
148*4882a593Smuzhiyun	/* Reset time is 20ms, 100ms for rtl8211f */
149*4882a593Smuzhiyun	snps,reset-delays-us = <0 20000 100000>;
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>;
152*4882a593Smuzhiyun	assigned-clock-parents = <&gmac1_xpcsclk>;
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun	pinctrl-names = "default";
155*4882a593Smuzhiyun	pinctrl-0 = <&gmac1m1_miim>;
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun	power-domains = <&power RK3568_PD_PIPE>;
158*4882a593Smuzhiyun	phy-handle = <&qsgmii_phy1>;
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun	status = "okay";
161*4882a593Smuzhiyun};
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun/*
164*4882a593Smuzhiyun * power-supply should switche to vcc3v3_lcd1_n
165*4882a593Smuzhiyun * when mipi panel is connected to dsi1.
166*4882a593Smuzhiyun */
167*4882a593Smuzhiyun&gt1x {
168*4882a593Smuzhiyun	power-supply = <&vcc3v3_lcd0_n>;
169*4882a593Smuzhiyun};
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun&i2c4 {
172*4882a593Smuzhiyun	status = "okay";
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun	gs_mxc6655xa: gs_mxc6655xa@15 {
175*4882a593Smuzhiyun		status = "okay";
176*4882a593Smuzhiyun		compatible = "gs_mxc6655xa";
177*4882a593Smuzhiyun		pinctrl-names = "default";
178*4882a593Smuzhiyun		pinctrl-0 = <&mxc6655xa_irq_gpio>;
179*4882a593Smuzhiyun		reg = <0x15>;
180*4882a593Smuzhiyun		irq-gpio = <&gpio3 RK_PD7 IRQ_TYPE_LEVEL_LOW>;
181*4882a593Smuzhiyun		irq_enable = <0>;
182*4882a593Smuzhiyun		poll_delay_ms = <30>;
183*4882a593Smuzhiyun		type = <SENSOR_TYPE_ACCEL>;
184*4882a593Smuzhiyun		power-off-in-suspend = <1>;
185*4882a593Smuzhiyun		layout = <1>;
186*4882a593Smuzhiyun	};
187*4882a593Smuzhiyun};
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun&i2c5 {
190*4882a593Smuzhiyun	status = "disabled";
191*4882a593Smuzhiyun};
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun&i2s2_2ch {
194*4882a593Smuzhiyun	pinctrl-0 = <&i2s2m0_sclktx &i2s2m0_lrcktx &i2s2m0_sdi &i2s2m0_sdo>;
195*4882a593Smuzhiyun	rockchip,bclk-fs = <32>;
196*4882a593Smuzhiyun	status = "disabled";
197*4882a593Smuzhiyun};
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun&mdio1 {
200*4882a593Smuzhiyun	qsgmii_phy0: phy@0 {
201*4882a593Smuzhiyun		compatible = "ethernet-phy-id001c.c942", "ethernet-phy-ieee802.3-c22";
202*4882a593Smuzhiyun		reg = <0x0>;
203*4882a593Smuzhiyun	};
204*4882a593Smuzhiyun	qsgmii_phy1: phy@1 {
205*4882a593Smuzhiyun		compatible = "ethernet-phy-id001c.c942", "ethernet-phy-ieee802.3-c22";
206*4882a593Smuzhiyun		reg = <0x1>;
207*4882a593Smuzhiyun	};
208*4882a593Smuzhiyun	qsgmii_phy2: phy@2 {
209*4882a593Smuzhiyun		compatible = "ethernet-phy-id001c.c942", "ethernet-phy-ieee802.3-c22";
210*4882a593Smuzhiyun		reg = <0x2>;
211*4882a593Smuzhiyun	};
212*4882a593Smuzhiyun	qsgmii_phy3: phy@3 {
213*4882a593Smuzhiyun		compatible = "ethernet-phy-id001c.c942", "ethernet-phy-ieee802.3-c22";
214*4882a593Smuzhiyun		reg = <0x3>;
215*4882a593Smuzhiyun	};
216*4882a593Smuzhiyun};
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun&video_phy0 {
219*4882a593Smuzhiyun	status = "okay";
220*4882a593Smuzhiyun};
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun&video_phy1 {
223*4882a593Smuzhiyun	status = "disabled";
224*4882a593Smuzhiyun};
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun&pcie2x1 {
227*4882a593Smuzhiyun	reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
228*4882a593Smuzhiyun	vpcie3v3-supply = <&vcc3v3_pcie>;
229*4882a593Smuzhiyun	status = "okay";
230*4882a593Smuzhiyun};
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun&pcie30phy {
233*4882a593Smuzhiyun	status = "okay";
234*4882a593Smuzhiyun};
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun&pcie3x2 {
237*4882a593Smuzhiyun	reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
238*4882a593Smuzhiyun	vpcie3v3-supply = <&vcc3v3_pcie>;
239*4882a593Smuzhiyun	status = "okay";
240*4882a593Smuzhiyun};
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun&pinctrl {
243*4882a593Smuzhiyun	headphone {
244*4882a593Smuzhiyun		hp_det: hp-det {
245*4882a593Smuzhiyun			rockchip,pins = <4 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
246*4882a593Smuzhiyun		};
247*4882a593Smuzhiyun	};
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun	mxc6655xa {
250*4882a593Smuzhiyun		mxc6655xa_irq_gpio: mxc6655xa_irq_gpio {
251*4882a593Smuzhiyun			rockchip,pins = <3 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>;
252*4882a593Smuzhiyun		};
253*4882a593Smuzhiyun	};
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun	sii902x {
256*4882a593Smuzhiyun		sii902x_hdmi_int: sii902x-hdmi-int {
257*4882a593Smuzhiyun			rockchip,pins = <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
258*4882a593Smuzhiyun		};
259*4882a593Smuzhiyun	};
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun	sdio-pwrseq {
262*4882a593Smuzhiyun		wifi_enable_h: wifi-enable-h {
263*4882a593Smuzhiyun			rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
264*4882a593Smuzhiyun		};
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun		wifi_32k: wifi-32k {
267*4882a593Smuzhiyun			rockchip,pins = <2 RK_PC6 1 &pcfg_pull_none>;
268*4882a593Smuzhiyun		};
269*4882a593Smuzhiyun	};
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun	wireless-wlan {
272*4882a593Smuzhiyun		wifi_host_wake_irq: wifi-host-wake-irq {
273*4882a593Smuzhiyun			rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
274*4882a593Smuzhiyun		};
275*4882a593Smuzhiyun	};
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun	wireless-bluetooth {
278*4882a593Smuzhiyun		uart1_gpios: uart1-gpios {
279*4882a593Smuzhiyun			rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
280*4882a593Smuzhiyun		};
281*4882a593Smuzhiyun	};
282*4882a593Smuzhiyun};
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun&pmu_io_domains {
285*4882a593Smuzhiyun	vccio6-supply = <&vcc_3v3>;
286*4882a593Smuzhiyun};
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun&pwm3 {
289*4882a593Smuzhiyun	status = "okay";
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun	compatible = "rockchip,remotectl-pwm";
292*4882a593Smuzhiyun	remote_pwm_id = <3>;
293*4882a593Smuzhiyun	handle_cpu_id = <1>;
294*4882a593Smuzhiyun	remote_support_psci = <0>;
295*4882a593Smuzhiyun	pinctrl-names = "default";
296*4882a593Smuzhiyun	pinctrl-0 = <&pwm3_pins>;
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun	ir_key1 {
299*4882a593Smuzhiyun		rockchip,usercode = <0x4040>;
300*4882a593Smuzhiyun		rockchip,key_table =
301*4882a593Smuzhiyun			<0xf2	KEY_REPLY>,
302*4882a593Smuzhiyun			<0xba	KEY_BACK>,
303*4882a593Smuzhiyun			<0xf4	KEY_UP>,
304*4882a593Smuzhiyun			<0xf1	KEY_DOWN>,
305*4882a593Smuzhiyun			<0xef	KEY_LEFT>,
306*4882a593Smuzhiyun			<0xee	KEY_RIGHT>,
307*4882a593Smuzhiyun			<0xbd	KEY_HOME>,
308*4882a593Smuzhiyun			<0xea	KEY_VOLUMEUP>,
309*4882a593Smuzhiyun			<0xe3	KEY_VOLUMEDOWN>,
310*4882a593Smuzhiyun			<0xe2	KEY_SEARCH>,
311*4882a593Smuzhiyun			<0xb2	KEY_POWER>,
312*4882a593Smuzhiyun			<0xbc	KEY_MUTE>,
313*4882a593Smuzhiyun			<0xec	KEY_MENU>,
314*4882a593Smuzhiyun			<0xbf	0x190>,
315*4882a593Smuzhiyun			<0xe0	0x191>,
316*4882a593Smuzhiyun			<0xe1	0x192>,
317*4882a593Smuzhiyun			<0xe9	183>,
318*4882a593Smuzhiyun			<0xe6	248>,
319*4882a593Smuzhiyun			<0xe8	185>,
320*4882a593Smuzhiyun			<0xe7	186>,
321*4882a593Smuzhiyun			<0xf0	388>,
322*4882a593Smuzhiyun			<0xbe	0x175>;
323*4882a593Smuzhiyun	};
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun	ir_key2 {
326*4882a593Smuzhiyun		rockchip,usercode = <0xff00>;
327*4882a593Smuzhiyun		rockchip,key_table =
328*4882a593Smuzhiyun			<0xf9	KEY_HOME>,
329*4882a593Smuzhiyun			<0xbf	KEY_BACK>,
330*4882a593Smuzhiyun			<0xfb	KEY_MENU>,
331*4882a593Smuzhiyun			<0xaa	KEY_REPLY>,
332*4882a593Smuzhiyun			<0xb9	KEY_UP>,
333*4882a593Smuzhiyun			<0xe9	KEY_DOWN>,
334*4882a593Smuzhiyun			<0xb8	KEY_LEFT>,
335*4882a593Smuzhiyun			<0xea	KEY_RIGHT>,
336*4882a593Smuzhiyun			<0xeb	KEY_VOLUMEDOWN>,
337*4882a593Smuzhiyun			<0xef	KEY_VOLUMEUP>,
338*4882a593Smuzhiyun			<0xf7	KEY_MUTE>,
339*4882a593Smuzhiyun			<0xe7	KEY_POWER>,
340*4882a593Smuzhiyun			<0xfc	KEY_POWER>,
341*4882a593Smuzhiyun			<0xa9	KEY_VOLUMEDOWN>,
342*4882a593Smuzhiyun			<0xa8	KEY_VOLUMEDOWN>,
343*4882a593Smuzhiyun			<0xe0	KEY_VOLUMEDOWN>,
344*4882a593Smuzhiyun			<0xa5	KEY_VOLUMEDOWN>,
345*4882a593Smuzhiyun			<0xab	183>,
346*4882a593Smuzhiyun			<0xb7	388>,
347*4882a593Smuzhiyun			<0xe8	388>,
348*4882a593Smuzhiyun			<0xf8	184>,
349*4882a593Smuzhiyun			<0xaf	185>,
350*4882a593Smuzhiyun			<0xed	KEY_VOLUMEDOWN>,
351*4882a593Smuzhiyun			<0xee	186>,
352*4882a593Smuzhiyun			<0xb3	KEY_VOLUMEDOWN>,
353*4882a593Smuzhiyun			<0xf1	KEY_VOLUMEDOWN>,
354*4882a593Smuzhiyun			<0xf2	KEY_VOLUMEDOWN>,
355*4882a593Smuzhiyun			<0xf3	KEY_SEARCH>,
356*4882a593Smuzhiyun			<0xb4	KEY_VOLUMEDOWN>,
357*4882a593Smuzhiyun			<0xbe	KEY_SEARCH>;
358*4882a593Smuzhiyun	};
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun	ir_key3 {
361*4882a593Smuzhiyun		rockchip,usercode = <0x1dcc>;
362*4882a593Smuzhiyun		rockchip,key_table =
363*4882a593Smuzhiyun			<0xee	KEY_REPLY>,
364*4882a593Smuzhiyun			<0xf0	KEY_BACK>,
365*4882a593Smuzhiyun			<0xf8	KEY_UP>,
366*4882a593Smuzhiyun			<0xbb	KEY_DOWN>,
367*4882a593Smuzhiyun			<0xef	KEY_LEFT>,
368*4882a593Smuzhiyun			<0xed	KEY_RIGHT>,
369*4882a593Smuzhiyun			<0xfc	KEY_HOME>,
370*4882a593Smuzhiyun			<0xf1	KEY_VOLUMEUP>,
371*4882a593Smuzhiyun			<0xfd	KEY_VOLUMEDOWN>,
372*4882a593Smuzhiyun			<0xb7	KEY_SEARCH>,
373*4882a593Smuzhiyun			<0xff	KEY_POWER>,
374*4882a593Smuzhiyun			<0xf3	KEY_MUTE>,
375*4882a593Smuzhiyun			<0xbf	KEY_MENU>,
376*4882a593Smuzhiyun			<0xf9	0x191>,
377*4882a593Smuzhiyun			<0xf5	0x192>,
378*4882a593Smuzhiyun			<0xb3	388>,
379*4882a593Smuzhiyun			<0xbe	KEY_1>,
380*4882a593Smuzhiyun			<0xba	KEY_2>,
381*4882a593Smuzhiyun			<0xb2	KEY_3>,
382*4882a593Smuzhiyun			<0xbd	KEY_4>,
383*4882a593Smuzhiyun			<0xf9	KEY_5>,
384*4882a593Smuzhiyun			<0xb1	KEY_6>,
385*4882a593Smuzhiyun			<0xfc	KEY_7>,
386*4882a593Smuzhiyun			<0xf8	KEY_8>,
387*4882a593Smuzhiyun			<0xb0	KEY_9>,
388*4882a593Smuzhiyun			<0xb6	KEY_0>,
389*4882a593Smuzhiyun			<0xb5	KEY_BACKSPACE>;
390*4882a593Smuzhiyun	};
391*4882a593Smuzhiyun};
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun&pwm7 {
394*4882a593Smuzhiyun	status = "disabled";
395*4882a593Smuzhiyun};
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun&route_dsi0 {
398*4882a593Smuzhiyun	status = "okay";
399*4882a593Smuzhiyun	connect = <&vp1_out_dsi0>;
400*4882a593Smuzhiyun};
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun&sdio_pwrseq {
403*4882a593Smuzhiyun	clocks = <&pmucru CLK_RTC_32K>;
404*4882a593Smuzhiyun	pinctrl-0 = <&wifi_enable_h &wifi_32k>;
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun	/*
407*4882a593Smuzhiyun	 * On the module itself this is one of these (depending
408*4882a593Smuzhiyun	 * on the actual card populated):
409*4882a593Smuzhiyun	 * - SDIO_RESET_L_WL_REG_ON
410*4882a593Smuzhiyun	 * - PDN (power down when low)
411*4882a593Smuzhiyun	 */
412*4882a593Smuzhiyun	reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
413*4882a593Smuzhiyun};
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun&sdmmc1 {
416*4882a593Smuzhiyun	max-frequency = <150000000>;
417*4882a593Smuzhiyun	no-sd;
418*4882a593Smuzhiyun	no-mmc;
419*4882a593Smuzhiyun	bus-width = <4>;
420*4882a593Smuzhiyun	disable-wp;
421*4882a593Smuzhiyun	cap-sd-highspeed;
422*4882a593Smuzhiyun	cap-sdio-irq;
423*4882a593Smuzhiyun	keep-power-in-suspend;
424*4882a593Smuzhiyun	mmc-pwrseq = <&sdio_pwrseq>;
425*4882a593Smuzhiyun	non-removable;
426*4882a593Smuzhiyun	pinctrl-names = "default";
427*4882a593Smuzhiyun	pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
428*4882a593Smuzhiyun	sd-uhs-sdr104;
429*4882a593Smuzhiyun	status = "okay";
430*4882a593Smuzhiyun};
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun&sdmmc2 {
433*4882a593Smuzhiyun	status = "disabled";
434*4882a593Smuzhiyun};
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun&uart1 {
437*4882a593Smuzhiyun	status = "okay";
438*4882a593Smuzhiyun	pinctrl-names = "default";
439*4882a593Smuzhiyun	pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
440*4882a593Smuzhiyun};
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun&vcc3v3_lcd0_n {
443*4882a593Smuzhiyun	gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
444*4882a593Smuzhiyun	enable-active-high;
445*4882a593Smuzhiyun};
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun&vcc3v3_lcd1_n {
448*4882a593Smuzhiyun	gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
449*4882a593Smuzhiyun	enable-active-high;
450*4882a593Smuzhiyun};
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun&wireless_wlan {
453*4882a593Smuzhiyun	pinctrl-names = "default";
454*4882a593Smuzhiyun	pinctrl-0 = <&wifi_host_wake_irq>;
455*4882a593Smuzhiyun	WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
456*4882a593Smuzhiyun	WIFI,poweren_gpio = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>;
457*4882a593Smuzhiyun};
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun&wireless_bluetooth {
460*4882a593Smuzhiyun	compatible = "bluetooth-platdata";
461*4882a593Smuzhiyun	clocks = <&pmucru CLK_RTC_32K>;
462*4882a593Smuzhiyun	clock-names = "ext_clock";
463*4882a593Smuzhiyun	//wifi-bt-power-toggle;
464*4882a593Smuzhiyun	uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
465*4882a593Smuzhiyun	pinctrl-names = "default", "rts_gpio";
466*4882a593Smuzhiyun	pinctrl-0 = <&uart1m0_rtsn>;
467*4882a593Smuzhiyun	pinctrl-1 = <&uart1_gpios>;
468*4882a593Smuzhiyun	BT,reset_gpio    = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
469*4882a593Smuzhiyun	BT,wake_gpio     = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
470*4882a593Smuzhiyun	BT,wake_host_irq = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
471*4882a593Smuzhiyun	status = "okay";
472*4882a593Smuzhiyun};
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun&xpcs {
475*4882a593Smuzhiyun	status = "okay";
476*4882a593Smuzhiyun};
477