1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2022 Rockchip Electronics Co., Ltd. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/ { 7*4882a593Smuzhiyun rockchip_amp: rockchip-amp { 8*4882a593Smuzhiyun compatible = "rockchip,mcu-amp"; 9*4882a593Smuzhiyun clocks = <&cru FCLK_BUS_CM0_CORE>, <&cru CLK_BUS_CM0_RTC>, 10*4882a593Smuzhiyun <&cru PCLK_MAILBOX>, <&cru PCLK_INTC>, 11*4882a593Smuzhiyun <&cru SCLK_UART7>, <&cru PCLK_UART7>, 12*4882a593Smuzhiyun <&cru PCLK_TIMER>, <&cru CLK_TIMER4>, <&cru CLK_TIMER5>; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun pinctrl-names = "default"; 15*4882a593Smuzhiyun pinctrl-0 = <&uart7m1_xfer>; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun status = "okay"; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun rpmsg: rpmsg@a0000000 { 21*4882a593Smuzhiyun compatible = "rockchip,rk3562-rpmsg"; 22*4882a593Smuzhiyun mbox-names = "rpmsg-rx", "rpmsg-tx"; 23*4882a593Smuzhiyun mboxes = <&mailbox 0 &mailbox 3>; 24*4882a593Smuzhiyun rockchip,vdev-nums = <1>; 25*4882a593Smuzhiyun rockchip,link-id = <0x04>; 26*4882a593Smuzhiyun reg = <0x0 0xa0000000 0x0 0x20000>; 27*4882a593Smuzhiyun memory-region = <&rpmsg_dma_reserved>; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun status = "okay"; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun reserved-memory { 33*4882a593Smuzhiyun #address-cells = <2>; 34*4882a593Smuzhiyun #size-cells = <2>; 35*4882a593Smuzhiyun ranges; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun /* mcu address */ 38*4882a593Smuzhiyun mcu_reserved: mcu@8200000 { 39*4882a593Smuzhiyun reg = <0x0 0x8200000 0x0 0x100000>; 40*4882a593Smuzhiyun no-map; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun rpmsg_reserved: rpmsg@a0000000 { 44*4882a593Smuzhiyun reg = <0x0 0xa0000000 0x0 0x400000>; 45*4882a593Smuzhiyun no-map; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun rpmsg_dma_reserved: rpmsg-dma@a0400000 { 49*4882a593Smuzhiyun compatible = "shared-dma-pool"; 50*4882a593Smuzhiyun reg = <0x0 0xa0400000 0x0 0x100000>; 51*4882a593Smuzhiyun no-map; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun}; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun&mailbox { 57*4882a593Smuzhiyun status = "okay"; 58*4882a593Smuzhiyun}; 59