1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd 4*4882a593Smuzhiyun * Copyright (c) 2019 Vamrs Limited 5*4882a593Smuzhiyun * Copyright (c) 2019 Amarula Solutions(India) 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 9*4882a593Smuzhiyun#include <dt-bindings/pinctrl/rockchip.h> 10*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun compatible = "vamrs,rk3399pro-vmarc-som", "rockchip,rk3399pro"; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun vcc3v3_pcie: vcc-pcie-regulator { 16*4882a593Smuzhiyun compatible = "regulator-fixed"; 17*4882a593Smuzhiyun enable-active-high; 18*4882a593Smuzhiyun gpio = <&gpio4 RK_PD4 GPIO_ACTIVE_HIGH>; 19*4882a593Smuzhiyun pinctrl-names = "default"; 20*4882a593Smuzhiyun pinctrl-0 = <&pcie_pwr>; 21*4882a593Smuzhiyun regulator-name = "vcc3v3_pcie"; 22*4882a593Smuzhiyun regulator-always-on; 23*4882a593Smuzhiyun regulator-boot-on; 24*4882a593Smuzhiyun vin-supply = <&vcc5v0_sys>; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun}; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun&cpu_l0 { 29*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_l>; 30*4882a593Smuzhiyun}; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun&cpu_l1 { 33*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_l>; 34*4882a593Smuzhiyun}; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun&cpu_l2 { 37*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_l>; 38*4882a593Smuzhiyun}; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun&cpu_l3 { 41*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_l>; 42*4882a593Smuzhiyun}; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun&emmc_phy { 45*4882a593Smuzhiyun status = "okay"; 46*4882a593Smuzhiyun}; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun&gmac { 49*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_RMII_SRC>; 50*4882a593Smuzhiyun phy-supply = <&vcc_lan>; 51*4882a593Smuzhiyun snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 52*4882a593Smuzhiyun}; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun&hdmi { 55*4882a593Smuzhiyun ddc-i2c-bus = <&i2c3>; 56*4882a593Smuzhiyun pinctrl-names = "default"; 57*4882a593Smuzhiyun pinctrl-0 = <&hdmi_cec>; 58*4882a593Smuzhiyun}; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun&i2c0 { 61*4882a593Smuzhiyun clock-frequency = <400000>; 62*4882a593Smuzhiyun i2c-scl-falling-time-ns = <30>; 63*4882a593Smuzhiyun i2c-scl-rising-time-ns = <180>; 64*4882a593Smuzhiyun status = "okay"; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun rk809: pmic@20 { 67*4882a593Smuzhiyun compatible = "rockchip,rk809"; 68*4882a593Smuzhiyun reg = <0x20>; 69*4882a593Smuzhiyun interrupt-parent = <&gpio1>; 70*4882a593Smuzhiyun interrupts = <RK_PC2 IRQ_TYPE_LEVEL_LOW>; 71*4882a593Smuzhiyun #clock-cells = <1>; 72*4882a593Smuzhiyun clock-output-names = "rk808-clkout1", "rk808-clkout2"; 73*4882a593Smuzhiyun pinctrl-names = "default"; 74*4882a593Smuzhiyun pinctrl-0 = <&pmic_int_l>; 75*4882a593Smuzhiyun rockchip,system-power-controller; 76*4882a593Smuzhiyun wakeup-source; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun vcc1-supply = <&vcc5v0_sys>; 79*4882a593Smuzhiyun vcc2-supply = <&vcc5v0_sys>; 80*4882a593Smuzhiyun vcc3-supply = <&vcc5v0_sys>; 81*4882a593Smuzhiyun vcc4-supply = <&vcc5v0_sys>; 82*4882a593Smuzhiyun vcc5-supply = <&vcc_buck5>; 83*4882a593Smuzhiyun vcc6-supply = <&vcc_buck5>; 84*4882a593Smuzhiyun vcc7-supply = <&vcc5v0_sys>; 85*4882a593Smuzhiyun vcc8-supply = <&vcc3v3_sys>; 86*4882a593Smuzhiyun vcc9-supply = <&vcc5v0_sys>; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun regulators { 89*4882a593Smuzhiyun vdd_log: DCDC_REG1 { 90*4882a593Smuzhiyun regulator-name = "vdd_log"; 91*4882a593Smuzhiyun regulator-always-on; 92*4882a593Smuzhiyun regulator-boot-on; 93*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 94*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 95*4882a593Smuzhiyun regulator-initial-mode = <0x2>; 96*4882a593Smuzhiyun regulator-state-mem { 97*4882a593Smuzhiyun regulator-off-in-suspend; 98*4882a593Smuzhiyun regulator-suspend-microvolt = <900000>; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun vdd_cpu_l: DCDC_REG2 { 103*4882a593Smuzhiyun regulator-name = "vdd_cpu_l"; 104*4882a593Smuzhiyun regulator-always-on; 105*4882a593Smuzhiyun regulator-boot-on; 106*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 107*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 108*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 109*4882a593Smuzhiyun regulator-initial-mode = <0x2>; 110*4882a593Smuzhiyun regulator-state-mem { 111*4882a593Smuzhiyun regulator-off-in-suspend; 112*4882a593Smuzhiyun }; 113*4882a593Smuzhiyun }; 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 116*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 117*4882a593Smuzhiyun regulator-always-on; 118*4882a593Smuzhiyun regulator-boot-on; 119*4882a593Smuzhiyun regulator-initial-mode = <0x2>; 120*4882a593Smuzhiyun regulator-state-mem { 121*4882a593Smuzhiyun regulator-on-in-suspend; 122*4882a593Smuzhiyun }; 123*4882a593Smuzhiyun }; 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun vcc3v3_sys: DCDC_REG4 { 126*4882a593Smuzhiyun regulator-name = "vcc3v3_sys"; 127*4882a593Smuzhiyun regulator-always-on; 128*4882a593Smuzhiyun regulator-boot-on; 129*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 130*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 131*4882a593Smuzhiyun regulator-initial-mode = <0x2>; 132*4882a593Smuzhiyun regulator-state-mem { 133*4882a593Smuzhiyun regulator-on-in-suspend; 134*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 135*4882a593Smuzhiyun }; 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun vcc_buck5: DCDC_REG5 { 139*4882a593Smuzhiyun regulator-name = "vcc_buck5"; 140*4882a593Smuzhiyun regulator-always-on; 141*4882a593Smuzhiyun regulator-boot-on; 142*4882a593Smuzhiyun regulator-min-microvolt = <2200000>; 143*4882a593Smuzhiyun regulator-max-microvolt = <2200000>; 144*4882a593Smuzhiyun regulator-state-mem { 145*4882a593Smuzhiyun regulator-on-in-suspend; 146*4882a593Smuzhiyun regulator-suspend-microvolt = <2200000>; 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun vcca_0v9: LDO_REG1 { 151*4882a593Smuzhiyun regulator-name = "vcca_0v9"; 152*4882a593Smuzhiyun regulator-always-on; 153*4882a593Smuzhiyun regulator-boot-on; 154*4882a593Smuzhiyun regulator-min-microvolt = <900000>; 155*4882a593Smuzhiyun regulator-max-microvolt = <900000>; 156*4882a593Smuzhiyun regulator-state-mem { 157*4882a593Smuzhiyun regulator-on-in-suspend; 158*4882a593Smuzhiyun regulator-suspend-microvolt = <900000>; 159*4882a593Smuzhiyun }; 160*4882a593Smuzhiyun }; 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun vcc_1v8: LDO_REG2 { 163*4882a593Smuzhiyun regulator-name = "vcc_1v8"; 164*4882a593Smuzhiyun regulator-always-on; 165*4882a593Smuzhiyun regulator-boot-on; 166*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 167*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 168*4882a593Smuzhiyun regulator-state-mem { 169*4882a593Smuzhiyun regulator-on-in-suspend; 170*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 171*4882a593Smuzhiyun }; 172*4882a593Smuzhiyun }; 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun vcc_0v9: LDO_REG3 { 175*4882a593Smuzhiyun regulator-name = "vcc_0v9"; 176*4882a593Smuzhiyun regulator-always-on; 177*4882a593Smuzhiyun regulator-boot-on; 178*4882a593Smuzhiyun regulator-min-microvolt = <900000>; 179*4882a593Smuzhiyun regulator-max-microvolt = <900000>; 180*4882a593Smuzhiyun regulator-state-mem { 181*4882a593Smuzhiyun regulator-on-in-suspend; 182*4882a593Smuzhiyun regulator-suspend-microvolt = <900000>; 183*4882a593Smuzhiyun }; 184*4882a593Smuzhiyun }; 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun vcca_1v8: LDO_REG4 { 187*4882a593Smuzhiyun regulator-name = "vcca_1v8"; 188*4882a593Smuzhiyun regulator-always-on; 189*4882a593Smuzhiyun regulator-boot-on; 190*4882a593Smuzhiyun regulator-min-microvolt = <1850000>; 191*4882a593Smuzhiyun regulator-max-microvolt = <1850000>; 192*4882a593Smuzhiyun regulator-state-mem { 193*4882a593Smuzhiyun regulator-on-in-suspend; 194*4882a593Smuzhiyun regulator-suspend-microvolt = <1850000>; 195*4882a593Smuzhiyun }; 196*4882a593Smuzhiyun }; 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun /* 199*4882a593Smuzhiyun * As per BSP, but schematic not showing any regulator 200*4882a593Smuzhiyun * pin for LD05. 201*4882a593Smuzhiyun */ 202*4882a593Smuzhiyun vdd1v5_dvp: LDO_REG5 { 203*4882a593Smuzhiyun regulator-name = "vdd1v5_dvp"; 204*4882a593Smuzhiyun regulator-always-on; 205*4882a593Smuzhiyun regulator-boot-on; 206*4882a593Smuzhiyun regulator-min-microvolt = <1500000>; 207*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 208*4882a593Smuzhiyun regulator-state-mem { 209*4882a593Smuzhiyun regulator-off-in-suspend; 210*4882a593Smuzhiyun }; 211*4882a593Smuzhiyun }; 212*4882a593Smuzhiyun 213*4882a593Smuzhiyun vcc_1v5: LDO_REG6 { 214*4882a593Smuzhiyun regulator-name = "vcc_1v5"; 215*4882a593Smuzhiyun regulator-always-on; 216*4882a593Smuzhiyun regulator-boot-on; 217*4882a593Smuzhiyun regulator-min-microvolt = <1500000>; 218*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 219*4882a593Smuzhiyun regulator-state-mem { 220*4882a593Smuzhiyun regulator-off-in-suspend; 221*4882a593Smuzhiyun }; 222*4882a593Smuzhiyun }; 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun vccio_3v0: LDO_REG7 { 225*4882a593Smuzhiyun regulator-name = "vccio_3v0"; 226*4882a593Smuzhiyun regulator-always-on; 227*4882a593Smuzhiyun regulator-boot-on; 228*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 229*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 230*4882a593Smuzhiyun regulator-state-mem { 231*4882a593Smuzhiyun regulator-off-in-suspend; 232*4882a593Smuzhiyun }; 233*4882a593Smuzhiyun }; 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun vccio_sd: LDO_REG8 { 236*4882a593Smuzhiyun regulator-name = "vccio_sd"; 237*4882a593Smuzhiyun regulator-always-on; 238*4882a593Smuzhiyun regulator-boot-on; 239*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 240*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 241*4882a593Smuzhiyun regulator-state-mem { 242*4882a593Smuzhiyun regulator-off-in-suspend; 243*4882a593Smuzhiyun }; 244*4882a593Smuzhiyun }; 245*4882a593Smuzhiyun 246*4882a593Smuzhiyun /* 247*4882a593Smuzhiyun * As per BSP, but schematic not showing any regulator 248*4882a593Smuzhiyun * pin for LD09. 249*4882a593Smuzhiyun */ 250*4882a593Smuzhiyun vcc_sd: LDO_REG9 { 251*4882a593Smuzhiyun regulator-name = "vcc_sd"; 252*4882a593Smuzhiyun regulator-always-on; 253*4882a593Smuzhiyun regulator-boot-on; 254*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 255*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 256*4882a593Smuzhiyun regulator-state-mem { 257*4882a593Smuzhiyun regulator-off-in-suspend; 258*4882a593Smuzhiyun }; 259*4882a593Smuzhiyun }; 260*4882a593Smuzhiyun 261*4882a593Smuzhiyun vcc5v0_usb2: SWITCH_REG1 { 262*4882a593Smuzhiyun regulator-name = "vcc5v0_usb2"; 263*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 264*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 265*4882a593Smuzhiyun regulator-state-mem { 266*4882a593Smuzhiyun regulator-on-in-suspend; 267*4882a593Smuzhiyun regulator-suspend-microvolt = <5000000>; 268*4882a593Smuzhiyun }; 269*4882a593Smuzhiyun }; 270*4882a593Smuzhiyun 271*4882a593Smuzhiyun vccio_3v3: vcc_lan: SWITCH_REG2 { 272*4882a593Smuzhiyun regulator-name = "vccio_3v3"; 273*4882a593Smuzhiyun regulator-always-on; 274*4882a593Smuzhiyun regulator-boot-on; 275*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 276*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 277*4882a593Smuzhiyun regulator-state-mem { 278*4882a593Smuzhiyun regulator-off-in-suspend; 279*4882a593Smuzhiyun }; 280*4882a593Smuzhiyun }; 281*4882a593Smuzhiyun }; 282*4882a593Smuzhiyun }; 283*4882a593Smuzhiyun}; 284*4882a593Smuzhiyun 285*4882a593Smuzhiyun&i2c1 { 286*4882a593Smuzhiyun i2c-scl-falling-time-ns = <30>; 287*4882a593Smuzhiyun i2c-scl-rising-time-ns = <140>; 288*4882a593Smuzhiyun status = "okay"; 289*4882a593Smuzhiyun}; 290*4882a593Smuzhiyun 291*4882a593Smuzhiyun&i2c2 { 292*4882a593Smuzhiyun clock-frequency = <400000>; 293*4882a593Smuzhiyun status = "okay"; 294*4882a593Smuzhiyun 295*4882a593Smuzhiyun hym8563: hym8563@51 { 296*4882a593Smuzhiyun compatible = "haoyu,hym8563"; 297*4882a593Smuzhiyun reg = <0x51>; 298*4882a593Smuzhiyun #clock-cells = <0>; 299*4882a593Smuzhiyun clock-frequency = <32768>; 300*4882a593Smuzhiyun clock-output-names = "hym8563"; 301*4882a593Smuzhiyun pinctrl-names = "default"; 302*4882a593Smuzhiyun pinctrl-0 = <&hym8563_int>; 303*4882a593Smuzhiyun interrupt-parent = <&gpio4>; 304*4882a593Smuzhiyun interrupts = <RK_PD6 IRQ_TYPE_LEVEL_LOW>; 305*4882a593Smuzhiyun }; 306*4882a593Smuzhiyun}; 307*4882a593Smuzhiyun 308*4882a593Smuzhiyun&i2c3 { 309*4882a593Smuzhiyun i2c-scl-rising-time-ns = <450>; 310*4882a593Smuzhiyun i2c-scl-falling-time-ns = <15>; 311*4882a593Smuzhiyun status = "okay"; 312*4882a593Smuzhiyun}; 313*4882a593Smuzhiyun 314*4882a593Smuzhiyun&io_domains { 315*4882a593Smuzhiyun status = "okay"; 316*4882a593Smuzhiyun bt656-supply = <&vcca_1v8>; 317*4882a593Smuzhiyun gpio1830-supply = <&vccio_3v0>; 318*4882a593Smuzhiyun sdmmc-supply = <&vccio_sd>; 319*4882a593Smuzhiyun}; 320*4882a593Smuzhiyun 321*4882a593Smuzhiyun&pcie_phy { 322*4882a593Smuzhiyun status = "okay"; 323*4882a593Smuzhiyun}; 324*4882a593Smuzhiyun 325*4882a593Smuzhiyun&pcie0 { 326*4882a593Smuzhiyun ep-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; 327*4882a593Smuzhiyun max-link-speed = <2>; 328*4882a593Smuzhiyun num-lanes = <4>; 329*4882a593Smuzhiyun pinctrl-0 = <&pcie_clkreqnb_cpm>; 330*4882a593Smuzhiyun pinctrl-names = "default"; 331*4882a593Smuzhiyun vpcie0v9-supply = <&vcca_0v9>; /* VCC_0V9_S0 */ 332*4882a593Smuzhiyun vpcie1v8-supply = <&vcca_1v8>; /* VCC_1V8_S0 */ 333*4882a593Smuzhiyun vpcie3v3-supply = <&vcc3v3_pcie>; 334*4882a593Smuzhiyun status = "okay"; 335*4882a593Smuzhiyun}; 336*4882a593Smuzhiyun 337*4882a593Smuzhiyun&pinctrl { 338*4882a593Smuzhiyun hym8563 { 339*4882a593Smuzhiyun hym8563_int: hym8563-int { 340*4882a593Smuzhiyun rockchip,pins = <4 RK_PD6 0 &pcfg_pull_up>; 341*4882a593Smuzhiyun }; 342*4882a593Smuzhiyun }; 343*4882a593Smuzhiyun 344*4882a593Smuzhiyun pcie { 345*4882a593Smuzhiyun pcie_pwr: pcie-pwr { 346*4882a593Smuzhiyun rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; 347*4882a593Smuzhiyun }; 348*4882a593Smuzhiyun }; 349*4882a593Smuzhiyun 350*4882a593Smuzhiyun pmic { 351*4882a593Smuzhiyun pmic_int_l: pmic-int-l { 352*4882a593Smuzhiyun rockchip,pins = <1 RK_PC2 0 &pcfg_pull_up>; 353*4882a593Smuzhiyun }; 354*4882a593Smuzhiyun }; 355*4882a593Smuzhiyun 356*4882a593Smuzhiyun vbus_host { 357*4882a593Smuzhiyun usb1_en_oc: usb1-en-oc { 358*4882a593Smuzhiyun rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>; 359*4882a593Smuzhiyun }; 360*4882a593Smuzhiyun }; 361*4882a593Smuzhiyun 362*4882a593Smuzhiyun vbus_typec { 363*4882a593Smuzhiyun usb0_en_oc: usb0-en-oc { 364*4882a593Smuzhiyun rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>; 365*4882a593Smuzhiyun }; 366*4882a593Smuzhiyun }; 367*4882a593Smuzhiyun}; 368*4882a593Smuzhiyun 369*4882a593Smuzhiyun&pmu_io_domains { 370*4882a593Smuzhiyun status = "okay"; 371*4882a593Smuzhiyun pmu1830-supply = <&vcc_1v8>; 372*4882a593Smuzhiyun}; 373*4882a593Smuzhiyun 374*4882a593Smuzhiyun&sdhci { 375*4882a593Smuzhiyun bus-width = <8>; 376*4882a593Smuzhiyun mmc-hs400-1_8v; 377*4882a593Smuzhiyun mmc-hs400-enhanced-strobe; 378*4882a593Smuzhiyun non-removable; 379*4882a593Smuzhiyun status = "okay"; 380*4882a593Smuzhiyun}; 381*4882a593Smuzhiyun 382*4882a593Smuzhiyun&sdmmc { 383*4882a593Smuzhiyun cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; 384*4882a593Smuzhiyun max-frequency = <150000000>; 385*4882a593Smuzhiyun}; 386*4882a593Smuzhiyun 387*4882a593Smuzhiyun&tcphy0 { 388*4882a593Smuzhiyun status = "okay"; 389*4882a593Smuzhiyun}; 390*4882a593Smuzhiyun 391*4882a593Smuzhiyun&tsadc { 392*4882a593Smuzhiyun rockchip,hw-tshut-mode = <1>; 393*4882a593Smuzhiyun rockchip,hw-tshut-polarity = <1>; 394*4882a593Smuzhiyun status = "okay"; 395*4882a593Smuzhiyun}; 396*4882a593Smuzhiyun 397*4882a593Smuzhiyun&u2phy0 { 398*4882a593Smuzhiyun status = "okay"; 399*4882a593Smuzhiyun 400*4882a593Smuzhiyun u2phy0_otg: otg-port { 401*4882a593Smuzhiyun phy-supply = <&vbus_typec>; 402*4882a593Smuzhiyun status = "okay"; 403*4882a593Smuzhiyun }; 404*4882a593Smuzhiyun 405*4882a593Smuzhiyun u2phy0_host: host-port { 406*4882a593Smuzhiyun phy-supply = <&vbus_host>; 407*4882a593Smuzhiyun status = "okay"; 408*4882a593Smuzhiyun }; 409*4882a593Smuzhiyun}; 410*4882a593Smuzhiyun 411*4882a593Smuzhiyun 412*4882a593Smuzhiyun&u2phy1 { 413*4882a593Smuzhiyun status = "okay"; 414*4882a593Smuzhiyun 415*4882a593Smuzhiyun u2phy1_host: host-port { 416*4882a593Smuzhiyun phy-supply = <&vbus_host>; 417*4882a593Smuzhiyun status = "okay"; 418*4882a593Smuzhiyun }; 419*4882a593Smuzhiyun}; 420*4882a593Smuzhiyun 421*4882a593Smuzhiyun&usb_host0_ehci { 422*4882a593Smuzhiyun status = "okay"; 423*4882a593Smuzhiyun}; 424*4882a593Smuzhiyun 425*4882a593Smuzhiyun&usb_host0_ohci { 426*4882a593Smuzhiyun status = "okay"; 427*4882a593Smuzhiyun}; 428*4882a593Smuzhiyun 429*4882a593Smuzhiyun&usb_host1_ehci { 430*4882a593Smuzhiyun status = "okay"; 431*4882a593Smuzhiyun}; 432*4882a593Smuzhiyun 433*4882a593Smuzhiyun&usb_host1_ohci { 434*4882a593Smuzhiyun status = "okay"; 435*4882a593Smuzhiyun}; 436*4882a593Smuzhiyun 437*4882a593Smuzhiyun&usbdrd3_0 { 438*4882a593Smuzhiyun status = "okay"; 439*4882a593Smuzhiyun}; 440*4882a593Smuzhiyun 441*4882a593Smuzhiyun&usbdrd_dwc3_0 { 442*4882a593Smuzhiyun status = "okay"; 443*4882a593Smuzhiyun}; 444*4882a593Smuzhiyun 445*4882a593Smuzhiyun&vbus_host { 446*4882a593Smuzhiyun enable-active-high; 447*4882a593Smuzhiyun gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; /* USB1_EN_OC# */ 448*4882a593Smuzhiyun pinctrl-names = "default"; 449*4882a593Smuzhiyun pinctrl-0 = <&usb1_en_oc>; 450*4882a593Smuzhiyun}; 451*4882a593Smuzhiyun 452*4882a593Smuzhiyun&vbus_typec { 453*4882a593Smuzhiyun enable-active-high; 454*4882a593Smuzhiyun gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; /* USB0_EN_OC# */ 455*4882a593Smuzhiyun pinctrl-names = "default"; 456*4882a593Smuzhiyun pinctrl-0 = <&usb0_en_oc>; 457*4882a593Smuzhiyun}; 458