xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm64/rockchip/rk3399pro-evb-v14-linux.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun/dts-v1/;
8*4882a593Smuzhiyun#include "rk3399pro-evb-v11-linux.dts"
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun/ {
11*4882a593Smuzhiyun	model = "Rockchip RK3399pro evb v14 board for linux";
12*4882a593Smuzhiyun	compatible = "rockchip,rk3399pro-evb-v14-linux", "rockchip,rk3399pro";
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun	reserved-memory {
15*4882a593Smuzhiyun		#address-cells = <2>;
16*4882a593Smuzhiyun		#size-cells = <2>;
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun		dma_trans: dma_trans@3c000000 {
19*4882a593Smuzhiyun			//no-map;
20*4882a593Smuzhiyun			reg = <0x0 0x3c000000 0x0 0x04000000>;
21*4882a593Smuzhiyun		};
22*4882a593Smuzhiyun	};
23*4882a593Smuzhiyun};
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun/delete-node/ &imx327;
26*4882a593Smuzhiyun/delete-node/ &ov13850;
27*4882a593Smuzhiyun/delete-node/ &vm149c;
28*4882a593Smuzhiyun&i2c1 {
29*4882a593Smuzhiyun	status = "okay";
30*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <345>;
31*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <11>;
32*4882a593Smuzhiyun	pinctrl-0 = <&i2c1_xfer>, <&cam_pwren_high>;
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun	jaguar1: jaguar1@30 {
35*4882a593Smuzhiyun		compatible = "jaguar1-v4l2";
36*4882a593Smuzhiyun		status = "okay";
37*4882a593Smuzhiyun		reg = <0x30>;
38*4882a593Smuzhiyun		clocks = <&cru SCLK_CIF_OUT>;
39*4882a593Smuzhiyun		clock-names = "xvclk";
40*4882a593Smuzhiyun		/*
41*4882a593Smuzhiyun		 * pd-gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>; // conflict with csi-ctl-gpios
42*4882a593Smuzhiyun		 * rst-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
43*4882a593Smuzhiyun		 */
44*4882a593Smuzhiyun		rockchip,camera-module-index = <0>;
45*4882a593Smuzhiyun		rockchip,camera-module-facing = "back";
46*4882a593Smuzhiyun		rockchip,camera-module-name = "jaguar1";
47*4882a593Smuzhiyun		rockchip,camera-module-lens-name = "jaguar1";
48*4882a593Smuzhiyun		port {
49*4882a593Smuzhiyun			cam_out: endpoint {
50*4882a593Smuzhiyun				remote-endpoint = <&usbacm_video_control_in>;
51*4882a593Smuzhiyun				data-lanes = <1 2 3 4>;
52*4882a593Smuzhiyun			};
53*4882a593Smuzhiyun		};
54*4882a593Smuzhiyun	};
55*4882a593Smuzhiyun};
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun&i2c4 {
58*4882a593Smuzhiyun	status = "okay";
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <345>;
61*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <11>;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun	vm149c: vm149c@0c {
64*4882a593Smuzhiyun		compatible = "silicon touch,vm149c";
65*4882a593Smuzhiyun		status = "okay";
66*4882a593Smuzhiyun		reg = <0x0c>;
67*4882a593Smuzhiyun		rockchip,camera-module-index = <0>;
68*4882a593Smuzhiyun		rockchip,camera-module-facing = "back";
69*4882a593Smuzhiyun	};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun	ov13850: ov13850@10 {
72*4882a593Smuzhiyun		compatible = "ovti,ov13850";
73*4882a593Smuzhiyun		status = "okay";
74*4882a593Smuzhiyun		reg = <0x10>;
75*4882a593Smuzhiyun		clocks = <&cru SCLK_CIF_OUT>;
76*4882a593Smuzhiyun		clock-names = "xvclk";
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun		/* conflict with csi-ctl-gpios */
79*4882a593Smuzhiyun		reset-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
80*4882a593Smuzhiyun		pwdn-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
81*4882a593Smuzhiyun		pinctrl-names = "rockchip,camera_default";
82*4882a593Smuzhiyun		pinctrl-0 = <&cif_clkout>;
83*4882a593Smuzhiyun		rockchip,camera-module-index = <0>;
84*4882a593Smuzhiyun		rockchip,camera-module-facing = "back";
85*4882a593Smuzhiyun		rockchip,camera-module-name = "CMK-CT0116";
86*4882a593Smuzhiyun		rockchip,camera-module-lens-name = "Largan-50013A1";
87*4882a593Smuzhiyun		lens-focus = <&vm149c>;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun		port {
90*4882a593Smuzhiyun			ucam_out1: endpoint {
91*4882a593Smuzhiyun				remote-endpoint = <&mipi_in_ucam1>;
92*4882a593Smuzhiyun				data-lanes = <1 2>;
93*4882a593Smuzhiyun			};
94*4882a593Smuzhiyun		};
95*4882a593Smuzhiyun	};
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun	imx327: imx327@1a {
98*4882a593Smuzhiyun		compatible = "sony,imx327";
99*4882a593Smuzhiyun		status = "okay";
100*4882a593Smuzhiyun		reg = <0x1a>;
101*4882a593Smuzhiyun		clocks = <&cru SCLK_CIF_OUT>;
102*4882a593Smuzhiyun		clock-names = "xvclk";
103*4882a593Smuzhiyun		/* conflict with csi-ctl-gpios */
104*4882a593Smuzhiyun		reset-gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>;
105*4882a593Smuzhiyun		pwdn-gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>;
106*4882a593Smuzhiyun		pinctrl-names = "default";
107*4882a593Smuzhiyun		pinctrl-0 = <&cif_clkout>;
108*4882a593Smuzhiyun		rockchip,camera-module-index = <0>;
109*4882a593Smuzhiyun		rockchip,camera-module-facing = "back";
110*4882a593Smuzhiyun		rockchip,camera-module-name = "TongJu";
111*4882a593Smuzhiyun		rockchip,camera-module-lens-name = "CHT842-MD";
112*4882a593Smuzhiyun		port {
113*4882a593Smuzhiyun			ucam_out2: endpoint {
114*4882a593Smuzhiyun				remote-endpoint = <&mipi_in_ucam2>;
115*4882a593Smuzhiyun				data-lanes = <1 2>;
116*4882a593Smuzhiyun			};
117*4882a593Smuzhiyun		};
118*4882a593Smuzhiyun	};
119*4882a593Smuzhiyun};
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun&mipi_dphy_rx0 {
122*4882a593Smuzhiyun	status = "okay";
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun	ports {
125*4882a593Smuzhiyun		#address-cells = <1>;
126*4882a593Smuzhiyun		#size-cells = <0>;
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun		port@0 {
129*4882a593Smuzhiyun			reg = <0>;
130*4882a593Smuzhiyun			#address-cells = <1>;
131*4882a593Smuzhiyun			#size-cells = <0>;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun			mipi_in_ucam0: endpoint@1 {
134*4882a593Smuzhiyun				reg = <1>;
135*4882a593Smuzhiyun				remote-endpoint = <&usbacm_video_control_out>;
136*4882a593Smuzhiyun				data-lanes = <1 2 3 4>;
137*4882a593Smuzhiyun			};
138*4882a593Smuzhiyun		};
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun		port@1 {
141*4882a593Smuzhiyun			reg = <1>;
142*4882a593Smuzhiyun			#address-cells = <1>;
143*4882a593Smuzhiyun			#size-cells = <0>;
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun			dphy_rx0_out: endpoint@0 {
146*4882a593Smuzhiyun				reg = <0>;
147*4882a593Smuzhiyun				remote-endpoint = <&isp0_mipi_in>;
148*4882a593Smuzhiyun			};
149*4882a593Smuzhiyun		};
150*4882a593Smuzhiyun	};
151*4882a593Smuzhiyun};
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun&mipi_dphy_tx1rx1 {
154*4882a593Smuzhiyun	status = "okay";
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun	ports {
157*4882a593Smuzhiyun		#address-cells = <1>;
158*4882a593Smuzhiyun		#size-cells = <0>;
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun		port@0 {
161*4882a593Smuzhiyun			reg = <0>;
162*4882a593Smuzhiyun			#address-cells = <1>;
163*4882a593Smuzhiyun			#size-cells = <0>;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun			mipi_in_ucam1: endpoint@1 {
166*4882a593Smuzhiyun				reg = <1>;
167*4882a593Smuzhiyun				remote-endpoint = <&ucam_out1>;
168*4882a593Smuzhiyun				data-lanes = <1 2>;
169*4882a593Smuzhiyun			};
170*4882a593Smuzhiyun		};
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun		port@1 {
173*4882a593Smuzhiyun			reg = <1>;
174*4882a593Smuzhiyun			#address-cells = <1>;
175*4882a593Smuzhiyun			#size-cells = <0>;
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun			dphy_tx1rx1_out: endpoint@0 {
178*4882a593Smuzhiyun				reg = <0>;
179*4882a593Smuzhiyun				remote-endpoint = <&isp1_mipi_in>;
180*4882a593Smuzhiyun			};
181*4882a593Smuzhiyun		};
182*4882a593Smuzhiyun	};
183*4882a593Smuzhiyun};
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun&pcie0 {
186*4882a593Smuzhiyun	/delete-property/ ep-gpios;
187*4882a593Smuzhiyun	num-lanes = <4>;
188*4882a593Smuzhiyun	pinctrl-names = "default";
189*4882a593Smuzhiyun	pinctrl-0 = <&pcie_clkreqn_cpm>;
190*4882a593Smuzhiyun	max-link-speed = <1>;
191*4882a593Smuzhiyun	memory-region = <&dma_trans>;
192*4882a593Smuzhiyun	busno = <0>;
193*4882a593Smuzhiyun	rockchip,dma_trx_enabled = <1>;
194*4882a593Smuzhiyun	rockchip,deferred = <1>;
195*4882a593Smuzhiyun	status = "okay";
196*4882a593Smuzhiyun};
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun&rkisp1_0 {
199*4882a593Smuzhiyun	status = "okay";
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun	port {
202*4882a593Smuzhiyun		#address-cells = <1>;
203*4882a593Smuzhiyun		#size-cells = <0>;
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun		isp0_mipi_in: endpoint@0 {
206*4882a593Smuzhiyun			reg = <0>;
207*4882a593Smuzhiyun			remote-endpoint = <&dphy_rx0_out>;
208*4882a593Smuzhiyun		};
209*4882a593Smuzhiyun	};
210*4882a593Smuzhiyun};
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun&usbacm_video_control {
213*4882a593Smuzhiyun	status = "okay";
214*4882a593Smuzhiyun	rockchip,camera-module-index = <0>;
215*4882a593Smuzhiyun	rockchip,camera-module-facing = "back";
216*4882a593Smuzhiyun	rockchip,camera-module-name = "usbacm_video_control";
217*4882a593Smuzhiyun	rockchip,camera-module-lens-name = "usbacm_video_control";
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun	ports {
220*4882a593Smuzhiyun		#address-cells = <1>;
221*4882a593Smuzhiyun		#size-cells = <0>;
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun		port@0 {
224*4882a593Smuzhiyun			reg = <0>;
225*4882a593Smuzhiyun			#address-cells = <1>;
226*4882a593Smuzhiyun			#size-cells = <0>;
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun			usbacm_video_control_in: endpoint@0 {
229*4882a593Smuzhiyun				reg = <0>;
230*4882a593Smuzhiyun				remote-endpoint = <&cam_out>;
231*4882a593Smuzhiyun				data-lanes = <1 2 3 4>;
232*4882a593Smuzhiyun			};
233*4882a593Smuzhiyun		};
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun		port@1 {
236*4882a593Smuzhiyun			reg = <1>;
237*4882a593Smuzhiyun			#address-cells = <1>;
238*4882a593Smuzhiyun			#size-cells = <0>;
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun			usbacm_video_control_out: endpoint@1 {
241*4882a593Smuzhiyun				reg = <1>;
242*4882a593Smuzhiyun				remote-endpoint = <&mipi_in_ucam0>;
243*4882a593Smuzhiyun				data-lanes = <1 2 3 4>;
244*4882a593Smuzhiyun			};
245*4882a593Smuzhiyun		};
246*4882a593Smuzhiyun	};
247*4882a593Smuzhiyun};
248