1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun// Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun/dts-v1/; 5*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 6*4882a593Smuzhiyun#include <dt-bindings/pinctrl/rockchip.h> 7*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 8*4882a593Smuzhiyun#include <dt-bindings/display/drm_mipi_dsi.h> 9*4882a593Smuzhiyun#include <dt-bindings/sensor-dev.h> 10*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h> 11*4882a593Smuzhiyun#include "dt-bindings/usb/pd.h" 12*4882a593Smuzhiyun#include "rk3399pro.dtsi" 13*4882a593Smuzhiyun#include "rk3399-android.dtsi" 14*4882a593Smuzhiyun#include "rk3399-opp.dtsi" 15*4882a593Smuzhiyun#include "rk3399-vop-clk-set.dtsi" 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun/ { 18*4882a593Smuzhiyun model = "Rockchip RK3399pro evb v11 board"; 19*4882a593Smuzhiyun compatible = "rockchip,rk3399pro-evb-v11", "rockchip,rk3399pro"; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun adc-keys { 22*4882a593Smuzhiyun compatible = "adc-keys"; 23*4882a593Smuzhiyun io-channels = <&saradc 2>; 24*4882a593Smuzhiyun io-channel-names = "buttons"; 25*4882a593Smuzhiyun poll-interval = <100>; 26*4882a593Smuzhiyun keyup-threshold-microvolt = <1800000>; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun esc-key { 29*4882a593Smuzhiyun linux,code = <KEY_ESC>; 30*4882a593Smuzhiyun label = "esc"; 31*4882a593Smuzhiyun press-threshold-microvolt = <1310000>; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun menu-key { 35*4882a593Smuzhiyun linux,code = <KEY_MENU>; 36*4882a593Smuzhiyun label = "menu"; 37*4882a593Smuzhiyun press-threshold-microvolt = <987000>; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun home-key { 41*4882a593Smuzhiyun linux,code = <KEY_HOME>; 42*4882a593Smuzhiyun label = "home"; 43*4882a593Smuzhiyun press-threshold-microvolt = <624000>; 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun vol-down-key { 47*4882a593Smuzhiyun linux,code = <KEY_VOLUMEDOWN>; 48*4882a593Smuzhiyun label = "volume down"; 49*4882a593Smuzhiyun press-threshold-microvolt = <300000>; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun vol-up-key { 53*4882a593Smuzhiyun linux,code = <KEY_VOLUMEUP>; 54*4882a593Smuzhiyun label = "volume up"; 55*4882a593Smuzhiyun press-threshold-microvolt = <17000>; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun backlight: backlight { 60*4882a593Smuzhiyun compatible = "pwm-backlight"; 61*4882a593Smuzhiyun pwms = <&pwm0 0 25000 0>; 62*4882a593Smuzhiyun brightness-levels = < 63*4882a593Smuzhiyun 0 20 20 21 21 22 22 23 64*4882a593Smuzhiyun 23 24 24 25 25 26 26 27 65*4882a593Smuzhiyun 27 28 28 29 29 30 30 31 66*4882a593Smuzhiyun 31 32 32 33 33 34 34 35 67*4882a593Smuzhiyun 35 36 36 37 37 38 38 39 68*4882a593Smuzhiyun 40 41 42 43 44 45 46 47 69*4882a593Smuzhiyun 48 49 50 51 52 53 54 55 70*4882a593Smuzhiyun 56 57 58 59 60 61 62 63 71*4882a593Smuzhiyun 64 65 66 67 68 69 70 71 72*4882a593Smuzhiyun 72 73 74 75 76 77 78 79 73*4882a593Smuzhiyun 80 81 82 83 84 85 86 87 74*4882a593Smuzhiyun 88 89 90 91 92 93 94 95 75*4882a593Smuzhiyun 96 97 98 99 100 101 102 103 76*4882a593Smuzhiyun 104 105 106 107 108 109 110 111 77*4882a593Smuzhiyun 112 113 114 115 116 117 118 119 78*4882a593Smuzhiyun 120 121 122 123 124 125 126 127 79*4882a593Smuzhiyun 128 129 130 131 132 133 134 135 80*4882a593Smuzhiyun 136 137 138 139 140 141 142 143 81*4882a593Smuzhiyun 144 145 146 147 148 149 150 151 82*4882a593Smuzhiyun 152 153 154 155 156 157 158 159 83*4882a593Smuzhiyun 160 161 162 163 164 165 166 167 84*4882a593Smuzhiyun 168 169 170 171 172 173 174 175 85*4882a593Smuzhiyun 176 177 178 179 180 181 182 183 86*4882a593Smuzhiyun 184 185 186 187 188 189 190 191 87*4882a593Smuzhiyun 192 193 194 195 196 197 198 199 88*4882a593Smuzhiyun 200 201 202 203 204 205 206 207 89*4882a593Smuzhiyun 208 209 210 211 212 213 214 215 90*4882a593Smuzhiyun 216 217 218 219 220 221 222 223 91*4882a593Smuzhiyun 224 225 226 227 228 229 230 231 92*4882a593Smuzhiyun 232 233 234 235 236 237 238 239 93*4882a593Smuzhiyun 240 241 242 243 244 245 246 247 94*4882a593Smuzhiyun 248 249 250 251 252 253 254 255 95*4882a593Smuzhiyun >; 96*4882a593Smuzhiyun default-brightness-level = <200>; 97*4882a593Smuzhiyun enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun clkin_gmac: external-gmac-clock { 101*4882a593Smuzhiyun compatible = "fixed-clock"; 102*4882a593Smuzhiyun clock-frequency = <125000000>; 103*4882a593Smuzhiyun clock-output-names = "clkin_gmac"; 104*4882a593Smuzhiyun #clock-cells = <0>; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun hdmi_sound: hdmi-sound { 108*4882a593Smuzhiyun status = "okay"; 109*4882a593Smuzhiyun compatible = "simple-audio-card"; 110*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 111*4882a593Smuzhiyun simple-audio-card,mclk-fs = <256>; 112*4882a593Smuzhiyun simple-audio-card,name = "rockchip,hdmi"; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun simple-audio-card,cpu { 115*4882a593Smuzhiyun sound-dai = <&i2s2>; 116*4882a593Smuzhiyun }; 117*4882a593Smuzhiyun simple-audio-card,codec { 118*4882a593Smuzhiyun sound-dai = <&hdmi>; 119*4882a593Smuzhiyun }; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun panel: panel { 123*4882a593Smuzhiyun compatible = "simple-panel"; 124*4882a593Smuzhiyun backlight = <&backlight>; 125*4882a593Smuzhiyun enable-gpios = <&gpio4 RK_PD6 GPIO_ACTIVE_HIGH>; 126*4882a593Smuzhiyun prepare-delay-ms = <20>; 127*4882a593Smuzhiyun enable-delay-ms = <20>; 128*4882a593Smuzhiyun reset-delay-ms = <20>; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun display-timings { 131*4882a593Smuzhiyun native-mode = <&timing0>; 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun timing0: timing0 { 134*4882a593Smuzhiyun clock-frequency = <200000000>; 135*4882a593Smuzhiyun hactive = <1536>; 136*4882a593Smuzhiyun vactive = <2048>; 137*4882a593Smuzhiyun hfront-porch = <12>; 138*4882a593Smuzhiyun hsync-len = <16>; 139*4882a593Smuzhiyun hback-porch = <48>; 140*4882a593Smuzhiyun vfront-porch = <8>; 141*4882a593Smuzhiyun vsync-len = <4>; 142*4882a593Smuzhiyun vback-porch = <8>; 143*4882a593Smuzhiyun hsync-active = <0>; 144*4882a593Smuzhiyun vsync-active = <0>; 145*4882a593Smuzhiyun de-active = <0>; 146*4882a593Smuzhiyun pixelclk-active = <0>; 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun ports { 151*4882a593Smuzhiyun panel_in: endpoint { 152*4882a593Smuzhiyun remote-endpoint = <&edp_out>; 153*4882a593Smuzhiyun }; 154*4882a593Smuzhiyun }; 155*4882a593Smuzhiyun }; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun rk809-sound { 158*4882a593Smuzhiyun compatible = "simple-audio-card"; 159*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 160*4882a593Smuzhiyun simple-audio-card,name = "rockchip,rk809-codec"; 161*4882a593Smuzhiyun simple-audio-card,mclk-fs = <256>; 162*4882a593Smuzhiyun simple-audio-card,widgets = 163*4882a593Smuzhiyun "Microphone", "Mic Jack", 164*4882a593Smuzhiyun "Headphone", "Headphone Jack"; 165*4882a593Smuzhiyun simple-audio-card,routing = 166*4882a593Smuzhiyun "Mic Jack", "MICBIAS1", 167*4882a593Smuzhiyun "IN1P", "Mic Jack", 168*4882a593Smuzhiyun "Headphone Jack", "HPOL", 169*4882a593Smuzhiyun "Headphone Jack", "HPOR"; 170*4882a593Smuzhiyun simple-audio-card,cpu { 171*4882a593Smuzhiyun sound-dai = <&i2s1>; 172*4882a593Smuzhiyun }; 173*4882a593Smuzhiyun simple-audio-card,codec { 174*4882a593Smuzhiyun sound-dai = <&rk809_codec>; 175*4882a593Smuzhiyun }; 176*4882a593Smuzhiyun }; 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun rk_headset: rk-headset { 179*4882a593Smuzhiyun compatible = "rockchip_headset"; 180*4882a593Smuzhiyun headset_gpio = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; 181*4882a593Smuzhiyun pinctrl-names = "default"; 182*4882a593Smuzhiyun pinctrl-0 = <&hp_det>; 183*4882a593Smuzhiyun io-channels = <&saradc 3>; 184*4882a593Smuzhiyun }; 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 187*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 188*4882a593Smuzhiyun clocks = <&rk809 1>; 189*4882a593Smuzhiyun clock-names = "ext_clock"; 190*4882a593Smuzhiyun pinctrl-names = "default"; 191*4882a593Smuzhiyun pinctrl-0 = <&wifi_enable_h>; 192*4882a593Smuzhiyun 193*4882a593Smuzhiyun /* 194*4882a593Smuzhiyun * On the module itself this is one of these (depending 195*4882a593Smuzhiyun * on the actual card populated): 196*4882a593Smuzhiyun * - SDIO_RESET_L_WL_REG_ON 197*4882a593Smuzhiyun * - PDN (power down when low) 198*4882a593Smuzhiyun */ 199*4882a593Smuzhiyun reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; 200*4882a593Smuzhiyun }; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun vbus_typec: vbus-typec-regulator { 203*4882a593Smuzhiyun compatible = "regulator-fixed"; 204*4882a593Smuzhiyun enable-active-high; 205*4882a593Smuzhiyun gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>; 206*4882a593Smuzhiyun pinctrl-names = "default"; 207*4882a593Smuzhiyun pinctrl-0 = <&vcc5v0_typec0_en>; 208*4882a593Smuzhiyun regulator-name = "vbus_typec"; 209*4882a593Smuzhiyun vin-supply = <&vcc5v0_sys>; 210*4882a593Smuzhiyun }; 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun vcc_phy: vcc-phy-regulator { 213*4882a593Smuzhiyun compatible = "regulator-fixed"; 214*4882a593Smuzhiyun regulator-name = "vcc_phy"; 215*4882a593Smuzhiyun regulator-always-on; 216*4882a593Smuzhiyun regulator-boot-on; 217*4882a593Smuzhiyun }; 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun vcc5v0_sys: vccsys { 220*4882a593Smuzhiyun compatible = "regulator-fixed"; 221*4882a593Smuzhiyun regulator-name = "vcc5v0_sys"; 222*4882a593Smuzhiyun regulator-always-on; 223*4882a593Smuzhiyun regulator-boot-on; 224*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 225*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 226*4882a593Smuzhiyun }; 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun wireless-wlan { 229*4882a593Smuzhiyun compatible = "wlan-platdata"; 230*4882a593Smuzhiyun rockchip,grf = <&grf>; 231*4882a593Smuzhiyun wifi_chip_type = "ap6398s"; 232*4882a593Smuzhiyun sdio_vref = <1800>; 233*4882a593Smuzhiyun WIFI,host_wake_irq = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>; 234*4882a593Smuzhiyun status = "okay"; 235*4882a593Smuzhiyun }; 236*4882a593Smuzhiyun 237*4882a593Smuzhiyun wireless-bluetooth { 238*4882a593Smuzhiyun compatible = "bluetooth-platdata"; 239*4882a593Smuzhiyun clocks = <&rk809 1>; 240*4882a593Smuzhiyun clock-names = "ext_clock"; 241*4882a593Smuzhiyun uart_rts_gpios = <&gpio2 RK_PC3 GPIO_ACTIVE_LOW>; 242*4882a593Smuzhiyun pinctrl-names = "default", "rts_gpio"; 243*4882a593Smuzhiyun pinctrl-0 = <&uart0_rts>, <&bt_irq_gpio>; 244*4882a593Smuzhiyun pinctrl-1 = <&uart0_gpios>; 245*4882a593Smuzhiyun BT,reset_gpio = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; 246*4882a593Smuzhiyun BT,wake_gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; 247*4882a593Smuzhiyun BT,wake_host_irq = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; 248*4882a593Smuzhiyun status = "okay"; 249*4882a593Smuzhiyun }; 250*4882a593Smuzhiyun}; 251*4882a593Smuzhiyun 252*4882a593Smuzhiyun&cdn_dp { 253*4882a593Smuzhiyun status = "okay"; 254*4882a593Smuzhiyun phys = <&tcphy0_dp>; 255*4882a593Smuzhiyun}; 256*4882a593Smuzhiyun 257*4882a593Smuzhiyun&cpu_l0 { 258*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_l>; 259*4882a593Smuzhiyun}; 260*4882a593Smuzhiyun 261*4882a593Smuzhiyun&cpu_l1 { 262*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_l>; 263*4882a593Smuzhiyun}; 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun&cpu_l2 { 266*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_l>; 267*4882a593Smuzhiyun}; 268*4882a593Smuzhiyun 269*4882a593Smuzhiyun&cpu_l3 { 270*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_l>; 271*4882a593Smuzhiyun}; 272*4882a593Smuzhiyun 273*4882a593Smuzhiyun&cpu_b0 { 274*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_b>; 275*4882a593Smuzhiyun}; 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun&cpu_b1 { 278*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_b>; 279*4882a593Smuzhiyun}; 280*4882a593Smuzhiyun 281*4882a593Smuzhiyun&dmc { 282*4882a593Smuzhiyun status = "okay"; 283*4882a593Smuzhiyun center-supply = <&vdd_center>; 284*4882a593Smuzhiyun}; 285*4882a593Smuzhiyun 286*4882a593Smuzhiyun&dp_in_vopb { 287*4882a593Smuzhiyun status = "disabled"; 288*4882a593Smuzhiyun}; 289*4882a593Smuzhiyun 290*4882a593Smuzhiyun&edp { 291*4882a593Smuzhiyun status = "okay"; 292*4882a593Smuzhiyun force-hpd; 293*4882a593Smuzhiyun 294*4882a593Smuzhiyun ports { 295*4882a593Smuzhiyun port@1 { 296*4882a593Smuzhiyun reg = <1>; 297*4882a593Smuzhiyun 298*4882a593Smuzhiyun edp_out: endpoint { 299*4882a593Smuzhiyun remote-endpoint = <&panel_in>; 300*4882a593Smuzhiyun }; 301*4882a593Smuzhiyun }; 302*4882a593Smuzhiyun }; 303*4882a593Smuzhiyun}; 304*4882a593Smuzhiyun 305*4882a593Smuzhiyun&edp_in_vopl { 306*4882a593Smuzhiyun status = "disabled"; 307*4882a593Smuzhiyun}; 308*4882a593Smuzhiyun 309*4882a593Smuzhiyun&emmc_phy { 310*4882a593Smuzhiyun status = "okay"; 311*4882a593Smuzhiyun}; 312*4882a593Smuzhiyun 313*4882a593Smuzhiyun&fiq_debugger { 314*4882a593Smuzhiyun pinctrl-0 = <&uart2a_xfer>; 315*4882a593Smuzhiyun}; 316*4882a593Smuzhiyun 317*4882a593Smuzhiyun&gmac { 318*4882a593Smuzhiyun phy-supply = <&vcc_phy>; 319*4882a593Smuzhiyun phy-mode = "rgmii"; 320*4882a593Smuzhiyun clock_in_out = "input"; 321*4882a593Smuzhiyun snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 322*4882a593Smuzhiyun snps,reset-active-low; 323*4882a593Smuzhiyun snps,reset-delays-us = <0 10000 50000>; 324*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_RMII_SRC>; 325*4882a593Smuzhiyun assigned-clock-parents = <&clkin_gmac>; 326*4882a593Smuzhiyun pinctrl-names = "default"; 327*4882a593Smuzhiyun pinctrl-0 = <&rgmii_pins>; 328*4882a593Smuzhiyun tx_delay = <0x28>; 329*4882a593Smuzhiyun rx_delay = <0x11>; 330*4882a593Smuzhiyun status = "okay"; 331*4882a593Smuzhiyun}; 332*4882a593Smuzhiyun 333*4882a593Smuzhiyun&gpu { 334*4882a593Smuzhiyun status = "okay"; 335*4882a593Smuzhiyun mali-supply = <&vdd_gpu>; 336*4882a593Smuzhiyun}; 337*4882a593Smuzhiyun 338*4882a593Smuzhiyun&hdmi { 339*4882a593Smuzhiyun status = "okay"; 340*4882a593Smuzhiyun #sound-dai-cells = <0>; 341*4882a593Smuzhiyun rockchip,phy-table = 342*4882a593Smuzhiyun <74250000 0x8009 0x0004 0x0272>, 343*4882a593Smuzhiyun <165000000 0x802b 0x0004 0x0209>, 344*4882a593Smuzhiyun <297000000 0x8039 0x0005 0x028d>, 345*4882a593Smuzhiyun <594000000 0x8039 0x0000 0x00f6>, 346*4882a593Smuzhiyun <000000000 0x0000 0x0000 0x0000>; 347*4882a593Smuzhiyun}; 348*4882a593Smuzhiyun 349*4882a593Smuzhiyun&hdmi_dp_sound { 350*4882a593Smuzhiyun status = "okay"; 351*4882a593Smuzhiyun}; 352*4882a593Smuzhiyun 353*4882a593Smuzhiyun&hdmi_in_vopb { 354*4882a593Smuzhiyun status = "disabled"; 355*4882a593Smuzhiyun}; 356*4882a593Smuzhiyun 357*4882a593Smuzhiyun&i2s2 { 358*4882a593Smuzhiyun #sound-dai-cells = <0>; 359*4882a593Smuzhiyun status = "okay"; 360*4882a593Smuzhiyun}; 361*4882a593Smuzhiyun 362*4882a593Smuzhiyun&i2c0 { 363*4882a593Smuzhiyun status = "okay"; 364*4882a593Smuzhiyun i2c-scl-rising-time-ns = <180>; 365*4882a593Smuzhiyun i2c-scl-falling-time-ns = <30>; 366*4882a593Smuzhiyun clock-frequency = <400000>; 367*4882a593Smuzhiyun 368*4882a593Smuzhiyun rk809: pmic@20 { 369*4882a593Smuzhiyun compatible = "rockchip,rk809"; 370*4882a593Smuzhiyun reg = <0x20>; 371*4882a593Smuzhiyun interrupt-parent = <&gpio1>; 372*4882a593Smuzhiyun interrupts = <RK_PC2 IRQ_TYPE_LEVEL_LOW>; 373*4882a593Smuzhiyun pinctrl-names = "default", "pmic-sleep", 374*4882a593Smuzhiyun "pmic-power-off", "pmic-reset"; 375*4882a593Smuzhiyun pinctrl-0 = <&pmic_int_l>; 376*4882a593Smuzhiyun pinctrl-1 = <&soc_slppin_slp>, <&rk809_slppin_slp>; 377*4882a593Smuzhiyun pinctrl-2 = <&soc_slppin_gpio>, <&rk809_slppin_pwrdn>; 378*4882a593Smuzhiyun pinctrl-3 = <&soc_slppin_gpio>,<&rk809_slppin_null>; 379*4882a593Smuzhiyun rockchip,system-power-controller; 380*4882a593Smuzhiyun pmic-reset-func = <0>; 381*4882a593Smuzhiyun wakeup-source; 382*4882a593Smuzhiyun #clock-cells = <1>; 383*4882a593Smuzhiyun clock-output-names = "rk808-clkout1", "rk808-clkout2"; 384*4882a593Smuzhiyun 385*4882a593Smuzhiyun vcc1-supply = <&vcc5v0_sys>; 386*4882a593Smuzhiyun vcc2-supply = <&vcc5v0_sys>; 387*4882a593Smuzhiyun vcc3-supply = <&vcc5v0_sys>; 388*4882a593Smuzhiyun vcc4-supply = <&vcc5v0_sys>; 389*4882a593Smuzhiyun vcc5-supply = <&vcc_buck5>; 390*4882a593Smuzhiyun vcc6-supply = <&vcc_buck5>; 391*4882a593Smuzhiyun vcc7-supply = <&vcc3v3_sys>; 392*4882a593Smuzhiyun vcc8-supply = <&vcc3v3_sys>; 393*4882a593Smuzhiyun vcc9-supply = <&vcc5v0_sys>; 394*4882a593Smuzhiyun 395*4882a593Smuzhiyun pwrkey { 396*4882a593Smuzhiyun status = "okay"; 397*4882a593Smuzhiyun }; 398*4882a593Smuzhiyun 399*4882a593Smuzhiyun rtc { 400*4882a593Smuzhiyun status = "okay"; 401*4882a593Smuzhiyun }; 402*4882a593Smuzhiyun 403*4882a593Smuzhiyun pinctrl_rk8xx: pinctrl_rk8xx { 404*4882a593Smuzhiyun gpio-controller; 405*4882a593Smuzhiyun #gpio-cells = <2>; 406*4882a593Smuzhiyun 407*4882a593Smuzhiyun rk809_slppin_null: rk809_slppin_null { 408*4882a593Smuzhiyun pins = "gpio_slp"; 409*4882a593Smuzhiyun function = "pin_fun0"; 410*4882a593Smuzhiyun }; 411*4882a593Smuzhiyun 412*4882a593Smuzhiyun rk809_slppin_slp: rk809_slppin_slp { 413*4882a593Smuzhiyun pins = "gpio_slp"; 414*4882a593Smuzhiyun function = "pin_fun1"; 415*4882a593Smuzhiyun }; 416*4882a593Smuzhiyun 417*4882a593Smuzhiyun rk809_slppin_pwrdn: rk809_slppin_pwrdn { 418*4882a593Smuzhiyun pins = "gpio_slp"; 419*4882a593Smuzhiyun function = "pin_fun2"; 420*4882a593Smuzhiyun }; 421*4882a593Smuzhiyun 422*4882a593Smuzhiyun rk809_slppin_rst: rk809_slppin_rst { 423*4882a593Smuzhiyun pins = "gpio_slp"; 424*4882a593Smuzhiyun function = "pin_fun3"; 425*4882a593Smuzhiyun }; 426*4882a593Smuzhiyun }; 427*4882a593Smuzhiyun 428*4882a593Smuzhiyun regulators { 429*4882a593Smuzhiyun vdd_center: DCDC_REG1 { 430*4882a593Smuzhiyun regulator-always-on; 431*4882a593Smuzhiyun regulator-boot-on; 432*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 433*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 434*4882a593Smuzhiyun regulator-initial-mode = <0x2>; 435*4882a593Smuzhiyun regulator-name = "vdd_center"; 436*4882a593Smuzhiyun regulator-state-mem { 437*4882a593Smuzhiyun regulator-off-in-suspend; 438*4882a593Smuzhiyun regulator-suspend-microvolt = <900000>; 439*4882a593Smuzhiyun }; 440*4882a593Smuzhiyun }; 441*4882a593Smuzhiyun 442*4882a593Smuzhiyun vdd_cpu_l: DCDC_REG2 { 443*4882a593Smuzhiyun regulator-always-on; 444*4882a593Smuzhiyun regulator-boot-on; 445*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 446*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 447*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 448*4882a593Smuzhiyun regulator-initial-mode = <0x2>; 449*4882a593Smuzhiyun regulator-name = "vdd_cpu_l"; 450*4882a593Smuzhiyun regulator-state-mem { 451*4882a593Smuzhiyun regulator-off-in-suspend; 452*4882a593Smuzhiyun }; 453*4882a593Smuzhiyun }; 454*4882a593Smuzhiyun 455*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 456*4882a593Smuzhiyun regulator-always-on; 457*4882a593Smuzhiyun regulator-boot-on; 458*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 459*4882a593Smuzhiyun regulator-initial-mode = <0x2>; 460*4882a593Smuzhiyun regulator-state-mem { 461*4882a593Smuzhiyun regulator-on-in-suspend; 462*4882a593Smuzhiyun }; 463*4882a593Smuzhiyun }; 464*4882a593Smuzhiyun 465*4882a593Smuzhiyun vcc3v3_sys: DCDC_REG4 { 466*4882a593Smuzhiyun regulator-always-on; 467*4882a593Smuzhiyun regulator-boot-on; 468*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 469*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 470*4882a593Smuzhiyun regulator-initial-mode = <0x2>; 471*4882a593Smuzhiyun regulator-name = "vcc3v3_sys"; 472*4882a593Smuzhiyun regulator-state-mem { 473*4882a593Smuzhiyun regulator-on-in-suspend; 474*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 475*4882a593Smuzhiyun }; 476*4882a593Smuzhiyun }; 477*4882a593Smuzhiyun 478*4882a593Smuzhiyun vcc_buck5: DCDC_REG5 { 479*4882a593Smuzhiyun regulator-always-on; 480*4882a593Smuzhiyun regulator-boot-on; 481*4882a593Smuzhiyun regulator-min-microvolt = <2200000>; 482*4882a593Smuzhiyun regulator-max-microvolt = <2200000>; 483*4882a593Smuzhiyun regulator-name = "vcc_buck5"; 484*4882a593Smuzhiyun regulator-state-mem { 485*4882a593Smuzhiyun regulator-on-in-suspend; 486*4882a593Smuzhiyun regulator-suspend-microvolt = <2200000>; 487*4882a593Smuzhiyun }; 488*4882a593Smuzhiyun }; 489*4882a593Smuzhiyun 490*4882a593Smuzhiyun vcca_0v9: LDO_REG1 { 491*4882a593Smuzhiyun regulator-always-on; 492*4882a593Smuzhiyun regulator-boot-on; 493*4882a593Smuzhiyun regulator-min-microvolt = <900000>; 494*4882a593Smuzhiyun regulator-max-microvolt = <900000>; 495*4882a593Smuzhiyun regulator-name = "vcca_0v9"; 496*4882a593Smuzhiyun regulator-state-mem { 497*4882a593Smuzhiyun regulator-off-in-suspend; 498*4882a593Smuzhiyun }; 499*4882a593Smuzhiyun }; 500*4882a593Smuzhiyun 501*4882a593Smuzhiyun vcc_1v8: LDO_REG2 { 502*4882a593Smuzhiyun regulator-always-on; 503*4882a593Smuzhiyun regulator-boot-on; 504*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 505*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 506*4882a593Smuzhiyun 507*4882a593Smuzhiyun regulator-name = "vcc_1v8"; 508*4882a593Smuzhiyun regulator-state-mem { 509*4882a593Smuzhiyun regulator-on-in-suspend; 510*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 511*4882a593Smuzhiyun }; 512*4882a593Smuzhiyun }; 513*4882a593Smuzhiyun 514*4882a593Smuzhiyun vcc0v9_soc: LDO_REG3 { 515*4882a593Smuzhiyun regulator-always-on; 516*4882a593Smuzhiyun regulator-boot-on; 517*4882a593Smuzhiyun regulator-min-microvolt = <900000>; 518*4882a593Smuzhiyun regulator-max-microvolt = <900000>; 519*4882a593Smuzhiyun 520*4882a593Smuzhiyun regulator-name = "vcc0v9_soc"; 521*4882a593Smuzhiyun regulator-state-mem { 522*4882a593Smuzhiyun regulator-on-in-suspend; 523*4882a593Smuzhiyun regulator-suspend-microvolt = <900000>; 524*4882a593Smuzhiyun }; 525*4882a593Smuzhiyun }; 526*4882a593Smuzhiyun 527*4882a593Smuzhiyun vcca_1v8: LDO_REG4 { 528*4882a593Smuzhiyun regulator-always-on; 529*4882a593Smuzhiyun regulator-boot-on; 530*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 531*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 532*4882a593Smuzhiyun 533*4882a593Smuzhiyun regulator-name = "vcca_1v8"; 534*4882a593Smuzhiyun regulator-state-mem { 535*4882a593Smuzhiyun regulator-off-in-suspend; 536*4882a593Smuzhiyun }; 537*4882a593Smuzhiyun }; 538*4882a593Smuzhiyun 539*4882a593Smuzhiyun vdd1v5_dvp: LDO_REG5 { 540*4882a593Smuzhiyun regulator-always-on; 541*4882a593Smuzhiyun regulator-boot-on; 542*4882a593Smuzhiyun regulator-min-microvolt = <1500000>; 543*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 544*4882a593Smuzhiyun 545*4882a593Smuzhiyun regulator-name = "vdd1v5_dvp"; 546*4882a593Smuzhiyun regulator-state-mem { 547*4882a593Smuzhiyun regulator-off-in-suspend; 548*4882a593Smuzhiyun }; 549*4882a593Smuzhiyun }; 550*4882a593Smuzhiyun 551*4882a593Smuzhiyun vcc_1v5: LDO_REG6 { 552*4882a593Smuzhiyun regulator-always-on; 553*4882a593Smuzhiyun regulator-boot-on; 554*4882a593Smuzhiyun regulator-min-microvolt = <1500000>; 555*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 556*4882a593Smuzhiyun 557*4882a593Smuzhiyun regulator-name = "vcc_1v5"; 558*4882a593Smuzhiyun regulator-state-mem { 559*4882a593Smuzhiyun regulator-off-in-suspend; 560*4882a593Smuzhiyun }; 561*4882a593Smuzhiyun }; 562*4882a593Smuzhiyun 563*4882a593Smuzhiyun vcc_3v0: LDO_REG7 { 564*4882a593Smuzhiyun regulator-always-on; 565*4882a593Smuzhiyun regulator-boot-on; 566*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 567*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 568*4882a593Smuzhiyun 569*4882a593Smuzhiyun regulator-name = "vcc_3v0"; 570*4882a593Smuzhiyun regulator-state-mem { 571*4882a593Smuzhiyun regulator-off-in-suspend; 572*4882a593Smuzhiyun }; 573*4882a593Smuzhiyun }; 574*4882a593Smuzhiyun 575*4882a593Smuzhiyun vccio_sd: LDO_REG8 { 576*4882a593Smuzhiyun regulator-always-on; 577*4882a593Smuzhiyun regulator-boot-on; 578*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 579*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 580*4882a593Smuzhiyun 581*4882a593Smuzhiyun regulator-name = "vccio_sd"; 582*4882a593Smuzhiyun regulator-state-mem { 583*4882a593Smuzhiyun regulator-off-in-suspend; 584*4882a593Smuzhiyun }; 585*4882a593Smuzhiyun }; 586*4882a593Smuzhiyun 587*4882a593Smuzhiyun vcc_sd: LDO_REG9 { 588*4882a593Smuzhiyun regulator-always-on; 589*4882a593Smuzhiyun regulator-boot-on; 590*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 591*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 592*4882a593Smuzhiyun 593*4882a593Smuzhiyun regulator-name = "vcc_sd"; 594*4882a593Smuzhiyun regulator-state-mem { 595*4882a593Smuzhiyun regulator-off-in-suspend; 596*4882a593Smuzhiyun }; 597*4882a593Smuzhiyun }; 598*4882a593Smuzhiyun 599*4882a593Smuzhiyun vcc5v0_usb: SWITCH_REG1 { 600*4882a593Smuzhiyun regulator-always-on; 601*4882a593Smuzhiyun regulator-boot-on; 602*4882a593Smuzhiyun regulator-name = "vcc5v0_usb"; 603*4882a593Smuzhiyun regulator-state-mem { 604*4882a593Smuzhiyun regulator-on-in-suspend; 605*4882a593Smuzhiyun }; 606*4882a593Smuzhiyun }; 607*4882a593Smuzhiyun 608*4882a593Smuzhiyun vccio_3v3: SWITCH_REG2 { 609*4882a593Smuzhiyun regulator-always-on; 610*4882a593Smuzhiyun regulator-boot-on; 611*4882a593Smuzhiyun regulator-name = "vccio_3v3"; 612*4882a593Smuzhiyun regulator-state-mem { 613*4882a593Smuzhiyun regulator-off-in-suspend; 614*4882a593Smuzhiyun }; 615*4882a593Smuzhiyun }; 616*4882a593Smuzhiyun }; 617*4882a593Smuzhiyun 618*4882a593Smuzhiyun rk809_codec: codec { 619*4882a593Smuzhiyun #sound-dai-cells = <0>; 620*4882a593Smuzhiyun compatible = "rockchip,rk809-codec", "rockchip,rk817-codec"; 621*4882a593Smuzhiyun clocks = <&cru SCLK_I2S_8CH_OUT>; 622*4882a593Smuzhiyun clock-names = "mclk"; 623*4882a593Smuzhiyun pinctrl-names = "default"; 624*4882a593Smuzhiyun pinctrl-0 = <&i2s_8ch_mclk>; 625*4882a593Smuzhiyun hp-volume = <20>; 626*4882a593Smuzhiyun spk-volume = <3>; 627*4882a593Smuzhiyun status = "okay"; 628*4882a593Smuzhiyun }; 629*4882a593Smuzhiyun }; 630*4882a593Smuzhiyun 631*4882a593Smuzhiyun vdd_cpu_b: tcs4525@1c { 632*4882a593Smuzhiyun compatible = "tcs,tcs4525"; 633*4882a593Smuzhiyun reg = <0x1c>; 634*4882a593Smuzhiyun vin-supply = <&vcc5v0_sys>; 635*4882a593Smuzhiyun regulator-compatible = "fan53555-reg"; 636*4882a593Smuzhiyun pinctrl-0 = <&vsel1_gpio>; 637*4882a593Smuzhiyun vsel-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; 638*4882a593Smuzhiyun regulator-name = "vdd_cpu_b"; 639*4882a593Smuzhiyun regulator-min-microvolt = <712500>; 640*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 641*4882a593Smuzhiyun regulator-ramp-delay = <2300>; 642*4882a593Smuzhiyun fcs,suspend-voltage-selector = <1>; 643*4882a593Smuzhiyun regulator-always-on; 644*4882a593Smuzhiyun regulator-boot-on; 645*4882a593Smuzhiyun regulator-initial-state = <3>; 646*4882a593Smuzhiyun regulator-state-mem { 647*4882a593Smuzhiyun regulator-off-in-suspend; 648*4882a593Smuzhiyun }; 649*4882a593Smuzhiyun }; 650*4882a593Smuzhiyun 651*4882a593Smuzhiyun vdd_gpu: tcs4526@10 { 652*4882a593Smuzhiyun compatible = "tcs,tcs4526"; 653*4882a593Smuzhiyun reg = <0x10>; 654*4882a593Smuzhiyun vin-supply = <&vcc5v0_sys>; 655*4882a593Smuzhiyun regulator-compatible = "fan53555-reg"; 656*4882a593Smuzhiyun pinctrl-0 = <&vsel2_gpio>; 657*4882a593Smuzhiyun vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; 658*4882a593Smuzhiyun regulator-name = "vdd_gpu"; 659*4882a593Smuzhiyun regulator-min-microvolt = <735000>; 660*4882a593Smuzhiyun regulator-max-microvolt = <1400000>; 661*4882a593Smuzhiyun regulator-ramp-delay = <2300>; 662*4882a593Smuzhiyun fcs,suspend-voltage-selector = <1>; 663*4882a593Smuzhiyun regulator-always-on; 664*4882a593Smuzhiyun regulator-boot-on; 665*4882a593Smuzhiyun regulator-initial-state = <3>; 666*4882a593Smuzhiyun regulator-state-mem { 667*4882a593Smuzhiyun regulator-off-in-suspend; 668*4882a593Smuzhiyun }; 669*4882a593Smuzhiyun }; 670*4882a593Smuzhiyun 671*4882a593Smuzhiyun bq25700: bq25700@6b { 672*4882a593Smuzhiyun compatible = "ti,bq25703"; 673*4882a593Smuzhiyun reg = <0x6b>; 674*4882a593Smuzhiyun interrupt-parent = <&gpio1>; 675*4882a593Smuzhiyun interrupts = <RK_PA1 IRQ_TYPE_LEVEL_LOW>; 676*4882a593Smuzhiyun pinctrl-names = "default"; 677*4882a593Smuzhiyun pinctrl-0 = <&charger_ok_int>; 678*4882a593Smuzhiyun ti,charge-current = <1500000>; 679*4882a593Smuzhiyun ti,max-charge-voltage = <8704000>; 680*4882a593Smuzhiyun ti,max-input-voltage = <20000000>; 681*4882a593Smuzhiyun ti,max-input-current = <6000000>; 682*4882a593Smuzhiyun ti,input-current-sdp = <500000>; 683*4882a593Smuzhiyun ti,input-current-dcp = <2000000>; 684*4882a593Smuzhiyun ti,input-current-cdp = <2000000>; 685*4882a593Smuzhiyun ti,input-current-dc = <2000000>; 686*4882a593Smuzhiyun ti,minimum-sys-voltage = <6700000>; 687*4882a593Smuzhiyun ti,otg-voltage = <5000000>; 688*4882a593Smuzhiyun ti,otg-current = <500000>; 689*4882a593Smuzhiyun ti,input-current = <500000>; 690*4882a593Smuzhiyun pd-charge-only = <0>; 691*4882a593Smuzhiyun status = "disabled"; 692*4882a593Smuzhiyun }; 693*4882a593Smuzhiyun}; 694*4882a593Smuzhiyun 695*4882a593Smuzhiyun&i2c1 { 696*4882a593Smuzhiyun status = "okay"; 697*4882a593Smuzhiyun i2c-scl-rising-time-ns = <140>; 698*4882a593Smuzhiyun i2c-scl-falling-time-ns = <30>; 699*4882a593Smuzhiyun 700*4882a593Smuzhiyun mpu6500@68 { 701*4882a593Smuzhiyun status = "okay"; 702*4882a593Smuzhiyun compatible = "invensense,mpu6500"; 703*4882a593Smuzhiyun reg = <0x68>; 704*4882a593Smuzhiyun irq-gpio = <&gpio3 RK_PD2 IRQ_TYPE_EDGE_RISING>; 705*4882a593Smuzhiyun mpu-int_config = <0x10>; 706*4882a593Smuzhiyun mpu-level_shifter = <0>; 707*4882a593Smuzhiyun mpu-orientation = <0 1 0 1 0 0 0 0 1>; 708*4882a593Smuzhiyun orientation-x= <0>; 709*4882a593Smuzhiyun orientation-y= <0>; 710*4882a593Smuzhiyun orientation-z= <1>; 711*4882a593Smuzhiyun mpu-debug = <1>; 712*4882a593Smuzhiyun }; 713*4882a593Smuzhiyun 714*4882a593Smuzhiyun sensor@d { 715*4882a593Smuzhiyun status = "okay"; 716*4882a593Smuzhiyun compatible = "ak8963"; 717*4882a593Smuzhiyun reg = <0x0d>; 718*4882a593Smuzhiyun type = <SENSOR_TYPE_COMPASS>; 719*4882a593Smuzhiyun irq-gpio = <&gpio3 RK_PD7 IRQ_TYPE_EDGE_RISING>; 720*4882a593Smuzhiyun irq_enable = <0>; 721*4882a593Smuzhiyun poll_delay_ms = <30>; 722*4882a593Smuzhiyun layout = <3>; 723*4882a593Smuzhiyun }; 724*4882a593Smuzhiyun}; 725*4882a593Smuzhiyun 726*4882a593Smuzhiyun&i2c4 { 727*4882a593Smuzhiyun status = "okay"; 728*4882a593Smuzhiyun i2c-scl-rising-time-ns = <345>; 729*4882a593Smuzhiyun i2c-scl-falling-time-ns = <11>; 730*4882a593Smuzhiyun 731*4882a593Smuzhiyun gsl3673: gsl3673@40 { 732*4882a593Smuzhiyun compatible = "GSL,GSL3673"; 733*4882a593Smuzhiyun reg = <0x40>; 734*4882a593Smuzhiyun screen_max_x = <1536>; 735*4882a593Smuzhiyun screen_max_y = <2048>; 736*4882a593Smuzhiyun irq_gpio_number = <&gpio4 RK_PC3 IRQ_TYPE_LEVEL_LOW>; 737*4882a593Smuzhiyun rst_gpio_number = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; 738*4882a593Smuzhiyun }; 739*4882a593Smuzhiyun}; 740*4882a593Smuzhiyun 741*4882a593Smuzhiyun&i2c8 { 742*4882a593Smuzhiyun status = "okay"; 743*4882a593Smuzhiyun i2c-scl-rising-time-ns = <345>; 744*4882a593Smuzhiyun i2c-scl-falling-time-ns = <11>; 745*4882a593Smuzhiyun clock-frequency = <100000>; 746*4882a593Smuzhiyun 747*4882a593Smuzhiyun usbc0: fusb302@22 { 748*4882a593Smuzhiyun compatible = "fcs,fusb302"; 749*4882a593Smuzhiyun reg = <0x22>; 750*4882a593Smuzhiyun interrupt-parent = <&gpio1>; 751*4882a593Smuzhiyun interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>; 752*4882a593Smuzhiyun pinctrl-names = "default"; 753*4882a593Smuzhiyun pinctrl-0 = <&usbc0_int>; 754*4882a593Smuzhiyun vbus-supply = <&vbus_typec>; 755*4882a593Smuzhiyun status = "okay"; 756*4882a593Smuzhiyun 757*4882a593Smuzhiyun ports { 758*4882a593Smuzhiyun #address-cells = <1>; 759*4882a593Smuzhiyun #size-cells = <0>; 760*4882a593Smuzhiyun 761*4882a593Smuzhiyun port@0 { 762*4882a593Smuzhiyun reg = <0>; 763*4882a593Smuzhiyun usbc0_role_sw: endpoint@0 { 764*4882a593Smuzhiyun remote-endpoint = <&dwc3_0_role_switch>; 765*4882a593Smuzhiyun }; 766*4882a593Smuzhiyun }; 767*4882a593Smuzhiyun }; 768*4882a593Smuzhiyun 769*4882a593Smuzhiyun usb_con: connector { 770*4882a593Smuzhiyun compatible = "usb-c-connector"; 771*4882a593Smuzhiyun label = "USB-C"; 772*4882a593Smuzhiyun data-role = "dual"; 773*4882a593Smuzhiyun power-role = "dual"; 774*4882a593Smuzhiyun try-power-role = "sink"; 775*4882a593Smuzhiyun op-sink-microwatt = <1000000>; 776*4882a593Smuzhiyun sink-pdos = 777*4882a593Smuzhiyun <PDO_FIXED(5000, 2500, PDO_FIXED_USB_COMM)>; 778*4882a593Smuzhiyun source-pdos = 779*4882a593Smuzhiyun <PDO_FIXED(5000, 1500, PDO_FIXED_USB_COMM)>; 780*4882a593Smuzhiyun 781*4882a593Smuzhiyun ports { 782*4882a593Smuzhiyun #address-cells = <1>; 783*4882a593Smuzhiyun #size-cells = <0>; 784*4882a593Smuzhiyun 785*4882a593Smuzhiyun port@0 { 786*4882a593Smuzhiyun reg = <0>; 787*4882a593Smuzhiyun usbc0_orien_sw: endpoint { 788*4882a593Smuzhiyun remote-endpoint = <&tcphy0_orientation_switch>; 789*4882a593Smuzhiyun }; 790*4882a593Smuzhiyun }; 791*4882a593Smuzhiyun }; 792*4882a593Smuzhiyun }; 793*4882a593Smuzhiyun }; 794*4882a593Smuzhiyun}; 795*4882a593Smuzhiyun 796*4882a593Smuzhiyun&i2s1 { 797*4882a593Smuzhiyun status = "okay"; 798*4882a593Smuzhiyun #sound-dai-cells = <0>; 799*4882a593Smuzhiyun}; 800*4882a593Smuzhiyun 801*4882a593Smuzhiyun&io_domains { 802*4882a593Smuzhiyun status = "okay"; 803*4882a593Smuzhiyun bt656-supply = <&vcca_1v8>; 804*4882a593Smuzhiyun audio-supply = <&vcca_1v8>; 805*4882a593Smuzhiyun sdmmc-supply = <&vccio_sd>; 806*4882a593Smuzhiyun gpio1830-supply = <&vcc_3v0>; 807*4882a593Smuzhiyun}; 808*4882a593Smuzhiyun 809*4882a593Smuzhiyun&isp0_mmu { 810*4882a593Smuzhiyun status = "okay"; 811*4882a593Smuzhiyun}; 812*4882a593Smuzhiyun 813*4882a593Smuzhiyun&isp1_mmu { 814*4882a593Smuzhiyun status = "okay"; 815*4882a593Smuzhiyun}; 816*4882a593Smuzhiyun 817*4882a593Smuzhiyun&pcie_phy { 818*4882a593Smuzhiyun status = "disabled"; 819*4882a593Smuzhiyun}; 820*4882a593Smuzhiyun 821*4882a593Smuzhiyun&pcie0 { 822*4882a593Smuzhiyun status = "disabled"; 823*4882a593Smuzhiyun}; 824*4882a593Smuzhiyun 825*4882a593Smuzhiyun&pmu_io_domains { 826*4882a593Smuzhiyun status = "okay"; 827*4882a593Smuzhiyun pmu1830-supply = <&vcc_1v8>; 828*4882a593Smuzhiyun}; 829*4882a593Smuzhiyun 830*4882a593Smuzhiyun&pwm0 { 831*4882a593Smuzhiyun status = "okay"; 832*4882a593Smuzhiyun}; 833*4882a593Smuzhiyun 834*4882a593Smuzhiyun&pwm2 { 835*4882a593Smuzhiyun status = "okay"; 836*4882a593Smuzhiyun}; 837*4882a593Smuzhiyun 838*4882a593Smuzhiyun&rockchip_suspend { 839*4882a593Smuzhiyun status = "okay"; 840*4882a593Smuzhiyun rockchip,sleep-debug-en = <1>; 841*4882a593Smuzhiyun rockchip,sleep-mode-config = < 842*4882a593Smuzhiyun (0 843*4882a593Smuzhiyun | RKPM_SLP_ARMPD 844*4882a593Smuzhiyun | RKPM_SLP_PERILPPD 845*4882a593Smuzhiyun | RKPM_SLP_DDR_RET 846*4882a593Smuzhiyun | RKPM_SLP_PLLPD 847*4882a593Smuzhiyun | RKPM_SLP_CENTER_PD 848*4882a593Smuzhiyun | RKPM_SLP_OSC_DIS 849*4882a593Smuzhiyun | RKPM_SLP_AP_PWROFF 850*4882a593Smuzhiyun ) 851*4882a593Smuzhiyun >; 852*4882a593Smuzhiyun rockchip,wakeup-config = <RKPM_GPIO_WKUP_EN>; 853*4882a593Smuzhiyun rockchip,pwm-regulator-config = <PWM2_REGULATOR_EN>; 854*4882a593Smuzhiyun rockchip,power-ctrl = 855*4882a593Smuzhiyun <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>, 856*4882a593Smuzhiyun <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; 857*4882a593Smuzhiyun}; 858*4882a593Smuzhiyun 859*4882a593Smuzhiyun&route_edp { 860*4882a593Smuzhiyun status = "okay"; 861*4882a593Smuzhiyun}; 862*4882a593Smuzhiyun 863*4882a593Smuzhiyun&saradc { 864*4882a593Smuzhiyun status = "okay"; 865*4882a593Smuzhiyun vref-supply = <&vcc_1v8>; 866*4882a593Smuzhiyun}; 867*4882a593Smuzhiyun 868*4882a593Smuzhiyun&sdmmc { 869*4882a593Smuzhiyun sd-uhs-sdr12; 870*4882a593Smuzhiyun sd-uhs-sdr25; 871*4882a593Smuzhiyun sd-uhs-sdr50; 872*4882a593Smuzhiyun sd-uhs-sdr104; 873*4882a593Smuzhiyun}; 874*4882a593Smuzhiyun 875*4882a593Smuzhiyun&spi1 { 876*4882a593Smuzhiyun status = "okay"; 877*4882a593Smuzhiyun max-freq = <48000000>; /* spi internal clk, don't modify */ 878*4882a593Smuzhiyun spi_dev@0 { 879*4882a593Smuzhiyun compatible = "rockchip,spidev"; 880*4882a593Smuzhiyun reg = <0>; 881*4882a593Smuzhiyun spi-max-frequency = <12000000>; 882*4882a593Smuzhiyun spi-lsb-first; 883*4882a593Smuzhiyun }; 884*4882a593Smuzhiyun}; 885*4882a593Smuzhiyun 886*4882a593Smuzhiyun&tcphy0 { 887*4882a593Smuzhiyun status = "okay"; 888*4882a593Smuzhiyun orientation-switch; 889*4882a593Smuzhiyun port { 890*4882a593Smuzhiyun #address-cells = <1>; 891*4882a593Smuzhiyun #size-cells = <0>; 892*4882a593Smuzhiyun tcphy0_orientation_switch: endpoint@0 { 893*4882a593Smuzhiyun reg = <0>; 894*4882a593Smuzhiyun remote-endpoint = <&usbc0_orien_sw>; 895*4882a593Smuzhiyun }; 896*4882a593Smuzhiyun }; 897*4882a593Smuzhiyun}; 898*4882a593Smuzhiyun 899*4882a593Smuzhiyun&tcphy1 { 900*4882a593Smuzhiyun status = "okay"; 901*4882a593Smuzhiyun}; 902*4882a593Smuzhiyun 903*4882a593Smuzhiyun&tsadc { 904*4882a593Smuzhiyun rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ 905*4882a593Smuzhiyun rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ 906*4882a593Smuzhiyun status = "okay"; 907*4882a593Smuzhiyun}; 908*4882a593Smuzhiyun 909*4882a593Smuzhiyun&u2phy0 { 910*4882a593Smuzhiyun status = "okay"; 911*4882a593Smuzhiyun 912*4882a593Smuzhiyun u2phy0_otg: otg-port { 913*4882a593Smuzhiyun status = "okay"; 914*4882a593Smuzhiyun }; 915*4882a593Smuzhiyun 916*4882a593Smuzhiyun u2phy0_host: host-port { 917*4882a593Smuzhiyun phy-supply = <&vcc5v0_usb>; 918*4882a593Smuzhiyun status = "okay"; 919*4882a593Smuzhiyun }; 920*4882a593Smuzhiyun}; 921*4882a593Smuzhiyun 922*4882a593Smuzhiyun&u2phy1 { 923*4882a593Smuzhiyun status = "okay"; 924*4882a593Smuzhiyun 925*4882a593Smuzhiyun u2phy1_otg: otg-port { 926*4882a593Smuzhiyun status = "okay"; 927*4882a593Smuzhiyun }; 928*4882a593Smuzhiyun 929*4882a593Smuzhiyun u2phy1_host: host-port { 930*4882a593Smuzhiyun phy-supply = <&vcc5v0_usb>; 931*4882a593Smuzhiyun status = "okay"; 932*4882a593Smuzhiyun }; 933*4882a593Smuzhiyun}; 934*4882a593Smuzhiyun 935*4882a593Smuzhiyun&uart0 { 936*4882a593Smuzhiyun pinctrl-names = "default"; 937*4882a593Smuzhiyun pinctrl-0 = <&uart0_xfer &uart0_cts>; 938*4882a593Smuzhiyun status = "okay"; 939*4882a593Smuzhiyun}; 940*4882a593Smuzhiyun 941*4882a593Smuzhiyun&usb_host0_ehci { 942*4882a593Smuzhiyun status = "okay"; 943*4882a593Smuzhiyun}; 944*4882a593Smuzhiyun 945*4882a593Smuzhiyun&usb_host1_ehci { 946*4882a593Smuzhiyun status = "okay"; 947*4882a593Smuzhiyun}; 948*4882a593Smuzhiyun 949*4882a593Smuzhiyun&usb_host0_ohci { 950*4882a593Smuzhiyun status = "okay"; 951*4882a593Smuzhiyun}; 952*4882a593Smuzhiyun 953*4882a593Smuzhiyun&usb_host1_ohci { 954*4882a593Smuzhiyun status = "okay"; 955*4882a593Smuzhiyun}; 956*4882a593Smuzhiyun 957*4882a593Smuzhiyun&usbdrd3_0 { 958*4882a593Smuzhiyun status = "okay"; 959*4882a593Smuzhiyun}; 960*4882a593Smuzhiyun 961*4882a593Smuzhiyun&usbdrd3_1 { 962*4882a593Smuzhiyun status = "okay"; 963*4882a593Smuzhiyun}; 964*4882a593Smuzhiyun 965*4882a593Smuzhiyun&usbdrd_dwc3_0 { 966*4882a593Smuzhiyun status = "okay"; 967*4882a593Smuzhiyun usb-role-switch; 968*4882a593Smuzhiyun port { 969*4882a593Smuzhiyun #address-cells = <1>; 970*4882a593Smuzhiyun #size-cells = <0>; 971*4882a593Smuzhiyun dwc3_0_role_switch: endpoint@0 { 972*4882a593Smuzhiyun reg = <0>; 973*4882a593Smuzhiyun remote-endpoint = <&usbc0_role_sw>; 974*4882a593Smuzhiyun }; 975*4882a593Smuzhiyun }; 976*4882a593Smuzhiyun}; 977*4882a593Smuzhiyun 978*4882a593Smuzhiyun&usbdrd_dwc3_1 { 979*4882a593Smuzhiyun status = "okay"; 980*4882a593Smuzhiyun}; 981*4882a593Smuzhiyun 982*4882a593Smuzhiyun&vopb { 983*4882a593Smuzhiyun assigned-clocks = <&cru DCLK_VOP0_DIV>; 984*4882a593Smuzhiyun assigned-clock-parents = <&cru PLL_CPLL>; 985*4882a593Smuzhiyun}; 986*4882a593Smuzhiyun 987*4882a593Smuzhiyun&vopl { 988*4882a593Smuzhiyun assigned-clocks = <&cru DCLK_VOP1_DIV>; 989*4882a593Smuzhiyun assigned-clock-parents = <&cru PLL_VPLL>; 990*4882a593Smuzhiyun}; 991*4882a593Smuzhiyun 992*4882a593Smuzhiyun&pinctrl { 993*4882a593Smuzhiyun pinctrl-names = "default"; 994*4882a593Smuzhiyun pinctrl-0 = <&npu_ref_clk>; 995*4882a593Smuzhiyun 996*4882a593Smuzhiyun bq2570 { 997*4882a593Smuzhiyun charger_ok_int: charger-ok-int { 998*4882a593Smuzhiyun rockchip,pins = 999*4882a593Smuzhiyun <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; 1000*4882a593Smuzhiyun }; 1001*4882a593Smuzhiyun }; 1002*4882a593Smuzhiyun 1003*4882a593Smuzhiyun headphone { 1004*4882a593Smuzhiyun hp_det: hp-det { 1005*4882a593Smuzhiyun rockchip,pins = 1006*4882a593Smuzhiyun <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; 1007*4882a593Smuzhiyun }; 1008*4882a593Smuzhiyun }; 1009*4882a593Smuzhiyun 1010*4882a593Smuzhiyun lcd_rst { 1011*4882a593Smuzhiyun lcd_rst_gpio: lcd-rst-gpio { 1012*4882a593Smuzhiyun rockchip,pins = 1013*4882a593Smuzhiyun <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 1014*4882a593Smuzhiyun }; 1015*4882a593Smuzhiyun }; 1016*4882a593Smuzhiyun 1017*4882a593Smuzhiyun npu_clk { 1018*4882a593Smuzhiyun npu_ref_clk: npu-ref-clk { 1019*4882a593Smuzhiyun rockchip,pins = 1020*4882a593Smuzhiyun <0 RK_PA2 1 &pcfg_pull_none>; 1021*4882a593Smuzhiyun }; 1022*4882a593Smuzhiyun }; 1023*4882a593Smuzhiyun 1024*4882a593Smuzhiyun pmic { 1025*4882a593Smuzhiyun pmic_int_l: pmic-int-l { 1026*4882a593Smuzhiyun rockchip,pins = 1027*4882a593Smuzhiyun <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; 1028*4882a593Smuzhiyun }; 1029*4882a593Smuzhiyun vsel1_gpio: vsel1-gpio { 1030*4882a593Smuzhiyun rockchip,pins = 1031*4882a593Smuzhiyun <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; 1032*4882a593Smuzhiyun }; 1033*4882a593Smuzhiyun vsel2_gpio: vsel2-gpio { 1034*4882a593Smuzhiyun rockchip,pins = 1035*4882a593Smuzhiyun <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; 1036*4882a593Smuzhiyun }; 1037*4882a593Smuzhiyun 1038*4882a593Smuzhiyun soc_slppin_gpio: soc-slppin-gpio { 1039*4882a593Smuzhiyun rockchip,pins = 1040*4882a593Smuzhiyun <1 RK_PA5 RK_FUNC_GPIO &pcfg_output_low>; 1041*4882a593Smuzhiyun }; 1042*4882a593Smuzhiyun 1043*4882a593Smuzhiyun soc_slppin_slp: soc-slppin-slp { 1044*4882a593Smuzhiyun rockchip,pins = 1045*4882a593Smuzhiyun <1 RK_PA5 1 &pcfg_pull_down>; 1046*4882a593Smuzhiyun }; 1047*4882a593Smuzhiyun }; 1048*4882a593Smuzhiyun 1049*4882a593Smuzhiyun sdio-pwrseq { 1050*4882a593Smuzhiyun wifi_enable_h: wifi-enable-h { 1051*4882a593Smuzhiyun rockchip,pins = 1052*4882a593Smuzhiyun <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; 1053*4882a593Smuzhiyun }; 1054*4882a593Smuzhiyun }; 1055*4882a593Smuzhiyun 1056*4882a593Smuzhiyun sdmmc { 1057*4882a593Smuzhiyun sdmmc_bus1: sdmmc-bus1 { 1058*4882a593Smuzhiyun rockchip,pins = 1059*4882a593Smuzhiyun <4 RK_PB0 1 &pcfg_pull_up_10ma>; 1060*4882a593Smuzhiyun }; 1061*4882a593Smuzhiyun 1062*4882a593Smuzhiyun sdmmc_bus4: sdmmc-bus4 { 1063*4882a593Smuzhiyun rockchip,pins = 1064*4882a593Smuzhiyun <4 RK_PB0 1 &pcfg_pull_up_10ma>, 1065*4882a593Smuzhiyun <4 RK_PB1 1 &pcfg_pull_up_10ma>, 1066*4882a593Smuzhiyun <4 RK_PB2 1 &pcfg_pull_up_10ma>, 1067*4882a593Smuzhiyun <4 RK_PB3 1 &pcfg_pull_up_10ma>; 1068*4882a593Smuzhiyun }; 1069*4882a593Smuzhiyun 1070*4882a593Smuzhiyun sdmmc_clk: sdmmc-clk { 1071*4882a593Smuzhiyun rockchip,pins = 1072*4882a593Smuzhiyun <4 RK_PB4 1 &pcfg_pull_none_10ma>; 1073*4882a593Smuzhiyun }; 1074*4882a593Smuzhiyun 1075*4882a593Smuzhiyun sdmmc_cmd: sdmmc-cmd { 1076*4882a593Smuzhiyun rockchip,pins = 1077*4882a593Smuzhiyun <4 RK_PB5 1 &pcfg_pull_up_10ma>; 1078*4882a593Smuzhiyun }; 1079*4882a593Smuzhiyun }; 1080*4882a593Smuzhiyun 1081*4882a593Smuzhiyun tp_irq { 1082*4882a593Smuzhiyun tp_irq_gpio: tp-irq-gpio { 1083*4882a593Smuzhiyun rockchip,pins = 1084*4882a593Smuzhiyun <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; 1085*4882a593Smuzhiyun }; 1086*4882a593Smuzhiyun }; 1087*4882a593Smuzhiyun 1088*4882a593Smuzhiyun usb-typec { 1089*4882a593Smuzhiyun usbc0_int: usbc0-int { 1090*4882a593Smuzhiyun rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; 1091*4882a593Smuzhiyun }; 1092*4882a593Smuzhiyun 1093*4882a593Smuzhiyun vcc5v0_typec0_en: vcc5v0-typec0-en { 1094*4882a593Smuzhiyun rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 1095*4882a593Smuzhiyun }; 1096*4882a593Smuzhiyun }; 1097*4882a593Smuzhiyun 1098*4882a593Smuzhiyun wireless-bluetooth { 1099*4882a593Smuzhiyun uart0_gpios: uart0-gpios { 1100*4882a593Smuzhiyun rockchip,pins = 1101*4882a593Smuzhiyun <2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; 1102*4882a593Smuzhiyun }; 1103*4882a593Smuzhiyun 1104*4882a593Smuzhiyun bt_irq_gpio: bt-irq-gpio { 1105*4882a593Smuzhiyun rockchip,pins = 1106*4882a593Smuzhiyun <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_down>; 1107*4882a593Smuzhiyun }; 1108*4882a593Smuzhiyun }; 1109*4882a593Smuzhiyun}; 1110