1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/dts-v1/; 7*4882a593Smuzhiyun#include "rk3399-tve1030g.dtsi" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun compatible = "rockchip,rk3399-tve1030g-avb", "rockchip,rk3399"; 11*4882a593Smuzhiyun}; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun&i2c1 { 14*4882a593Smuzhiyun status = "okay"; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun vm149c: vm149c@0c { 17*4882a593Smuzhiyun compatible = "silicon touch,vm149c"; 18*4882a593Smuzhiyun status = "okay"; 19*4882a593Smuzhiyun reg = <0x0c>; 20*4882a593Smuzhiyun rockchip,camera-module-index = <0>; 21*4882a593Smuzhiyun rockchip,camera-module-facing = "back"; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun ov13850: ov13850@10 { 25*4882a593Smuzhiyun compatible = "ovti,ov13850"; 26*4882a593Smuzhiyun status = "disabled"; 27*4882a593Smuzhiyun reg = <0x10>; 28*4882a593Smuzhiyun clocks = <&cru SCLK_CIF_OUT>; 29*4882a593Smuzhiyun clock-names = "xvclk"; 30*4882a593Smuzhiyun /* avdd-supply = <>; */ 31*4882a593Smuzhiyun /* dvdd-supply = <>; */ 32*4882a593Smuzhiyun /* dovdd-supply = <>; */ 33*4882a593Smuzhiyun /* reset-gpios = <>; */ 34*4882a593Smuzhiyun reset-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>; 35*4882a593Smuzhiyun pwdn-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; 36*4882a593Smuzhiyun pinctrl-names = "rockchip,camera_default"; 37*4882a593Smuzhiyun pinctrl-0 = <&cif_clkout>; 38*4882a593Smuzhiyun rockchip,camera-module-index = <0>; 39*4882a593Smuzhiyun rockchip,camera-module-facing = "back"; 40*4882a593Smuzhiyun rockchip,camera-module-name = "CMK-CT0116"; 41*4882a593Smuzhiyun rockchip,camera-module-lens-name = "Largan-50013A1"; 42*4882a593Smuzhiyun lens-focus = <&vm149c>; 43*4882a593Smuzhiyun port { 44*4882a593Smuzhiyun ucam_out0: endpoint { 45*4882a593Smuzhiyun remote-endpoint = <&mipi_in_ucam0>; 46*4882a593Smuzhiyun //remote-endpoint = <&mipi_in_ucam1>; 47*4882a593Smuzhiyun data-lanes = <1 2>; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun gc2355: gc2355@3c { 53*4882a593Smuzhiyun status = "okay"; 54*4882a593Smuzhiyun compatible = "galaxycore,gc2355"; 55*4882a593Smuzhiyun reg = <0x3c>; 56*4882a593Smuzhiyun clocks = <&cru SCLK_CIF_OUT>; 57*4882a593Smuzhiyun clock-names = "xvclk"; 58*4882a593Smuzhiyun /* avdd-supply = <>; */ 59*4882a593Smuzhiyun /* dvdd-supply = <>; */ 60*4882a593Smuzhiyun /* dovdd-supply = <>; */ 61*4882a593Smuzhiyun /* reset-gpios = <>; */ 62*4882a593Smuzhiyun pwdn-gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>; 63*4882a593Smuzhiyun pinctrl-names = "rockchip,camera_default"; 64*4882a593Smuzhiyun pinctrl-0 = <&cif_clkout>; 65*4882a593Smuzhiyun rockchip,camera-module-index = <1>; 66*4882a593Smuzhiyun rockchip,camera-module-facing = "front"; 67*4882a593Smuzhiyun rockchip,camera-module-name = "CMK-CW2392"; 68*4882a593Smuzhiyun rockchip,camera-module-lens-name = "M206A-201"; 69*4882a593Smuzhiyun port { 70*4882a593Smuzhiyun ucam_out1: endpoint { 71*4882a593Smuzhiyun //remote-endpoint = <&mipi_in_ucam0>; 72*4882a593Smuzhiyun remote-endpoint = <&mipi_in_ucam1>; 73*4882a593Smuzhiyun data-lanes = <1>; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun }; 77*4882a593Smuzhiyun}; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun&mipi_dphy_rx0 { 80*4882a593Smuzhiyun status = "disabled"; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun ports { 83*4882a593Smuzhiyun #address-cells = <1>; 84*4882a593Smuzhiyun #size-cells = <0>; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun port@0 { 87*4882a593Smuzhiyun reg = <0>; 88*4882a593Smuzhiyun #address-cells = <1>; 89*4882a593Smuzhiyun #size-cells = <0>; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun mipi_in_ucam0: endpoint@1 { 92*4882a593Smuzhiyun reg = <1>; 93*4882a593Smuzhiyun remote-endpoint = <&ucam_out0>; 94*4882a593Smuzhiyun data-lanes = <1 2>; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun port@1 { 99*4882a593Smuzhiyun reg = <1>; 100*4882a593Smuzhiyun #address-cells = <1>; 101*4882a593Smuzhiyun #size-cells = <0>; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun dphy_rx0_out: endpoint@0 { 104*4882a593Smuzhiyun reg = <0>; 105*4882a593Smuzhiyun remote-endpoint = <&isp0_mipi_in>; 106*4882a593Smuzhiyun }; 107*4882a593Smuzhiyun }; 108*4882a593Smuzhiyun }; 109*4882a593Smuzhiyun}; 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun&mipi_dphy_tx1rx1 { 112*4882a593Smuzhiyun status = "okay"; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun ports { 115*4882a593Smuzhiyun #address-cells = <1>; 116*4882a593Smuzhiyun #size-cells = <0>; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun port@0 { 119*4882a593Smuzhiyun reg = <0>; 120*4882a593Smuzhiyun #address-cells = <1>; 121*4882a593Smuzhiyun #size-cells = <0>; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun mipi_in_ucam1: endpoint@1 { 124*4882a593Smuzhiyun reg = <1>; 125*4882a593Smuzhiyun remote-endpoint = <&ucam_out1>; 126*4882a593Smuzhiyun data-lanes = <1>; 127*4882a593Smuzhiyun }; 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun port@1 { 131*4882a593Smuzhiyun reg = <1>; 132*4882a593Smuzhiyun #address-cells = <1>; 133*4882a593Smuzhiyun #size-cells = <0>; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun dphy_tx1rx1_out: endpoint@0 { 136*4882a593Smuzhiyun reg = <0>; 137*4882a593Smuzhiyun remote-endpoint = <&isp1_mipi_in>; 138*4882a593Smuzhiyun }; 139*4882a593Smuzhiyun }; 140*4882a593Smuzhiyun }; 141*4882a593Smuzhiyun}; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun&rkisp1_0 { 144*4882a593Smuzhiyun status = "disabled"; 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun port { 147*4882a593Smuzhiyun #address-cells = <1>; 148*4882a593Smuzhiyun #size-cells = <0>; 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun isp0_mipi_in: endpoint@0 { 151*4882a593Smuzhiyun reg = <0>; 152*4882a593Smuzhiyun remote-endpoint = <&dphy_rx0_out>; 153*4882a593Smuzhiyun }; 154*4882a593Smuzhiyun }; 155*4882a593Smuzhiyun}; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun&rkisp1_1 { 158*4882a593Smuzhiyun status = "okay"; 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun port { 161*4882a593Smuzhiyun #address-cells = <1>; 162*4882a593Smuzhiyun #size-cells = <0>; 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun isp1_mipi_in: endpoint@0 { 165*4882a593Smuzhiyun reg = <0>; 166*4882a593Smuzhiyun remote-endpoint = <&dphy_tx1rx1_out>; 167*4882a593Smuzhiyun }; 168*4882a593Smuzhiyun }; 169*4882a593Smuzhiyun}; 170*4882a593Smuzhiyun 171