1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/dts-v1/; 7*4882a593Smuzhiyun#include "rk3399-sapphire.dtsi" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun model = "Excavator-RK3399 Board"; 11*4882a593Smuzhiyun compatible = "rockchip,rk3399-sapphire-excavator", "rockchip,rk3399"; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun adc-keys { 14*4882a593Smuzhiyun compatible = "adc-keys"; 15*4882a593Smuzhiyun io-channels = <&saradc 1>; 16*4882a593Smuzhiyun io-channel-names = "buttons"; 17*4882a593Smuzhiyun keyup-threshold-microvolt = <1800000>; 18*4882a593Smuzhiyun poll-interval = <100>; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun button-up { 21*4882a593Smuzhiyun label = "Volume Up"; 22*4882a593Smuzhiyun linux,code = <KEY_VOLUMEUP>; 23*4882a593Smuzhiyun press-threshold-microvolt = <100000>; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun button-down { 27*4882a593Smuzhiyun label = "Volume Down"; 28*4882a593Smuzhiyun linux,code = <KEY_VOLUMEDOWN>; 29*4882a593Smuzhiyun press-threshold-microvolt = <300000>; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun back { 33*4882a593Smuzhiyun label = "Back"; 34*4882a593Smuzhiyun linux,code = <KEY_BACK>; 35*4882a593Smuzhiyun press-threshold-microvolt = <985000>; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun menu { 39*4882a593Smuzhiyun label = "Menu"; 40*4882a593Smuzhiyun linux,code = <KEY_MENU>; 41*4882a593Smuzhiyun press-threshold-microvolt = <1314000>; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun backlight: backlight { 46*4882a593Smuzhiyun compatible = "pwm-backlight"; 47*4882a593Smuzhiyun brightness-levels = < 48*4882a593Smuzhiyun 0 1 2 3 4 5 6 7 49*4882a593Smuzhiyun 8 9 10 11 12 13 14 15 50*4882a593Smuzhiyun 16 17 18 19 20 21 22 23 51*4882a593Smuzhiyun 24 25 26 27 28 29 30 31 52*4882a593Smuzhiyun 32 33 34 35 36 37 38 39 53*4882a593Smuzhiyun 40 41 42 43 44 45 46 47 54*4882a593Smuzhiyun 48 49 50 51 52 53 54 55 55*4882a593Smuzhiyun 56 57 58 59 60 61 62 63 56*4882a593Smuzhiyun 64 65 66 67 68 69 70 71 57*4882a593Smuzhiyun 72 73 74 75 76 77 78 79 58*4882a593Smuzhiyun 80 81 82 83 84 85 86 87 59*4882a593Smuzhiyun 88 89 90 91 92 93 94 95 60*4882a593Smuzhiyun 96 97 98 99 100 101 102 103 61*4882a593Smuzhiyun 104 105 106 107 108 109 110 111 62*4882a593Smuzhiyun 112 113 114 115 116 117 118 119 63*4882a593Smuzhiyun 120 121 122 123 124 125 126 127 64*4882a593Smuzhiyun 128 129 130 131 132 133 134 135 65*4882a593Smuzhiyun 136 137 138 139 140 141 142 143 66*4882a593Smuzhiyun 144 145 146 147 148 149 150 151 67*4882a593Smuzhiyun 152 153 154 155 156 157 158 159 68*4882a593Smuzhiyun 160 161 162 163 164 165 166 167 69*4882a593Smuzhiyun 168 169 170 171 172 173 174 175 70*4882a593Smuzhiyun 176 177 178 179 180 181 182 183 71*4882a593Smuzhiyun 184 185 186 187 188 189 190 191 72*4882a593Smuzhiyun 192 193 194 195 196 197 198 199 73*4882a593Smuzhiyun 200 201 202 203 204 205 206 207 74*4882a593Smuzhiyun 208 209 210 211 212 213 214 215 75*4882a593Smuzhiyun 216 217 218 219 220 221 222 223 76*4882a593Smuzhiyun 224 225 226 227 228 229 230 231 77*4882a593Smuzhiyun 232 233 234 235 236 237 238 239 78*4882a593Smuzhiyun 240 241 242 243 244 245 246 247 79*4882a593Smuzhiyun 248 249 250 251 252 253 254 255>; 80*4882a593Smuzhiyun default-brightness-level = <200>; 81*4882a593Smuzhiyun enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; 82*4882a593Smuzhiyun pwms = <&pwm0 0 25000 0>; 83*4882a593Smuzhiyun status = "okay"; 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun edp_panel: edp-panel { 87*4882a593Smuzhiyun compatible ="lg,lp079qx1-sp0v"; 88*4882a593Smuzhiyun backlight = <&backlight>; 89*4882a593Smuzhiyun enable-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; 90*4882a593Smuzhiyun pinctrl-names = "default"; 91*4882a593Smuzhiyun pinctrl-0 = <&lcd_panel_reset>; 92*4882a593Smuzhiyun power-supply = <&vcc3v3_s0>; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun port { 95*4882a593Smuzhiyun panel_in_edp: endpoint { 96*4882a593Smuzhiyun remote-endpoint = <&edp_out_panel>; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun rt5651-sound { 102*4882a593Smuzhiyun compatible = "simple-audio-card"; 103*4882a593Smuzhiyun simple-audio-card,name = "realtek,rt5651-codec"; 104*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 105*4882a593Smuzhiyun simple-audio-card,mclk-fs = <256>; 106*4882a593Smuzhiyun simple-audio-card,widgets = 107*4882a593Smuzhiyun "Microphone", "Mic Jack", 108*4882a593Smuzhiyun "Headphone", "Headphone Jack"; 109*4882a593Smuzhiyun simple-audio-card,routing = 110*4882a593Smuzhiyun "Mic Jack", "MICBIAS1", 111*4882a593Smuzhiyun "IN1P", "Mic Jack", 112*4882a593Smuzhiyun "Headphone Jack", "HPOL", 113*4882a593Smuzhiyun "Headphone Jack", "HPOR"; 114*4882a593Smuzhiyun simple-audio-card,cpu { 115*4882a593Smuzhiyun sound-dai = <&i2s0>; 116*4882a593Smuzhiyun }; 117*4882a593Smuzhiyun simple-audio-card,codec { 118*4882a593Smuzhiyun sound-dai = <&rt5651>; 119*4882a593Smuzhiyun }; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 123*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 124*4882a593Smuzhiyun clocks = <&rk808 1>; 125*4882a593Smuzhiyun clock-names = "ext_clock"; 126*4882a593Smuzhiyun pinctrl-names = "default"; 127*4882a593Smuzhiyun pinctrl-0 = <&wifi_enable_h>; 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun /* 130*4882a593Smuzhiyun * On the module itself this is one of these (depending 131*4882a593Smuzhiyun * on the actual card populated): 132*4882a593Smuzhiyun * - SDIO_RESET_L_WL_REG_ON 133*4882a593Smuzhiyun * - PDN (power down when low) 134*4882a593Smuzhiyun */ 135*4882a593Smuzhiyun reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun}; 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun&edp { 140*4882a593Smuzhiyun status = "okay"; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun ports { 143*4882a593Smuzhiyun edp_out: port@1 { 144*4882a593Smuzhiyun reg = <1>; 145*4882a593Smuzhiyun #address-cells = <1>; 146*4882a593Smuzhiyun #size-cells = <0>; 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun edp_out_panel: endpoint@0 { 149*4882a593Smuzhiyun reg = <0>; 150*4882a593Smuzhiyun remote-endpoint = <&panel_in_edp>; 151*4882a593Smuzhiyun }; 152*4882a593Smuzhiyun }; 153*4882a593Smuzhiyun }; 154*4882a593Smuzhiyun}; 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun&i2c1 { 157*4882a593Smuzhiyun i2c-scl-rising-time-ns = <300>; 158*4882a593Smuzhiyun i2c-scl-falling-time-ns = <15>; 159*4882a593Smuzhiyun status = "okay"; 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun rt5651: rt5651@1a { 162*4882a593Smuzhiyun compatible = "rockchip,rt5651"; 163*4882a593Smuzhiyun reg = <0x1a>; 164*4882a593Smuzhiyun clocks = <&cru SCLK_I2S_8CH_OUT>; 165*4882a593Smuzhiyun clock-names = "mclk"; 166*4882a593Smuzhiyun hp-det-gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>; 167*4882a593Smuzhiyun spk-con-gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; 168*4882a593Smuzhiyun #sound-dai-cells = <0>; 169*4882a593Smuzhiyun }; 170*4882a593Smuzhiyun}; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun&i2c4 { 173*4882a593Smuzhiyun i2c-scl-rising-time-ns = <600>; 174*4882a593Smuzhiyun i2c-scl-falling-time-ns = <20>; 175*4882a593Smuzhiyun status = "okay"; 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun accelerometer@68 { 178*4882a593Smuzhiyun compatible = "invensense,mpu6500"; 179*4882a593Smuzhiyun reg = <0x68>; 180*4882a593Smuzhiyun interrupt-parent = <&gpio1>; 181*4882a593Smuzhiyun interrupts = <RK_PC6 IRQ_TYPE_EDGE_RISING>; 182*4882a593Smuzhiyun }; 183*4882a593Smuzhiyun}; 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun&i2s0 { 186*4882a593Smuzhiyun rockchip,playback-channels = <8>; 187*4882a593Smuzhiyun rockchip,capture-channels = <8>; 188*4882a593Smuzhiyun status = "okay"; 189*4882a593Smuzhiyun}; 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun&pcie_phy { 192*4882a593Smuzhiyun status = "okay"; 193*4882a593Smuzhiyun}; 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun&pcie0 { 196*4882a593Smuzhiyun ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>; 197*4882a593Smuzhiyun num-lanes = <4>; 198*4882a593Smuzhiyun pinctrl-names = "default"; 199*4882a593Smuzhiyun pinctrl-0 = <&pcie_clkreqn_cpm>; 200*4882a593Smuzhiyun status = "okay"; 201*4882a593Smuzhiyun}; 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun&pinctrl { 204*4882a593Smuzhiyun sdio-pwrseq { 205*4882a593Smuzhiyun wifi_enable_h: wifi-enable-h { 206*4882a593Smuzhiyun rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 207*4882a593Smuzhiyun }; 208*4882a593Smuzhiyun }; 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun lcd-panel { 211*4882a593Smuzhiyun lcd_panel_reset: lcd-panel-reset { 212*4882a593Smuzhiyun rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; 213*4882a593Smuzhiyun }; 214*4882a593Smuzhiyun }; 215*4882a593Smuzhiyun}; 216*4882a593Smuzhiyun 217*4882a593Smuzhiyun&sdio0 { 218*4882a593Smuzhiyun bus-width = <4>; 219*4882a593Smuzhiyun cap-sd-highspeed; 220*4882a593Smuzhiyun cap-sdio-irq; 221*4882a593Smuzhiyun clock-frequency = <50000000>; 222*4882a593Smuzhiyun keep-power-in-suspend; 223*4882a593Smuzhiyun max-frequency = <50000000>; 224*4882a593Smuzhiyun mmc-pwrseq = <&sdio_pwrseq>; 225*4882a593Smuzhiyun non-removable; 226*4882a593Smuzhiyun pinctrl-names = "default"; 227*4882a593Smuzhiyun pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; 228*4882a593Smuzhiyun sd-uhs-sdr104; 229*4882a593Smuzhiyun status = "okay"; 230*4882a593Smuzhiyun}; 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun&spdif { 233*4882a593Smuzhiyun status = "okay"; 234*4882a593Smuzhiyun}; 235