xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm64/rockchip/rk3399-rockpro64.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun * Copyright (c) 2018 Akash Gajjar <Akash_Gajjar@mentor.com>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun#include <dt-bindings/input/linux-event-codes.h>
8*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h>
9*4882a593Smuzhiyun#include "rk3399.dtsi"
10*4882a593Smuzhiyun#include "rk3399-opp.dtsi"
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	chosen {
14*4882a593Smuzhiyun		stdout-path = "serial2:1500000n8";
15*4882a593Smuzhiyun	};
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun	clkin_gmac: external-gmac-clock {
18*4882a593Smuzhiyun		compatible = "fixed-clock";
19*4882a593Smuzhiyun		clock-frequency = <125000000>;
20*4882a593Smuzhiyun		clock-output-names = "clkin_gmac";
21*4882a593Smuzhiyun		#clock-cells = <0>;
22*4882a593Smuzhiyun	};
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun	gpio-keys {
25*4882a593Smuzhiyun		compatible = "gpio-keys";
26*4882a593Smuzhiyun		autorepeat;
27*4882a593Smuzhiyun		pinctrl-names = "default";
28*4882a593Smuzhiyun		pinctrl-0 = <&pwrbtn>;
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun		power {
31*4882a593Smuzhiyun			debounce-interval = <100>;
32*4882a593Smuzhiyun			gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
33*4882a593Smuzhiyun			label = "GPIO Key Power";
34*4882a593Smuzhiyun			linux,code = <KEY_POWER>;
35*4882a593Smuzhiyun			wakeup-source;
36*4882a593Smuzhiyun		};
37*4882a593Smuzhiyun	};
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun	leds {
40*4882a593Smuzhiyun		compatible = "gpio-leds";
41*4882a593Smuzhiyun		pinctrl-names = "default";
42*4882a593Smuzhiyun		pinctrl-0 = <&work_led_pin>, <&diy_led_pin>;
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun		work_led: led-0 {
45*4882a593Smuzhiyun			label = "work";
46*4882a593Smuzhiyun			default-state = "on";
47*4882a593Smuzhiyun			gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
48*4882a593Smuzhiyun		};
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun		diy_led: led-1 {
51*4882a593Smuzhiyun			label = "diy";
52*4882a593Smuzhiyun			default-state = "off";
53*4882a593Smuzhiyun			gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
54*4882a593Smuzhiyun		};
55*4882a593Smuzhiyun	};
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun	fan: pwm-fan {
58*4882a593Smuzhiyun		compatible = "pwm-fan";
59*4882a593Smuzhiyun		#cooling-cells = <2>;
60*4882a593Smuzhiyun		fan-supply = <&vcc12v_dcin>;
61*4882a593Smuzhiyun		pwms = <&pwm1 0 50000 0>;
62*4882a593Smuzhiyun	};
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun	sdio_pwrseq: sdio-pwrseq {
65*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
66*4882a593Smuzhiyun		clocks = <&rk808 1>;
67*4882a593Smuzhiyun		clock-names = "ext_clock";
68*4882a593Smuzhiyun		pinctrl-names = "default";
69*4882a593Smuzhiyun		pinctrl-0 = <&wifi_enable_h>;
70*4882a593Smuzhiyun		reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
71*4882a593Smuzhiyun	};
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun	sound {
74*4882a593Smuzhiyun		compatible = "audio-graph-card";
75*4882a593Smuzhiyun		label = "rockchip,rk3399";
76*4882a593Smuzhiyun		dais = <&i2s1_p0>;
77*4882a593Smuzhiyun	};
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun	vcc12v_dcin: vcc12v-dcin {
80*4882a593Smuzhiyun		compatible = "regulator-fixed";
81*4882a593Smuzhiyun		regulator-name = "vcc12v_dcin";
82*4882a593Smuzhiyun		regulator-always-on;
83*4882a593Smuzhiyun		regulator-boot-on;
84*4882a593Smuzhiyun		regulator-min-microvolt = <12000000>;
85*4882a593Smuzhiyun		regulator-max-microvolt = <12000000>;
86*4882a593Smuzhiyun	};
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun	/* switched by pmic_sleep */
89*4882a593Smuzhiyun	vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
90*4882a593Smuzhiyun		compatible = "regulator-fixed";
91*4882a593Smuzhiyun		regulator-name = "vcc1v8_s3";
92*4882a593Smuzhiyun		regulator-always-on;
93*4882a593Smuzhiyun		regulator-boot-on;
94*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
95*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
96*4882a593Smuzhiyun		vin-supply = <&vcc_1v8>;
97*4882a593Smuzhiyun	};
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun	/* micro SD card power */
100*4882a593Smuzhiyun	vcc3v0_sd: vcc3v0-sd {
101*4882a593Smuzhiyun		compatible = "regulator-fixed";
102*4882a593Smuzhiyun		enable-active-high;
103*4882a593Smuzhiyun		gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
104*4882a593Smuzhiyun		pinctrl-names = "default";
105*4882a593Smuzhiyun		pinctrl-0 = <&sdmmc0_pwr_h>;
106*4882a593Smuzhiyun		regulator-name = "vcc3v0_sd";
107*4882a593Smuzhiyun		regulator-always-on;
108*4882a593Smuzhiyun		regulator-min-microvolt = <3000000>;
109*4882a593Smuzhiyun		regulator-max-microvolt = <3000000>;
110*4882a593Smuzhiyun		vin-supply = <&vcc3v3_sys>;
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun		regulator-state-mem {
113*4882a593Smuzhiyun			regulator-off-in-suspend;
114*4882a593Smuzhiyun		};
115*4882a593Smuzhiyun	};
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun	vcc3v3_pcie: vcc3v3-pcie-regulator {
118*4882a593Smuzhiyun		compatible = "regulator-fixed";
119*4882a593Smuzhiyun		enable-active-high;
120*4882a593Smuzhiyun		gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
121*4882a593Smuzhiyun		pinctrl-names = "default";
122*4882a593Smuzhiyun		pinctrl-0 = <&pcie_pwr_en>;
123*4882a593Smuzhiyun		regulator-name = "vcc3v3_pcie";
124*4882a593Smuzhiyun		regulator-always-on;
125*4882a593Smuzhiyun		regulator-boot-on;
126*4882a593Smuzhiyun		vin-supply = <&vcc12v_dcin>;
127*4882a593Smuzhiyun	};
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun	vcc3v3_sys: vcc3v3-sys {
130*4882a593Smuzhiyun		compatible = "regulator-fixed";
131*4882a593Smuzhiyun		regulator-name = "vcc3v3_sys";
132*4882a593Smuzhiyun		regulator-always-on;
133*4882a593Smuzhiyun		regulator-boot-on;
134*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
135*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
136*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
137*4882a593Smuzhiyun	};
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun	/* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
140*4882a593Smuzhiyun	vcc5v0_host: vcc5v0-host-regulator {
141*4882a593Smuzhiyun		compatible = "regulator-fixed";
142*4882a593Smuzhiyun		enable-active-high;
143*4882a593Smuzhiyun		gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
144*4882a593Smuzhiyun		pinctrl-names = "default";
145*4882a593Smuzhiyun		pinctrl-0 = <&vcc5v0_host_en>;
146*4882a593Smuzhiyun		regulator-name = "vcc5v0_host";
147*4882a593Smuzhiyun		regulator-always-on;
148*4882a593Smuzhiyun		vin-supply = <&vcc5v0_usb>;
149*4882a593Smuzhiyun	};
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun	vcc5v0_typec: vcc5v0-typec-regulator {
152*4882a593Smuzhiyun		compatible = "regulator-fixed";
153*4882a593Smuzhiyun		enable-active-high;
154*4882a593Smuzhiyun		gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
155*4882a593Smuzhiyun		pinctrl-names = "default";
156*4882a593Smuzhiyun		pinctrl-0 = <&vcc5v0_typec_en>;
157*4882a593Smuzhiyun		regulator-name = "vcc5v0_typec";
158*4882a593Smuzhiyun		regulator-always-on;
159*4882a593Smuzhiyun		vin-supply = <&vcc5v0_usb>;
160*4882a593Smuzhiyun	};
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun	vcc5v0_sys: vcc5v0-sys {
163*4882a593Smuzhiyun		compatible = "regulator-fixed";
164*4882a593Smuzhiyun		regulator-name = "vcc5v0_sys";
165*4882a593Smuzhiyun		regulator-always-on;
166*4882a593Smuzhiyun		regulator-boot-on;
167*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
168*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
169*4882a593Smuzhiyun		vin-supply = <&vcc12v_dcin>;
170*4882a593Smuzhiyun	};
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun	vcc5v0_usb: vcc5v0-usb {
173*4882a593Smuzhiyun		compatible = "regulator-fixed";
174*4882a593Smuzhiyun		regulator-name = "vcc5v0_usb";
175*4882a593Smuzhiyun		regulator-always-on;
176*4882a593Smuzhiyun		regulator-boot-on;
177*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
178*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
179*4882a593Smuzhiyun		vin-supply = <&vcc12v_dcin>;
180*4882a593Smuzhiyun	};
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun	vdd_log: vdd-log {
183*4882a593Smuzhiyun		compatible = "pwm-regulator";
184*4882a593Smuzhiyun		pwms = <&pwm2 0 25000 1>;
185*4882a593Smuzhiyun		regulator-name = "vdd_log";
186*4882a593Smuzhiyun		regulator-always-on;
187*4882a593Smuzhiyun		regulator-boot-on;
188*4882a593Smuzhiyun		regulator-min-microvolt = <800000>;
189*4882a593Smuzhiyun		regulator-max-microvolt = <1700000>;
190*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
191*4882a593Smuzhiyun	};
192*4882a593Smuzhiyun};
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun&cpu_l0 {
195*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_l>;
196*4882a593Smuzhiyun};
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun&cpu_l1 {
199*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_l>;
200*4882a593Smuzhiyun};
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun&cpu_l2 {
203*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_l>;
204*4882a593Smuzhiyun};
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun&cpu_l3 {
207*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_l>;
208*4882a593Smuzhiyun};
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun&cpu_b0 {
211*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_b>;
212*4882a593Smuzhiyun};
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun&cpu_b1 {
215*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_b>;
216*4882a593Smuzhiyun};
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun&emmc_phy {
219*4882a593Smuzhiyun	status = "okay";
220*4882a593Smuzhiyun};
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun&gmac {
223*4882a593Smuzhiyun	assigned-clocks = <&cru SCLK_RMII_SRC>;
224*4882a593Smuzhiyun	assigned-clock-parents = <&clkin_gmac>;
225*4882a593Smuzhiyun	clock_in_out = "input";
226*4882a593Smuzhiyun	phy-supply = <&vcc_lan>;
227*4882a593Smuzhiyun	phy-mode = "rgmii";
228*4882a593Smuzhiyun	pinctrl-names = "default";
229*4882a593Smuzhiyun	pinctrl-0 = <&rgmii_pins>;
230*4882a593Smuzhiyun	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
231*4882a593Smuzhiyun	snps,reset-active-low;
232*4882a593Smuzhiyun	snps,reset-delays-us = <0 10000 50000>;
233*4882a593Smuzhiyun	tx_delay = <0x28>;
234*4882a593Smuzhiyun	rx_delay = <0x11>;
235*4882a593Smuzhiyun	status = "okay";
236*4882a593Smuzhiyun};
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun&hdmi {
239*4882a593Smuzhiyun	ddc-i2c-bus = <&i2c3>;
240*4882a593Smuzhiyun	pinctrl-names = "default";
241*4882a593Smuzhiyun	pinctrl-0 = <&hdmi_cec>;
242*4882a593Smuzhiyun	status = "okay";
243*4882a593Smuzhiyun};
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun&hdmi_sound {
246*4882a593Smuzhiyun	status = "okay";
247*4882a593Smuzhiyun};
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun&gpu {
250*4882a593Smuzhiyun	mali-supply = <&vdd_gpu>;
251*4882a593Smuzhiyun	status = "okay";
252*4882a593Smuzhiyun};
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun&i2c0 {
255*4882a593Smuzhiyun	clock-frequency = <400000>;
256*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <168>;
257*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <4>;
258*4882a593Smuzhiyun	status = "okay";
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun	rk808: pmic@1b {
261*4882a593Smuzhiyun		compatible = "rockchip,rk808";
262*4882a593Smuzhiyun		reg = <0x1b>;
263*4882a593Smuzhiyun		interrupt-parent = <&gpio3>;
264*4882a593Smuzhiyun		interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
265*4882a593Smuzhiyun		#clock-cells = <1>;
266*4882a593Smuzhiyun		clock-output-names = "xin32k", "rk808-clkout2";
267*4882a593Smuzhiyun		pinctrl-names = "default";
268*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int_l>;
269*4882a593Smuzhiyun		rockchip,system-power-controller;
270*4882a593Smuzhiyun		wakeup-source;
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun		vcc1-supply = <&vcc5v0_sys>;
273*4882a593Smuzhiyun		vcc2-supply = <&vcc5v0_sys>;
274*4882a593Smuzhiyun		vcc3-supply = <&vcc5v0_sys>;
275*4882a593Smuzhiyun		vcc4-supply = <&vcc5v0_sys>;
276*4882a593Smuzhiyun		vcc6-supply = <&vcc5v0_sys>;
277*4882a593Smuzhiyun		vcc7-supply = <&vcc5v0_sys>;
278*4882a593Smuzhiyun		vcc8-supply = <&vcc3v3_sys>;
279*4882a593Smuzhiyun		vcc9-supply = <&vcc5v0_sys>;
280*4882a593Smuzhiyun		vcc10-supply = <&vcc5v0_sys>;
281*4882a593Smuzhiyun		vcc11-supply = <&vcc5v0_sys>;
282*4882a593Smuzhiyun		vcc12-supply = <&vcc3v3_sys>;
283*4882a593Smuzhiyun		vddio-supply = <&vcca_1v8>;
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun		regulators {
286*4882a593Smuzhiyun			vdd_center: DCDC_REG1 {
287*4882a593Smuzhiyun				regulator-name = "vdd_center";
288*4882a593Smuzhiyun				regulator-always-on;
289*4882a593Smuzhiyun				regulator-boot-on;
290*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
291*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
292*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
293*4882a593Smuzhiyun				regulator-state-mem {
294*4882a593Smuzhiyun					regulator-off-in-suspend;
295*4882a593Smuzhiyun				};
296*4882a593Smuzhiyun			};
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun			vdd_cpu_l: DCDC_REG2 {
299*4882a593Smuzhiyun				regulator-name = "vdd_cpu_l";
300*4882a593Smuzhiyun				regulator-always-on;
301*4882a593Smuzhiyun				regulator-boot-on;
302*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
303*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
304*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
305*4882a593Smuzhiyun				regulator-state-mem {
306*4882a593Smuzhiyun					regulator-off-in-suspend;
307*4882a593Smuzhiyun				};
308*4882a593Smuzhiyun			};
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
311*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
312*4882a593Smuzhiyun				regulator-always-on;
313*4882a593Smuzhiyun				regulator-boot-on;
314*4882a593Smuzhiyun				regulator-state-mem {
315*4882a593Smuzhiyun					regulator-on-in-suspend;
316*4882a593Smuzhiyun				};
317*4882a593Smuzhiyun			};
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun			vcc_1v8: DCDC_REG4 {
320*4882a593Smuzhiyun				regulator-name = "vcc_1v8";
321*4882a593Smuzhiyun				regulator-always-on;
322*4882a593Smuzhiyun				regulator-boot-on;
323*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
324*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
325*4882a593Smuzhiyun				regulator-state-mem {
326*4882a593Smuzhiyun					regulator-on-in-suspend;
327*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
328*4882a593Smuzhiyun				};
329*4882a593Smuzhiyun			};
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun			vcc1v8_dvp: LDO_REG1 {
332*4882a593Smuzhiyun				regulator-name = "vcc1v8_dvp";
333*4882a593Smuzhiyun				regulator-always-on;
334*4882a593Smuzhiyun				regulator-boot-on;
335*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
336*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
337*4882a593Smuzhiyun				regulator-state-mem {
338*4882a593Smuzhiyun					regulator-off-in-suspend;
339*4882a593Smuzhiyun				};
340*4882a593Smuzhiyun			};
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun			vcc3v0_touch: LDO_REG2 {
343*4882a593Smuzhiyun				regulator-name = "vcc3v0_touch";
344*4882a593Smuzhiyun				regulator-always-on;
345*4882a593Smuzhiyun				regulator-boot-on;
346*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
347*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
348*4882a593Smuzhiyun				regulator-state-mem {
349*4882a593Smuzhiyun					regulator-off-in-suspend;
350*4882a593Smuzhiyun				};
351*4882a593Smuzhiyun			};
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun			vcca_1v8: LDO_REG3 {
354*4882a593Smuzhiyun				regulator-name = "vcca_1v8";
355*4882a593Smuzhiyun				regulator-always-on;
356*4882a593Smuzhiyun				regulator-boot-on;
357*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
358*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
359*4882a593Smuzhiyun				regulator-state-mem {
360*4882a593Smuzhiyun					regulator-on-in-suspend;
361*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
362*4882a593Smuzhiyun				};
363*4882a593Smuzhiyun			};
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun			vcc_sdio: LDO_REG4 {
366*4882a593Smuzhiyun				regulator-name = "vcc_sdio";
367*4882a593Smuzhiyun				regulator-always-on;
368*4882a593Smuzhiyun				regulator-boot-on;
369*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
370*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
371*4882a593Smuzhiyun				regulator-state-mem {
372*4882a593Smuzhiyun					regulator-on-in-suspend;
373*4882a593Smuzhiyun					regulator-suspend-microvolt = <3000000>;
374*4882a593Smuzhiyun				};
375*4882a593Smuzhiyun			};
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun			vcca3v0_codec: LDO_REG5 {
378*4882a593Smuzhiyun				regulator-name = "vcca3v0_codec";
379*4882a593Smuzhiyun				regulator-always-on;
380*4882a593Smuzhiyun				regulator-boot-on;
381*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
382*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
383*4882a593Smuzhiyun				regulator-state-mem {
384*4882a593Smuzhiyun					regulator-off-in-suspend;
385*4882a593Smuzhiyun				};
386*4882a593Smuzhiyun			};
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun			vcc_1v5: LDO_REG6 {
389*4882a593Smuzhiyun				regulator-name = "vcc_1v5";
390*4882a593Smuzhiyun				regulator-always-on;
391*4882a593Smuzhiyun				regulator-boot-on;
392*4882a593Smuzhiyun				regulator-min-microvolt = <1500000>;
393*4882a593Smuzhiyun				regulator-max-microvolt = <1500000>;
394*4882a593Smuzhiyun				regulator-state-mem {
395*4882a593Smuzhiyun					regulator-on-in-suspend;
396*4882a593Smuzhiyun					regulator-suspend-microvolt = <1500000>;
397*4882a593Smuzhiyun				};
398*4882a593Smuzhiyun			};
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun			vcca1v8_codec: LDO_REG7 {
401*4882a593Smuzhiyun				regulator-name = "vcca1v8_codec";
402*4882a593Smuzhiyun				regulator-always-on;
403*4882a593Smuzhiyun				regulator-boot-on;
404*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
405*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
406*4882a593Smuzhiyun				regulator-state-mem {
407*4882a593Smuzhiyun					regulator-off-in-suspend;
408*4882a593Smuzhiyun				};
409*4882a593Smuzhiyun			};
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun			vcc_3v0: LDO_REG8 {
412*4882a593Smuzhiyun				regulator-name = "vcc_3v0";
413*4882a593Smuzhiyun				regulator-always-on;
414*4882a593Smuzhiyun				regulator-boot-on;
415*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
416*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
417*4882a593Smuzhiyun				regulator-state-mem {
418*4882a593Smuzhiyun					regulator-on-in-suspend;
419*4882a593Smuzhiyun					regulator-suspend-microvolt = <3000000>;
420*4882a593Smuzhiyun				};
421*4882a593Smuzhiyun			};
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun			vcc3v3_s3: vcc_lan: SWITCH_REG1 {
424*4882a593Smuzhiyun				regulator-name = "vcc3v3_s3";
425*4882a593Smuzhiyun				regulator-always-on;
426*4882a593Smuzhiyun				regulator-boot-on;
427*4882a593Smuzhiyun				regulator-state-mem {
428*4882a593Smuzhiyun					regulator-off-in-suspend;
429*4882a593Smuzhiyun				};
430*4882a593Smuzhiyun			};
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun			vcc3v3_s0: SWITCH_REG2 {
433*4882a593Smuzhiyun				regulator-name = "vcc3v3_s0";
434*4882a593Smuzhiyun				regulator-always-on;
435*4882a593Smuzhiyun				regulator-boot-on;
436*4882a593Smuzhiyun				regulator-state-mem {
437*4882a593Smuzhiyun					regulator-off-in-suspend;
438*4882a593Smuzhiyun				};
439*4882a593Smuzhiyun			};
440*4882a593Smuzhiyun		};
441*4882a593Smuzhiyun	};
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun	vdd_cpu_b: regulator@40 {
444*4882a593Smuzhiyun		compatible = "silergy,syr827";
445*4882a593Smuzhiyun		reg = <0x40>;
446*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <1>;
447*4882a593Smuzhiyun		pinctrl-names = "default";
448*4882a593Smuzhiyun		pinctrl-0 = <&vsel1_pin>;
449*4882a593Smuzhiyun		regulator-name = "vdd_cpu_b";
450*4882a593Smuzhiyun		regulator-min-microvolt = <712500>;
451*4882a593Smuzhiyun		regulator-max-microvolt = <1500000>;
452*4882a593Smuzhiyun		regulator-ramp-delay = <1000>;
453*4882a593Smuzhiyun		regulator-always-on;
454*4882a593Smuzhiyun		regulator-boot-on;
455*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun		regulator-state-mem {
458*4882a593Smuzhiyun			regulator-off-in-suspend;
459*4882a593Smuzhiyun		};
460*4882a593Smuzhiyun	};
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun	vdd_gpu: regulator@41 {
463*4882a593Smuzhiyun		compatible = "silergy,syr828";
464*4882a593Smuzhiyun		reg = <0x41>;
465*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <1>;
466*4882a593Smuzhiyun		pinctrl-names = "default";
467*4882a593Smuzhiyun		pinctrl-0 = <&vsel2_pin>;
468*4882a593Smuzhiyun		regulator-name = "vdd_gpu";
469*4882a593Smuzhiyun		regulator-min-microvolt = <712500>;
470*4882a593Smuzhiyun		regulator-max-microvolt = <1500000>;
471*4882a593Smuzhiyun		regulator-ramp-delay = <1000>;
472*4882a593Smuzhiyun		regulator-always-on;
473*4882a593Smuzhiyun		regulator-boot-on;
474*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun		regulator-state-mem {
477*4882a593Smuzhiyun			regulator-off-in-suspend;
478*4882a593Smuzhiyun		};
479*4882a593Smuzhiyun	};
480*4882a593Smuzhiyun};
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun&i2c1 {
483*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <300>;
484*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <15>;
485*4882a593Smuzhiyun	status = "okay";
486*4882a593Smuzhiyun};
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun&i2c3 {
489*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <450>;
490*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <15>;
491*4882a593Smuzhiyun	status = "okay";
492*4882a593Smuzhiyun};
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun&i2c4 {
495*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <600>;
496*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <20>;
497*4882a593Smuzhiyun	status = "okay";
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun	fusb0: typec-portc@22 {
500*4882a593Smuzhiyun		compatible = "fcs,fusb302";
501*4882a593Smuzhiyun		reg = <0x22>;
502*4882a593Smuzhiyun		interrupt-parent = <&gpio1>;
503*4882a593Smuzhiyun		interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
504*4882a593Smuzhiyun		pinctrl-names = "default";
505*4882a593Smuzhiyun		pinctrl-0 = <&fusb0_int>;
506*4882a593Smuzhiyun		vbus-supply = <&vcc5v0_typec>;
507*4882a593Smuzhiyun		status = "okay";
508*4882a593Smuzhiyun	};
509*4882a593Smuzhiyun};
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun&i2s0 {
512*4882a593Smuzhiyun	rockchip,playback-channels = <8>;
513*4882a593Smuzhiyun	rockchip,capture-channels = <8>;
514*4882a593Smuzhiyun	status = "okay";
515*4882a593Smuzhiyun};
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun&i2s1 {
518*4882a593Smuzhiyun	rockchip,playback-channels = <2>;
519*4882a593Smuzhiyun	rockchip,capture-channels = <2>;
520*4882a593Smuzhiyun	status = "okay";
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun	i2s1_p0: port {
523*4882a593Smuzhiyun		i2s1_p0_0: endpoint {
524*4882a593Smuzhiyun			dai-format = "i2s";
525*4882a593Smuzhiyun			mclk-fs = <256>;
526*4882a593Smuzhiyun			remote-endpoint = <&es8316_p0_0>;
527*4882a593Smuzhiyun		};
528*4882a593Smuzhiyun	};
529*4882a593Smuzhiyun};
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun&i2s2 {
532*4882a593Smuzhiyun	status = "okay";
533*4882a593Smuzhiyun};
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun&io_domains {
536*4882a593Smuzhiyun	status = "okay";
537*4882a593Smuzhiyun
538*4882a593Smuzhiyun	bt656-supply = <&vcc1v8_dvp>;
539*4882a593Smuzhiyun	audio-supply = <&vcc_3v0>;
540*4882a593Smuzhiyun	sdmmc-supply = <&vcc_sdio>;
541*4882a593Smuzhiyun	gpio1830-supply = <&vcc_3v0>;
542*4882a593Smuzhiyun};
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun&pcie0 {
545*4882a593Smuzhiyun	ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
546*4882a593Smuzhiyun	num-lanes = <4>;
547*4882a593Smuzhiyun	pinctrl-names = "default";
548*4882a593Smuzhiyun	pinctrl-0 = <&pcie_perst>;
549*4882a593Smuzhiyun	vpcie12v-supply = <&vcc12v_dcin>;
550*4882a593Smuzhiyun	vpcie3v3-supply = <&vcc3v3_pcie>;
551*4882a593Smuzhiyun	status = "okay";
552*4882a593Smuzhiyun};
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun&pcie_phy {
555*4882a593Smuzhiyun	status = "okay";
556*4882a593Smuzhiyun};
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun&pmu_io_domains {
559*4882a593Smuzhiyun	pmu1830-supply = <&vcc_3v0>;
560*4882a593Smuzhiyun	status = "okay";
561*4882a593Smuzhiyun};
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun&pinctrl {
564*4882a593Smuzhiyun	bt {
565*4882a593Smuzhiyun		bt_enable_h: bt-enable-h {
566*4882a593Smuzhiyun			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
567*4882a593Smuzhiyun		};
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun		bt_host_wake_l: bt-host-wake-l {
570*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>;
571*4882a593Smuzhiyun		};
572*4882a593Smuzhiyun
573*4882a593Smuzhiyun		bt_wake_l: bt-wake-l {
574*4882a593Smuzhiyun			rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
575*4882a593Smuzhiyun		};
576*4882a593Smuzhiyun	};
577*4882a593Smuzhiyun
578*4882a593Smuzhiyun	buttons {
579*4882a593Smuzhiyun		pwrbtn: pwrbtn {
580*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
581*4882a593Smuzhiyun		};
582*4882a593Smuzhiyun	};
583*4882a593Smuzhiyun
584*4882a593Smuzhiyun	fusb302x {
585*4882a593Smuzhiyun		fusb0_int: fusb0-int {
586*4882a593Smuzhiyun			rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
587*4882a593Smuzhiyun		};
588*4882a593Smuzhiyun	};
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun	leds {
591*4882a593Smuzhiyun		work_led_pin: work-led-pin {
592*4882a593Smuzhiyun			rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
593*4882a593Smuzhiyun		};
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun		diy_led_pin: diy-led-pin {
596*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
597*4882a593Smuzhiyun		};
598*4882a593Smuzhiyun	};
599*4882a593Smuzhiyun
600*4882a593Smuzhiyun	pcie {
601*4882a593Smuzhiyun		pcie_perst: pcie-perst {
602*4882a593Smuzhiyun			rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
603*4882a593Smuzhiyun		};
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun		pcie_pwr_en: pcie-pwr-en {
606*4882a593Smuzhiyun			rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
607*4882a593Smuzhiyun		};
608*4882a593Smuzhiyun	};
609*4882a593Smuzhiyun
610*4882a593Smuzhiyun	pmic {
611*4882a593Smuzhiyun		pmic_int_l: pmic-int-l {
612*4882a593Smuzhiyun			rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
613*4882a593Smuzhiyun		};
614*4882a593Smuzhiyun
615*4882a593Smuzhiyun		vsel1_pin: vsel1-pin {
616*4882a593Smuzhiyun			rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
617*4882a593Smuzhiyun		};
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun		vsel2_pin: vsel2-pin {
620*4882a593Smuzhiyun			rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
621*4882a593Smuzhiyun		};
622*4882a593Smuzhiyun	};
623*4882a593Smuzhiyun
624*4882a593Smuzhiyun	sdcard {
625*4882a593Smuzhiyun		sdmmc0_pwr_h: sdmmc0-pwr-h {
626*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
627*4882a593Smuzhiyun		};
628*4882a593Smuzhiyun
629*4882a593Smuzhiyun	};
630*4882a593Smuzhiyun
631*4882a593Smuzhiyun	sdio-pwrseq {
632*4882a593Smuzhiyun		wifi_enable_h: wifi-enable-h {
633*4882a593Smuzhiyun			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
634*4882a593Smuzhiyun		};
635*4882a593Smuzhiyun	};
636*4882a593Smuzhiyun
637*4882a593Smuzhiyun	usb-typec {
638*4882a593Smuzhiyun		vcc5v0_typec_en: vcc5v0_typec_en {
639*4882a593Smuzhiyun			rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
640*4882a593Smuzhiyun		};
641*4882a593Smuzhiyun	};
642*4882a593Smuzhiyun
643*4882a593Smuzhiyun	usb2 {
644*4882a593Smuzhiyun		vcc5v0_host_en: vcc5v0-host-en {
645*4882a593Smuzhiyun			rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
646*4882a593Smuzhiyun		};
647*4882a593Smuzhiyun	};
648*4882a593Smuzhiyun};
649*4882a593Smuzhiyun
650*4882a593Smuzhiyun&pwm0 {
651*4882a593Smuzhiyun	status = "okay";
652*4882a593Smuzhiyun};
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun&pwm1 {
655*4882a593Smuzhiyun	status = "okay";
656*4882a593Smuzhiyun};
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun&pwm2 {
659*4882a593Smuzhiyun	status = "okay";
660*4882a593Smuzhiyun};
661*4882a593Smuzhiyun
662*4882a593Smuzhiyun&saradc {
663*4882a593Smuzhiyun	vref-supply = <&vcca1v8_s3>;
664*4882a593Smuzhiyun	status = "okay";
665*4882a593Smuzhiyun};
666*4882a593Smuzhiyun
667*4882a593Smuzhiyun&sdio0 {
668*4882a593Smuzhiyun	bus-width = <4>;
669*4882a593Smuzhiyun	cap-sd-highspeed;
670*4882a593Smuzhiyun	cap-sdio-irq;
671*4882a593Smuzhiyun	disable-wp;
672*4882a593Smuzhiyun	keep-power-in-suspend;
673*4882a593Smuzhiyun	mmc-pwrseq = <&sdio_pwrseq>;
674*4882a593Smuzhiyun	non-removable;
675*4882a593Smuzhiyun	pinctrl-names = "default";
676*4882a593Smuzhiyun	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
677*4882a593Smuzhiyun	sd-uhs-sdr104;
678*4882a593Smuzhiyun	status = "okay";
679*4882a593Smuzhiyun};
680*4882a593Smuzhiyun
681*4882a593Smuzhiyun&sdmmc {
682*4882a593Smuzhiyun	bus-width = <4>;
683*4882a593Smuzhiyun	cap-sd-highspeed;
684*4882a593Smuzhiyun	cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
685*4882a593Smuzhiyun	disable-wp;
686*4882a593Smuzhiyun	max-frequency = <150000000>;
687*4882a593Smuzhiyun	pinctrl-names = "default";
688*4882a593Smuzhiyun	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
689*4882a593Smuzhiyun	vmmc-supply = <&vcc3v0_sd>;
690*4882a593Smuzhiyun	vqmmc-supply = <&vcc_sdio>;
691*4882a593Smuzhiyun	status = "okay";
692*4882a593Smuzhiyun};
693*4882a593Smuzhiyun
694*4882a593Smuzhiyun&sdhci {
695*4882a593Smuzhiyun	bus-width = <8>;
696*4882a593Smuzhiyun	mmc-hs200-1_8v;
697*4882a593Smuzhiyun	non-removable;
698*4882a593Smuzhiyun	status = "okay";
699*4882a593Smuzhiyun};
700*4882a593Smuzhiyun
701*4882a593Smuzhiyun&spi1 {
702*4882a593Smuzhiyun	status = "okay";
703*4882a593Smuzhiyun
704*4882a593Smuzhiyun	flash@0 {
705*4882a593Smuzhiyun		compatible = "jedec,spi-nor";
706*4882a593Smuzhiyun		reg = <0>;
707*4882a593Smuzhiyun		spi-max-frequency = <10000000>;
708*4882a593Smuzhiyun	};
709*4882a593Smuzhiyun};
710*4882a593Smuzhiyun
711*4882a593Smuzhiyun&tcphy0 {
712*4882a593Smuzhiyun	status = "okay";
713*4882a593Smuzhiyun};
714*4882a593Smuzhiyun
715*4882a593Smuzhiyun&tcphy1 {
716*4882a593Smuzhiyun	status = "okay";
717*4882a593Smuzhiyun};
718*4882a593Smuzhiyun
719*4882a593Smuzhiyun&tsadc {
720*4882a593Smuzhiyun	/* tshut mode 0:CRU 1:GPIO */
721*4882a593Smuzhiyun	rockchip,hw-tshut-mode = <1>;
722*4882a593Smuzhiyun	/* tshut polarity 0:LOW 1:HIGH */
723*4882a593Smuzhiyun	rockchip,hw-tshut-polarity = <1>;
724*4882a593Smuzhiyun	status = "okay";
725*4882a593Smuzhiyun};
726*4882a593Smuzhiyun
727*4882a593Smuzhiyun&u2phy0 {
728*4882a593Smuzhiyun	status = "okay";
729*4882a593Smuzhiyun
730*4882a593Smuzhiyun	u2phy0_otg: otg-port {
731*4882a593Smuzhiyun		status = "okay";
732*4882a593Smuzhiyun	};
733*4882a593Smuzhiyun
734*4882a593Smuzhiyun	u2phy0_host: host-port {
735*4882a593Smuzhiyun		phy-supply = <&vcc5v0_host>;
736*4882a593Smuzhiyun		status = "okay";
737*4882a593Smuzhiyun	};
738*4882a593Smuzhiyun};
739*4882a593Smuzhiyun
740*4882a593Smuzhiyun&u2phy1 {
741*4882a593Smuzhiyun	status = "okay";
742*4882a593Smuzhiyun
743*4882a593Smuzhiyun	u2phy1_otg: otg-port {
744*4882a593Smuzhiyun		status = "okay";
745*4882a593Smuzhiyun	};
746*4882a593Smuzhiyun
747*4882a593Smuzhiyun	u2phy1_host: host-port {
748*4882a593Smuzhiyun		phy-supply = <&vcc5v0_host>;
749*4882a593Smuzhiyun		status = "okay";
750*4882a593Smuzhiyun	};
751*4882a593Smuzhiyun};
752*4882a593Smuzhiyun
753*4882a593Smuzhiyun&uart0 {
754*4882a593Smuzhiyun	pinctrl-names = "default";
755*4882a593Smuzhiyun	pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
756*4882a593Smuzhiyun	status = "okay";
757*4882a593Smuzhiyun
758*4882a593Smuzhiyun	bluetooth {
759*4882a593Smuzhiyun		compatible = "brcm,bcm43438-bt";
760*4882a593Smuzhiyun		clocks = <&rk808 1>;
761*4882a593Smuzhiyun		clock-names = "lpo";
762*4882a593Smuzhiyun		device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
763*4882a593Smuzhiyun		host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
764*4882a593Smuzhiyun		shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
765*4882a593Smuzhiyun		pinctrl-names = "default";
766*4882a593Smuzhiyun		pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
767*4882a593Smuzhiyun		vbat-supply = <&vcc3v3_sys>;
768*4882a593Smuzhiyun		vddio-supply = <&vcc_1v8>;
769*4882a593Smuzhiyun	};
770*4882a593Smuzhiyun};
771*4882a593Smuzhiyun
772*4882a593Smuzhiyun&uart2 {
773*4882a593Smuzhiyun	status = "okay";
774*4882a593Smuzhiyun};
775*4882a593Smuzhiyun
776*4882a593Smuzhiyun&usb_host0_ehci {
777*4882a593Smuzhiyun	status = "okay";
778*4882a593Smuzhiyun};
779*4882a593Smuzhiyun
780*4882a593Smuzhiyun&usb_host0_ohci {
781*4882a593Smuzhiyun	status = "okay";
782*4882a593Smuzhiyun};
783*4882a593Smuzhiyun
784*4882a593Smuzhiyun&usb_host1_ehci {
785*4882a593Smuzhiyun	status = "okay";
786*4882a593Smuzhiyun};
787*4882a593Smuzhiyun
788*4882a593Smuzhiyun&usb_host1_ohci {
789*4882a593Smuzhiyun	status = "okay";
790*4882a593Smuzhiyun};
791*4882a593Smuzhiyun
792*4882a593Smuzhiyun&usbdrd3_0 {
793*4882a593Smuzhiyun	status = "okay";
794*4882a593Smuzhiyun};
795*4882a593Smuzhiyun
796*4882a593Smuzhiyun&usbdrd_dwc3_0 {
797*4882a593Smuzhiyun	status = "okay";
798*4882a593Smuzhiyun	dr_mode = "host";
799*4882a593Smuzhiyun};
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun&usbdrd3_1 {
802*4882a593Smuzhiyun	status = "okay";
803*4882a593Smuzhiyun};
804*4882a593Smuzhiyun
805*4882a593Smuzhiyun&usbdrd_dwc3_1 {
806*4882a593Smuzhiyun	status = "okay";
807*4882a593Smuzhiyun	dr_mode = "host";
808*4882a593Smuzhiyun};
809*4882a593Smuzhiyun
810*4882a593Smuzhiyun&vopb {
811*4882a593Smuzhiyun	status = "okay";
812*4882a593Smuzhiyun};
813*4882a593Smuzhiyun
814*4882a593Smuzhiyun&vopb_mmu {
815*4882a593Smuzhiyun	status = "okay";
816*4882a593Smuzhiyun};
817*4882a593Smuzhiyun
818*4882a593Smuzhiyun&vopl {
819*4882a593Smuzhiyun	status = "okay";
820*4882a593Smuzhiyun};
821*4882a593Smuzhiyun
822*4882a593Smuzhiyun&vopl_mmu {
823*4882a593Smuzhiyun	status = "okay";
824*4882a593Smuzhiyun};
825