xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm64/rockchip/rk3399-rock960.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2018 Collabora Ltd.
4*4882a593Smuzhiyun * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd.
5*4882a593Smuzhiyun * Copyright (c) 2018 Linaro Ltd.
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun#include "rk3399.dtsi"
9*4882a593Smuzhiyun#include "rk3399-opp.dtsi"
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	sdio_pwrseq: sdio-pwrseq {
13*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
14*4882a593Smuzhiyun		clocks = <&rk808 1>;
15*4882a593Smuzhiyun		clock-names = "ext_clock";
16*4882a593Smuzhiyun		pinctrl-names = "default";
17*4882a593Smuzhiyun		pinctrl-0 = <&wifi_enable_h>;
18*4882a593Smuzhiyun		reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
19*4882a593Smuzhiyun	};
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun	vcc12v_dcin: vcc12v-dcin {
22*4882a593Smuzhiyun		compatible = "regulator-fixed";
23*4882a593Smuzhiyun		regulator-name = "vcc12v_dcin";
24*4882a593Smuzhiyun		regulator-min-microvolt = <12000000>;
25*4882a593Smuzhiyun		regulator-max-microvolt = <12000000>;
26*4882a593Smuzhiyun		regulator-always-on;
27*4882a593Smuzhiyun		regulator-boot-on;
28*4882a593Smuzhiyun	};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun	vcc1v8_s0: vcc1v8-s0 {
31*4882a593Smuzhiyun		compatible = "regulator-fixed";
32*4882a593Smuzhiyun		regulator-name = "vcc1v8_s0";
33*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
34*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
35*4882a593Smuzhiyun		regulator-always-on;
36*4882a593Smuzhiyun	};
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun	vcc5v0_sys: vcc5v0-sys {
39*4882a593Smuzhiyun		compatible = "regulator-fixed";
40*4882a593Smuzhiyun		regulator-name = "vcc5v0_sys";
41*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
42*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
43*4882a593Smuzhiyun		regulator-always-on;
44*4882a593Smuzhiyun		vin-supply = <&vcc12v_dcin>;
45*4882a593Smuzhiyun	};
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun	vcc3v3_sys: vcc3v3-sys {
48*4882a593Smuzhiyun		compatible = "regulator-fixed";
49*4882a593Smuzhiyun		regulator-name = "vcc3v3_sys";
50*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
51*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
52*4882a593Smuzhiyun		regulator-always-on;
53*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
54*4882a593Smuzhiyun	};
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun	vcc3v3_pcie: vcc3v3-pcie-regulator {
57*4882a593Smuzhiyun		compatible = "regulator-fixed";
58*4882a593Smuzhiyun		enable-active-high;
59*4882a593Smuzhiyun		pinctrl-names = "default";
60*4882a593Smuzhiyun		pinctrl-0 = <&pcie_drv>;
61*4882a593Smuzhiyun		regulator-boot-on;
62*4882a593Smuzhiyun		regulator-name = "vcc3v3_pcie";
63*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
64*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
65*4882a593Smuzhiyun		vin-supply = <&vcc3v3_sys>;
66*4882a593Smuzhiyun	};
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun	vcc5v0_host: vcc5v0-host-regulator {
69*4882a593Smuzhiyun		compatible = "regulator-fixed";
70*4882a593Smuzhiyun		enable-active-high;
71*4882a593Smuzhiyun		pinctrl-names = "default";
72*4882a593Smuzhiyun		pinctrl-0 = <&host_vbus_drv>;
73*4882a593Smuzhiyun		regulator-name = "vcc5v0_host";
74*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
75*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
76*4882a593Smuzhiyun		regulator-always-on;
77*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
78*4882a593Smuzhiyun	};
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun	vcc_0v9: vcc-0v9 {
81*4882a593Smuzhiyun		compatible = "regulator-fixed";
82*4882a593Smuzhiyun		regulator-name = "vcc_0v9";
83*4882a593Smuzhiyun		regulator-always-on;
84*4882a593Smuzhiyun		regulator-min-microvolt = <900000>;
85*4882a593Smuzhiyun		regulator-max-microvolt = <900000>;
86*4882a593Smuzhiyun		vin-supply = <&vcc3v3_sys>;
87*4882a593Smuzhiyun	};
88*4882a593Smuzhiyun};
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun&cpu_l0 {
91*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_l>;
92*4882a593Smuzhiyun};
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun&cpu_l1 {
95*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_l>;
96*4882a593Smuzhiyun};
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun&cpu_l2 {
99*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_l>;
100*4882a593Smuzhiyun};
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun&cpu_l3 {
103*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_l>;
104*4882a593Smuzhiyun};
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun&cpu_b0 {
107*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_b>;
108*4882a593Smuzhiyun};
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun&cpu_b1 {
111*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_b>;
112*4882a593Smuzhiyun};
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun&emmc_phy {
115*4882a593Smuzhiyun	status = "okay";
116*4882a593Smuzhiyun};
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun&gpu {
119*4882a593Smuzhiyun	mali-supply = <&vdd_gpu>;
120*4882a593Smuzhiyun	status = "okay";
121*4882a593Smuzhiyun};
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun&hdmi {
124*4882a593Smuzhiyun	ddc-i2c-bus = <&i2c3>;
125*4882a593Smuzhiyun	pinctrl-names = "default";
126*4882a593Smuzhiyun	pinctrl-0 = <&hdmi_cec>;
127*4882a593Smuzhiyun	status = "okay";
128*4882a593Smuzhiyun};
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun&hdmi_sound {
131*4882a593Smuzhiyun	status = "okay";
132*4882a593Smuzhiyun};
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun&i2c0 {
135*4882a593Smuzhiyun	clock-frequency = <400000>;
136*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <168>;
137*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <4>;
138*4882a593Smuzhiyun	status = "okay";
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun	vdd_cpu_b: regulator@40 {
141*4882a593Smuzhiyun		compatible = "silergy,syr827";
142*4882a593Smuzhiyun		reg = <0x40>;
143*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <1>;
144*4882a593Smuzhiyun		regulator-name = "vdd_cpu_b";
145*4882a593Smuzhiyun		regulator-min-microvolt = <712500>;
146*4882a593Smuzhiyun		regulator-max-microvolt = <1500000>;
147*4882a593Smuzhiyun		regulator-ramp-delay = <1000>;
148*4882a593Smuzhiyun		regulator-always-on;
149*4882a593Smuzhiyun		regulator-boot-on;
150*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
151*4882a593Smuzhiyun		status = "okay";
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun		regulator-state-mem {
154*4882a593Smuzhiyun			regulator-off-in-suspend;
155*4882a593Smuzhiyun		};
156*4882a593Smuzhiyun	};
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun	vdd_gpu: regulator@41 {
159*4882a593Smuzhiyun		compatible = "silergy,syr828";
160*4882a593Smuzhiyun		reg = <0x41>;
161*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <1>;
162*4882a593Smuzhiyun		regulator-name = "vdd_gpu";
163*4882a593Smuzhiyun		regulator-min-microvolt = <712500>;
164*4882a593Smuzhiyun		regulator-max-microvolt = <1500000>;
165*4882a593Smuzhiyun		regulator-ramp-delay = <1000>;
166*4882a593Smuzhiyun		regulator-always-on;
167*4882a593Smuzhiyun		regulator-boot-on;
168*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
169*4882a593Smuzhiyun		regulator-state-mem {
170*4882a593Smuzhiyun			regulator-off-in-suspend;
171*4882a593Smuzhiyun		};
172*4882a593Smuzhiyun	};
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun	rk808: pmic@1b {
175*4882a593Smuzhiyun		compatible = "rockchip,rk808";
176*4882a593Smuzhiyun		reg = <0x1b>;
177*4882a593Smuzhiyun		interrupt-parent = <&gpio1>;
178*4882a593Smuzhiyun		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
179*4882a593Smuzhiyun		pinctrl-names = "default";
180*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int_l>;
181*4882a593Smuzhiyun		rockchip,system-power-controller;
182*4882a593Smuzhiyun		wakeup-source;
183*4882a593Smuzhiyun		#clock-cells = <1>;
184*4882a593Smuzhiyun		clock-output-names = "xin32k", "rk808-clkout2";
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun		vcc1-supply = <&vcc5v0_sys>;
187*4882a593Smuzhiyun		vcc2-supply = <&vcc5v0_sys>;
188*4882a593Smuzhiyun		vcc3-supply = <&vcc5v0_sys>;
189*4882a593Smuzhiyun		vcc4-supply = <&vcc5v0_sys>;
190*4882a593Smuzhiyun		vcc6-supply = <&vcc5v0_sys>;
191*4882a593Smuzhiyun		vcc7-supply = <&vcc5v0_sys>;
192*4882a593Smuzhiyun		vcc8-supply = <&vcc3v3_sys>;
193*4882a593Smuzhiyun		vcc9-supply = <&vcc5v0_sys>;
194*4882a593Smuzhiyun		vcc10-supply = <&vcc5v0_sys>;
195*4882a593Smuzhiyun		vcc11-supply = <&vcc5v0_sys>;
196*4882a593Smuzhiyun		vcc12-supply = <&vcc3v3_sys>;
197*4882a593Smuzhiyun		vddio-supply = <&vcc_1v8>;
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun		regulators {
200*4882a593Smuzhiyun			vdd_center: DCDC_REG1 {
201*4882a593Smuzhiyun				regulator-name = "vdd_center";
202*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
203*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
204*4882a593Smuzhiyun				regulator-always-on;
205*4882a593Smuzhiyun				regulator-boot-on;
206*4882a593Smuzhiyun				regulator-state-mem {
207*4882a593Smuzhiyun					regulator-off-in-suspend;
208*4882a593Smuzhiyun				};
209*4882a593Smuzhiyun			};
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun			vdd_cpu_l: DCDC_REG2 {
212*4882a593Smuzhiyun				regulator-name = "vdd_cpu_l";
213*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
214*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
215*4882a593Smuzhiyun				regulator-always-on;
216*4882a593Smuzhiyun				regulator-boot-on;
217*4882a593Smuzhiyun				regulator-state-mem {
218*4882a593Smuzhiyun					regulator-off-in-suspend;
219*4882a593Smuzhiyun				};
220*4882a593Smuzhiyun			};
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
223*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
224*4882a593Smuzhiyun				regulator-always-on;
225*4882a593Smuzhiyun				regulator-boot-on;
226*4882a593Smuzhiyun				regulator-state-mem {
227*4882a593Smuzhiyun					regulator-on-in-suspend;
228*4882a593Smuzhiyun				};
229*4882a593Smuzhiyun			};
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun			vcc_1v8: DCDC_REG4 {
232*4882a593Smuzhiyun				regulator-name = "vcc_1v8";
233*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
234*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
235*4882a593Smuzhiyun				regulator-always-on;
236*4882a593Smuzhiyun				regulator-boot-on;
237*4882a593Smuzhiyun				regulator-state-mem {
238*4882a593Smuzhiyun					regulator-on-in-suspend;
239*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
240*4882a593Smuzhiyun				};
241*4882a593Smuzhiyun			};
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun			vcc1v8_dvp: LDO_REG1 {
244*4882a593Smuzhiyun				regulator-name = "vcc1v8_dvp";
245*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
246*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
247*4882a593Smuzhiyun				regulator-always-on;
248*4882a593Smuzhiyun				regulator-boot-on;
249*4882a593Smuzhiyun				regulator-state-mem {
250*4882a593Smuzhiyun					regulator-on-in-suspend;
251*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
252*4882a593Smuzhiyun				};
253*4882a593Smuzhiyun			};
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun			vcca1v8_hdmi: LDO_REG2 {
256*4882a593Smuzhiyun				regulator-name = "vcca1v8_hdmi";
257*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
258*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
259*4882a593Smuzhiyun				regulator-always-on;
260*4882a593Smuzhiyun				regulator-boot-on;
261*4882a593Smuzhiyun				regulator-state-mem {
262*4882a593Smuzhiyun					regulator-on-in-suspend;
263*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
264*4882a593Smuzhiyun				};
265*4882a593Smuzhiyun			};
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun			vcca_1v8: LDO_REG3 {
268*4882a593Smuzhiyun				regulator-name = "vcca_1v8";
269*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
270*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
271*4882a593Smuzhiyun				regulator-always-on;
272*4882a593Smuzhiyun				regulator-boot-on;
273*4882a593Smuzhiyun				regulator-state-mem {
274*4882a593Smuzhiyun					regulator-on-in-suspend;
275*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
276*4882a593Smuzhiyun				};
277*4882a593Smuzhiyun			};
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun			vcc_sd: LDO_REG4 {
280*4882a593Smuzhiyun				regulator-name = "vcc_sd";
281*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
282*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
283*4882a593Smuzhiyun				regulator-always-on;
284*4882a593Smuzhiyun				regulator-boot-on;
285*4882a593Smuzhiyun				regulator-state-mem {
286*4882a593Smuzhiyun					regulator-on-in-suspend;
287*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
288*4882a593Smuzhiyun				};
289*4882a593Smuzhiyun			};
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun			vcc3v0_sd: LDO_REG5 {
292*4882a593Smuzhiyun				regulator-name = "vcc3v0_sd";
293*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
294*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
295*4882a593Smuzhiyun				regulator-always-on;
296*4882a593Smuzhiyun				regulator-boot-on;
297*4882a593Smuzhiyun				regulator-state-mem {
298*4882a593Smuzhiyun					regulator-on-in-suspend;
299*4882a593Smuzhiyun					regulator-suspend-microvolt = <3000000>;
300*4882a593Smuzhiyun				};
301*4882a593Smuzhiyun			};
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun			vcc_1v5: LDO_REG6 {
304*4882a593Smuzhiyun				regulator-name = "vcc_1v5";
305*4882a593Smuzhiyun				regulator-min-microvolt = <1500000>;
306*4882a593Smuzhiyun				regulator-max-microvolt = <1500000>;
307*4882a593Smuzhiyun				regulator-always-on;
308*4882a593Smuzhiyun				regulator-boot-on;
309*4882a593Smuzhiyun				regulator-state-mem {
310*4882a593Smuzhiyun					regulator-on-in-suspend;
311*4882a593Smuzhiyun					regulator-suspend-microvolt = <1500000>;
312*4882a593Smuzhiyun				};
313*4882a593Smuzhiyun			};
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun			vcca0v9_hdmi: LDO_REG7 {
316*4882a593Smuzhiyun				regulator-name = "vcca0v9_hdmi";
317*4882a593Smuzhiyun				regulator-min-microvolt = <900000>;
318*4882a593Smuzhiyun				regulator-max-microvolt = <900000>;
319*4882a593Smuzhiyun				regulator-always-on;
320*4882a593Smuzhiyun				regulator-boot-on;
321*4882a593Smuzhiyun				regulator-state-mem {
322*4882a593Smuzhiyun					regulator-on-in-suspend;
323*4882a593Smuzhiyun					regulator-suspend-microvolt = <900000>;
324*4882a593Smuzhiyun				};
325*4882a593Smuzhiyun			};
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun			vcc_3v0: LDO_REG8 {
328*4882a593Smuzhiyun				regulator-name = "vcc_3v0";
329*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
330*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
331*4882a593Smuzhiyun				regulator-always-on;
332*4882a593Smuzhiyun				regulator-boot-on;
333*4882a593Smuzhiyun				regulator-state-mem {
334*4882a593Smuzhiyun					regulator-on-in-suspend;
335*4882a593Smuzhiyun					regulator-suspend-microvolt = <3000000>;
336*4882a593Smuzhiyun				};
337*4882a593Smuzhiyun			};
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun			vcc3v3_s3: SWITCH_REG1 {
340*4882a593Smuzhiyun				regulator-name = "vcc3v3_s3";
341*4882a593Smuzhiyun				regulator-always-on;
342*4882a593Smuzhiyun				regulator-boot-on;
343*4882a593Smuzhiyun				regulator-state-mem {
344*4882a593Smuzhiyun					regulator-on-in-suspend;
345*4882a593Smuzhiyun				};
346*4882a593Smuzhiyun			};
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun			vcc3v3_s0: SWITCH_REG2 {
349*4882a593Smuzhiyun				regulator-name = "vcc3v3_s0";
350*4882a593Smuzhiyun				regulator-always-on;
351*4882a593Smuzhiyun				regulator-boot-on;
352*4882a593Smuzhiyun				regulator-state-mem {
353*4882a593Smuzhiyun					regulator-on-in-suspend;
354*4882a593Smuzhiyun				};
355*4882a593Smuzhiyun			};
356*4882a593Smuzhiyun		};
357*4882a593Smuzhiyun	};
358*4882a593Smuzhiyun};
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun&i2c1 {
361*4882a593Smuzhiyun	status = "okay";
362*4882a593Smuzhiyun};
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun&i2c2 {
365*4882a593Smuzhiyun	status = "okay";
366*4882a593Smuzhiyun};
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun&i2c3 {
369*4882a593Smuzhiyun	status = "okay";
370*4882a593Smuzhiyun};
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun&i2c4 {
373*4882a593Smuzhiyun	status = "okay";
374*4882a593Smuzhiyun};
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun&i2s2 {
377*4882a593Smuzhiyun        status = "okay";
378*4882a593Smuzhiyun};
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun&io_domains {
381*4882a593Smuzhiyun	bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */
382*4882a593Smuzhiyun	audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */
383*4882a593Smuzhiyun	sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
384*4882a593Smuzhiyun	gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
385*4882a593Smuzhiyun	status = "okay";
386*4882a593Smuzhiyun};
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun&pcie_phy {
389*4882a593Smuzhiyun	status = "okay";
390*4882a593Smuzhiyun};
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun&pcie0 {
393*4882a593Smuzhiyun	num-lanes = <4>;
394*4882a593Smuzhiyun	pinctrl-names = "default";
395*4882a593Smuzhiyun	pinctrl-0 = <&pcie_clkreqn_cpm>;
396*4882a593Smuzhiyun	vpcie0v9-supply = <&vcc_0v9>;
397*4882a593Smuzhiyun	vpcie1v8-supply = <&vcca_1v8>;
398*4882a593Smuzhiyun	vpcie3v3-supply = <&vcc3v3_pcie>;
399*4882a593Smuzhiyun	status = "okay";
400*4882a593Smuzhiyun};
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun&pmu_io_domains {
403*4882a593Smuzhiyun	pmu1830-supply = <&vcc_1v8>;
404*4882a593Smuzhiyun	status = "okay";
405*4882a593Smuzhiyun};
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun&pinctrl {
408*4882a593Smuzhiyun	bt {
409*4882a593Smuzhiyun		bt_enable_h: bt-enable-h {
410*4882a593Smuzhiyun			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
411*4882a593Smuzhiyun		};
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun		bt_host_wake_l: bt-host-wake-l {
414*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
415*4882a593Smuzhiyun		};
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun		bt_wake_l: bt-wake-l {
418*4882a593Smuzhiyun			rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
419*4882a593Smuzhiyun		};
420*4882a593Smuzhiyun	};
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun	sdmmc {
423*4882a593Smuzhiyun		sdmmc_bus1: sdmmc-bus1 {
424*4882a593Smuzhiyun			rockchip,pins =
425*4882a593Smuzhiyun				<4 RK_PB0 1 &pcfg_pull_up_8ma>;
426*4882a593Smuzhiyun		};
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun		sdmmc_bus4: sdmmc-bus4 {
429*4882a593Smuzhiyun			rockchip,pins =
430*4882a593Smuzhiyun				<4 RK_PB0 1 &pcfg_pull_up_8ma>,
431*4882a593Smuzhiyun				<4 RK_PB1 1 &pcfg_pull_up_8ma>,
432*4882a593Smuzhiyun				<4 RK_PB2 1 &pcfg_pull_up_8ma>,
433*4882a593Smuzhiyun				<4 RK_PB3 1 &pcfg_pull_up_8ma>;
434*4882a593Smuzhiyun		};
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun		sdmmc_clk: sdmmc-clk {
437*4882a593Smuzhiyun			rockchip,pins =
438*4882a593Smuzhiyun				<4 RK_PB4 1 &pcfg_pull_none_18ma>;
439*4882a593Smuzhiyun		};
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun		sdmmc_cmd: sdmmc-cmd {
442*4882a593Smuzhiyun			rockchip,pins =
443*4882a593Smuzhiyun				<4 RK_PB5 1 &pcfg_pull_up_8ma>;
444*4882a593Smuzhiyun		};
445*4882a593Smuzhiyun	};
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun	sdio0 {
448*4882a593Smuzhiyun		sdio0_bus4: sdio0-bus4 {
449*4882a593Smuzhiyun			rockchip,pins =
450*4882a593Smuzhiyun				<2 RK_PC4 1 &pcfg_pull_up_20ma>,
451*4882a593Smuzhiyun				<2 RK_PC5 1 &pcfg_pull_up_20ma>,
452*4882a593Smuzhiyun				<2 RK_PC6 1 &pcfg_pull_up_20ma>,
453*4882a593Smuzhiyun				<2 RK_PC7 1 &pcfg_pull_up_20ma>;
454*4882a593Smuzhiyun		};
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun		sdio0_cmd: sdio0-cmd {
457*4882a593Smuzhiyun			rockchip,pins =
458*4882a593Smuzhiyun				<2 RK_PD0 1 &pcfg_pull_up_20ma>;
459*4882a593Smuzhiyun		};
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun		sdio0_clk: sdio0-clk {
462*4882a593Smuzhiyun			rockchip,pins =
463*4882a593Smuzhiyun				<2 RK_PD1 1 &pcfg_pull_none_20ma>;
464*4882a593Smuzhiyun		};
465*4882a593Smuzhiyun	};
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun	pmic {
468*4882a593Smuzhiyun		pmic_int_l: pmic-int-l {
469*4882a593Smuzhiyun			rockchip,pins =
470*4882a593Smuzhiyun				<1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
471*4882a593Smuzhiyun		};
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun		vsel1_pin: vsel1-pin {
474*4882a593Smuzhiyun			rockchip,pins =
475*4882a593Smuzhiyun				<1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
476*4882a593Smuzhiyun		};
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun		vsel2_pin: vsel2-pin {
479*4882a593Smuzhiyun			rockchip,pins =
480*4882a593Smuzhiyun				<1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
481*4882a593Smuzhiyun		};
482*4882a593Smuzhiyun	};
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun	sdio-pwrseq {
485*4882a593Smuzhiyun		wifi_enable_h: wifi-enable-h {
486*4882a593Smuzhiyun			rockchip,pins =
487*4882a593Smuzhiyun				<0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
488*4882a593Smuzhiyun		};
489*4882a593Smuzhiyun	};
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun	wifi {
492*4882a593Smuzhiyun		wifi_host_wake_l: wifi-host-wake-l {
493*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
494*4882a593Smuzhiyun		};
495*4882a593Smuzhiyun	};
496*4882a593Smuzhiyun};
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun&pwm2 {
499*4882a593Smuzhiyun	status = "okay";
500*4882a593Smuzhiyun};
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun&pwm3 {
503*4882a593Smuzhiyun	status = "okay";
504*4882a593Smuzhiyun};
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun&sdio0 {
507*4882a593Smuzhiyun	bus-width = <4>;
508*4882a593Smuzhiyun	clock-frequency = <50000000>;
509*4882a593Smuzhiyun	cap-sdio-irq;
510*4882a593Smuzhiyun	cap-sd-highspeed;
511*4882a593Smuzhiyun	keep-power-in-suspend;
512*4882a593Smuzhiyun	mmc-pwrseq = <&sdio_pwrseq>;
513*4882a593Smuzhiyun	non-removable;
514*4882a593Smuzhiyun	pinctrl-names = "default";
515*4882a593Smuzhiyun	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
516*4882a593Smuzhiyun	sd-uhs-sdr104;
517*4882a593Smuzhiyun	#address-cells = <1>;
518*4882a593Smuzhiyun	#size-cells = <0>;
519*4882a593Smuzhiyun	status = "okay";
520*4882a593Smuzhiyun
521*4882a593Smuzhiyun	brcmf: wifi@1 {
522*4882a593Smuzhiyun		compatible = "brcm,bcm4329-fmac";
523*4882a593Smuzhiyun		reg = <1>;
524*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
525*4882a593Smuzhiyun		interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
526*4882a593Smuzhiyun		interrupt-names = "host-wake";
527*4882a593Smuzhiyun		pinctrl-names = "default";
528*4882a593Smuzhiyun		pinctrl-0 = <&wifi_host_wake_l>;
529*4882a593Smuzhiyun	};
530*4882a593Smuzhiyun};
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun&sdhci {
533*4882a593Smuzhiyun	bus-width = <8>;
534*4882a593Smuzhiyun	mmc-hs400-1_8v;
535*4882a593Smuzhiyun	mmc-hs400-enhanced-strobe;
536*4882a593Smuzhiyun	non-removable;
537*4882a593Smuzhiyun	status = "okay";
538*4882a593Smuzhiyun};
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun&sdmmc {
541*4882a593Smuzhiyun	bus-width = <4>;
542*4882a593Smuzhiyun	cap-mmc-highspeed;
543*4882a593Smuzhiyun	cap-sd-highspeed;
544*4882a593Smuzhiyun	clock-frequency = <100000000>;
545*4882a593Smuzhiyun	max-frequency = <100000000>;
546*4882a593Smuzhiyun	cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
547*4882a593Smuzhiyun	disable-wp;
548*4882a593Smuzhiyun	sd-uhs-sdr104;
549*4882a593Smuzhiyun	vqmmc-supply = <&vcc_sd>;
550*4882a593Smuzhiyun	card-detect-delay = <800>;
551*4882a593Smuzhiyun	pinctrl-names = "default";
552*4882a593Smuzhiyun	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
553*4882a593Smuzhiyun	status = "okay";
554*4882a593Smuzhiyun};
555*4882a593Smuzhiyun
556*4882a593Smuzhiyun&tsadc {
557*4882a593Smuzhiyun	rockchip,hw-tshut-mode = <1>;
558*4882a593Smuzhiyun	rockchip,hw-tshut-polarity = <1>;
559*4882a593Smuzhiyun	rockchip,hw-tshut-temp = <110000>;
560*4882a593Smuzhiyun	status = "okay";
561*4882a593Smuzhiyun};
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun&uart0 {
564*4882a593Smuzhiyun	pinctrl-names = "default";
565*4882a593Smuzhiyun	pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
566*4882a593Smuzhiyun	status = "okay";
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun	bluetooth {
569*4882a593Smuzhiyun		compatible = "brcm,bcm43438-bt";
570*4882a593Smuzhiyun		clocks = <&rk808 1>;
571*4882a593Smuzhiyun		clock-names = "ext_clock";
572*4882a593Smuzhiyun		device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
573*4882a593Smuzhiyun		host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
574*4882a593Smuzhiyun		shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
575*4882a593Smuzhiyun		pinctrl-names = "default";
576*4882a593Smuzhiyun		pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
577*4882a593Smuzhiyun	};
578*4882a593Smuzhiyun};
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun&uart2 {
581*4882a593Smuzhiyun	status = "okay";
582*4882a593Smuzhiyun};
583*4882a593Smuzhiyun
584*4882a593Smuzhiyun&tcphy0 {
585*4882a593Smuzhiyun	status = "okay";
586*4882a593Smuzhiyun};
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun&tcphy1 {
589*4882a593Smuzhiyun	status = "okay";
590*4882a593Smuzhiyun};
591*4882a593Smuzhiyun
592*4882a593Smuzhiyun&u2phy0 {
593*4882a593Smuzhiyun	status = "okay";
594*4882a593Smuzhiyun};
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun&u2phy1 {
597*4882a593Smuzhiyun	status = "okay";
598*4882a593Smuzhiyun};
599*4882a593Smuzhiyun
600*4882a593Smuzhiyun&u2phy0_host {
601*4882a593Smuzhiyun	phy-supply = <&vcc5v0_host>;
602*4882a593Smuzhiyun	status = "okay";
603*4882a593Smuzhiyun};
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun&u2phy1_host {
606*4882a593Smuzhiyun	phy-supply = <&vcc5v0_host>;
607*4882a593Smuzhiyun	status = "okay";
608*4882a593Smuzhiyun};
609*4882a593Smuzhiyun
610*4882a593Smuzhiyun&u2phy0_otg {
611*4882a593Smuzhiyun	status = "okay";
612*4882a593Smuzhiyun};
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun&u2phy1_otg {
615*4882a593Smuzhiyun	status = "okay";
616*4882a593Smuzhiyun};
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun&usb_host0_ehci {
619*4882a593Smuzhiyun	status = "okay";
620*4882a593Smuzhiyun};
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun&usb_host0_ohci {
623*4882a593Smuzhiyun	status = "okay";
624*4882a593Smuzhiyun};
625*4882a593Smuzhiyun
626*4882a593Smuzhiyun&usb_host1_ehci {
627*4882a593Smuzhiyun	status = "okay";
628*4882a593Smuzhiyun};
629*4882a593Smuzhiyun
630*4882a593Smuzhiyun&usb_host1_ohci {
631*4882a593Smuzhiyun	status = "okay";
632*4882a593Smuzhiyun};
633*4882a593Smuzhiyun
634*4882a593Smuzhiyun&usbdrd3_0 {
635*4882a593Smuzhiyun	status = "okay";
636*4882a593Smuzhiyun};
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun&usbdrd_dwc3_0 {
639*4882a593Smuzhiyun	status = "okay";
640*4882a593Smuzhiyun};
641*4882a593Smuzhiyun
642*4882a593Smuzhiyun&usbdrd3_1 {
643*4882a593Smuzhiyun	status = "okay";
644*4882a593Smuzhiyun};
645*4882a593Smuzhiyun
646*4882a593Smuzhiyun&usbdrd_dwc3_1 {
647*4882a593Smuzhiyun	status = "okay";
648*4882a593Smuzhiyun};
649*4882a593Smuzhiyun
650*4882a593Smuzhiyun&vopb {
651*4882a593Smuzhiyun	status = "okay";
652*4882a593Smuzhiyun};
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun&vopb_mmu {
655*4882a593Smuzhiyun	status = "okay";
656*4882a593Smuzhiyun};
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun&vopl {
659*4882a593Smuzhiyun	status = "okay";
660*4882a593Smuzhiyun};
661*4882a593Smuzhiyun
662*4882a593Smuzhiyun&vopl_mmu {
663*4882a593Smuzhiyun	status = "okay";
664*4882a593Smuzhiyun};
665