1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * RK3399-based FriendlyElec boards device tree source 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd. 8*4882a593Smuzhiyun * (http://www.friendlyarm.com) 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * Copyright (c) 2018 Collabora Ltd. 11*4882a593Smuzhiyun * Copyright (c) 2019 Arm Ltd. 12*4882a593Smuzhiyun */ 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun/dts-v1/; 15*4882a593Smuzhiyun#include <dt-bindings/input/linux-event-codes.h> 16*4882a593Smuzhiyun#include "rk3399.dtsi" 17*4882a593Smuzhiyun#include "rk3399-opp.dtsi" 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun/ { 20*4882a593Smuzhiyun chosen { 21*4882a593Smuzhiyun stdout-path = "serial2:1500000n8"; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun clkin_gmac: external-gmac-clock { 25*4882a593Smuzhiyun compatible = "fixed-clock"; 26*4882a593Smuzhiyun clock-frequency = <125000000>; 27*4882a593Smuzhiyun clock-output-names = "clkin_gmac"; 28*4882a593Smuzhiyun #clock-cells = <0>; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun vcc3v3_sys: vcc3v3-sys { 32*4882a593Smuzhiyun compatible = "regulator-fixed"; 33*4882a593Smuzhiyun regulator-always-on; 34*4882a593Smuzhiyun regulator-boot-on; 35*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 36*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 37*4882a593Smuzhiyun regulator-name = "vcc3v3_sys"; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun vcc5v0_sys: vcc5v0-sys { 41*4882a593Smuzhiyun compatible = "regulator-fixed"; 42*4882a593Smuzhiyun regulator-always-on; 43*4882a593Smuzhiyun regulator-boot-on; 44*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 45*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 46*4882a593Smuzhiyun regulator-name = "vcc5v0_sys"; 47*4882a593Smuzhiyun vin-supply = <&vdd_5v>; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun /* switched by pmic_sleep */ 51*4882a593Smuzhiyun vcc1v8_s3: vcc1v8-s3 { 52*4882a593Smuzhiyun compatible = "regulator-fixed"; 53*4882a593Smuzhiyun regulator-always-on; 54*4882a593Smuzhiyun regulator-boot-on; 55*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 56*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 57*4882a593Smuzhiyun regulator-name = "vcc1v8_s3"; 58*4882a593Smuzhiyun vin-supply = <&vcc_1v8>; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun vcc3v0_sd: vcc3v0-sd { 62*4882a593Smuzhiyun compatible = "regulator-fixed"; 63*4882a593Smuzhiyun enable-active-high; 64*4882a593Smuzhiyun gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; 65*4882a593Smuzhiyun pinctrl-names = "default"; 66*4882a593Smuzhiyun pinctrl-0 = <&sdmmc0_pwr_h>; 67*4882a593Smuzhiyun regulator-always-on; 68*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 69*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 70*4882a593Smuzhiyun regulator-name = "vcc3v0_sd"; 71*4882a593Smuzhiyun vin-supply = <&vcc3v3_sys>; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun /* 75*4882a593Smuzhiyun * Really, this is supplied by vcc_1v8, and vcc1v8_s3 only 76*4882a593Smuzhiyun * drives the enable pin, but we can't quite model that. 77*4882a593Smuzhiyun */ 78*4882a593Smuzhiyun vcca0v9_s3: vcca0v9-s3 { 79*4882a593Smuzhiyun compatible = "regulator-fixed"; 80*4882a593Smuzhiyun regulator-min-microvolt = <900000>; 81*4882a593Smuzhiyun regulator-max-microvolt = <900000>; 82*4882a593Smuzhiyun regulator-name = "vcca0v9_s3"; 83*4882a593Smuzhiyun vin-supply = <&vcc1v8_s3>; 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun /* As above, actually supplied by vcc3v3_sys */ 87*4882a593Smuzhiyun vcca1v8_s3: vcca1v8-s3 { 88*4882a593Smuzhiyun compatible = "regulator-fixed"; 89*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 90*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 91*4882a593Smuzhiyun regulator-name = "vcca1v8_s3"; 92*4882a593Smuzhiyun vin-supply = <&vcc1v8_s3>; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun vbus_typec: vbus-typec { 96*4882a593Smuzhiyun compatible = "regulator-fixed"; 97*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 98*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 99*4882a593Smuzhiyun regulator-name = "vbus_typec"; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun gpio-keys { 103*4882a593Smuzhiyun compatible = "gpio-keys"; 104*4882a593Smuzhiyun autorepeat; 105*4882a593Smuzhiyun pinctrl-names = "default"; 106*4882a593Smuzhiyun pinctrl-0 = <&power_key>; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun power { 109*4882a593Smuzhiyun debounce-interval = <100>; 110*4882a593Smuzhiyun gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; 111*4882a593Smuzhiyun label = "GPIO Key Power"; 112*4882a593Smuzhiyun linux,code = <KEY_POWER>; 113*4882a593Smuzhiyun wakeup-source; 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun leds: gpio-leds { 118*4882a593Smuzhiyun compatible = "gpio-leds"; 119*4882a593Smuzhiyun pinctrl-names = "default"; 120*4882a593Smuzhiyun pinctrl-0 = <&status_led_pin>; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun status_led: led-0 { 123*4882a593Smuzhiyun gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; 124*4882a593Smuzhiyun label = "status_led"; 125*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun }; 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 130*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 131*4882a593Smuzhiyun clocks = <&rk808 1>; 132*4882a593Smuzhiyun clock-names = "ext_clock"; 133*4882a593Smuzhiyun pinctrl-names = "default"; 134*4882a593Smuzhiyun pinctrl-0 = <&wifi_reg_on_h>; 135*4882a593Smuzhiyun reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun}; 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun&cpu_b0 { 140*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_b>; 141*4882a593Smuzhiyun}; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun&cpu_b1 { 144*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_b>; 145*4882a593Smuzhiyun}; 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun&cpu_l0 { 148*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_l>; 149*4882a593Smuzhiyun}; 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun&cpu_l1 { 152*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_l>; 153*4882a593Smuzhiyun}; 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun&cpu_l2 { 156*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_l>; 157*4882a593Smuzhiyun}; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun&cpu_l3 { 160*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_l>; 161*4882a593Smuzhiyun}; 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun&emmc_phy { 164*4882a593Smuzhiyun status = "okay"; 165*4882a593Smuzhiyun}; 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun&gmac { 168*4882a593Smuzhiyun assigned-clock-parents = <&clkin_gmac>; 169*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_RMII_SRC>; 170*4882a593Smuzhiyun clock_in_out = "input"; 171*4882a593Smuzhiyun pinctrl-names = "default"; 172*4882a593Smuzhiyun pinctrl-0 = <&rgmii_pins>, <&phy_intb>, <&phy_rstb>; 173*4882a593Smuzhiyun phy-handle = <&rtl8211e>; 174*4882a593Smuzhiyun phy-mode = "rgmii"; 175*4882a593Smuzhiyun phy-supply = <&vcc3v3_s3>; 176*4882a593Smuzhiyun tx_delay = <0x28>; 177*4882a593Smuzhiyun rx_delay = <0x11>; 178*4882a593Smuzhiyun status = "okay"; 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun mdio { 181*4882a593Smuzhiyun compatible = "snps,dwmac-mdio"; 182*4882a593Smuzhiyun #address-cells = <1>; 183*4882a593Smuzhiyun #size-cells = <0>; 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun rtl8211e: ethernet-phy@1 { 186*4882a593Smuzhiyun reg = <1>; 187*4882a593Smuzhiyun interrupt-parent = <&gpio3>; 188*4882a593Smuzhiyun interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>; 189*4882a593Smuzhiyun reset-assert-us = <10000>; 190*4882a593Smuzhiyun reset-deassert-us = <30000>; 191*4882a593Smuzhiyun reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 192*4882a593Smuzhiyun }; 193*4882a593Smuzhiyun }; 194*4882a593Smuzhiyun}; 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun&gpu { 197*4882a593Smuzhiyun mali-supply = <&vdd_gpu>; 198*4882a593Smuzhiyun status = "okay"; 199*4882a593Smuzhiyun}; 200*4882a593Smuzhiyun 201*4882a593Smuzhiyun&hdmi { 202*4882a593Smuzhiyun ddc-i2c-bus = <&i2c7>; 203*4882a593Smuzhiyun pinctrl-names = "default"; 204*4882a593Smuzhiyun pinctrl-0 = <&hdmi_cec>; 205*4882a593Smuzhiyun status = "okay"; 206*4882a593Smuzhiyun}; 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun&hdmi_sound { 209*4882a593Smuzhiyun status = "okay"; 210*4882a593Smuzhiyun}; 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun&i2c0 { 213*4882a593Smuzhiyun clock-frequency = <400000>; 214*4882a593Smuzhiyun i2c-scl-rising-time-ns = <160>; 215*4882a593Smuzhiyun i2c-scl-falling-time-ns = <30>; 216*4882a593Smuzhiyun status = "okay"; 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun vdd_cpu_b: regulator@40 { 219*4882a593Smuzhiyun compatible = "silergy,syr827"; 220*4882a593Smuzhiyun reg = <0x40>; 221*4882a593Smuzhiyun fcs,suspend-voltage-selector = <1>; 222*4882a593Smuzhiyun pinctrl-names = "default"; 223*4882a593Smuzhiyun pinctrl-0 = <&cpu_b_sleep>; 224*4882a593Smuzhiyun regulator-always-on; 225*4882a593Smuzhiyun regulator-boot-on; 226*4882a593Smuzhiyun regulator-min-microvolt = <712500>; 227*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 228*4882a593Smuzhiyun regulator-name = "vdd_cpu_b"; 229*4882a593Smuzhiyun regulator-ramp-delay = <1000>; 230*4882a593Smuzhiyun vin-supply = <&vcc3v3_sys>; 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun regulator-state-mem { 233*4882a593Smuzhiyun regulator-off-in-suspend; 234*4882a593Smuzhiyun }; 235*4882a593Smuzhiyun }; 236*4882a593Smuzhiyun 237*4882a593Smuzhiyun vdd_gpu: regulator@41 { 238*4882a593Smuzhiyun compatible = "silergy,syr828"; 239*4882a593Smuzhiyun reg = <0x41>; 240*4882a593Smuzhiyun fcs,suspend-voltage-selector = <1>; 241*4882a593Smuzhiyun pinctrl-names = "default"; 242*4882a593Smuzhiyun pinctrl-0 = <&gpu_sleep>; 243*4882a593Smuzhiyun regulator-always-on; 244*4882a593Smuzhiyun regulator-boot-on; 245*4882a593Smuzhiyun regulator-min-microvolt = <712500>; 246*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 247*4882a593Smuzhiyun regulator-name = "vdd_gpu"; 248*4882a593Smuzhiyun regulator-ramp-delay = <1000>; 249*4882a593Smuzhiyun vin-supply = <&vcc3v3_sys>; 250*4882a593Smuzhiyun 251*4882a593Smuzhiyun regulator-state-mem { 252*4882a593Smuzhiyun regulator-off-in-suspend; 253*4882a593Smuzhiyun }; 254*4882a593Smuzhiyun }; 255*4882a593Smuzhiyun 256*4882a593Smuzhiyun rk808: pmic@1b { 257*4882a593Smuzhiyun compatible = "rockchip,rk808"; 258*4882a593Smuzhiyun reg = <0x1b>; 259*4882a593Smuzhiyun clock-output-names = "xin32k", "rtc_clko_wifi"; 260*4882a593Smuzhiyun #clock-cells = <1>; 261*4882a593Smuzhiyun interrupt-parent = <&gpio1>; 262*4882a593Smuzhiyun interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 263*4882a593Smuzhiyun pinctrl-names = "default"; 264*4882a593Smuzhiyun pinctrl-0 = <&pmic_int_l>; 265*4882a593Smuzhiyun rockchip,system-power-controller; 266*4882a593Smuzhiyun wakeup-source; 267*4882a593Smuzhiyun 268*4882a593Smuzhiyun vcc1-supply = <&vcc3v3_sys>; 269*4882a593Smuzhiyun vcc2-supply = <&vcc3v3_sys>; 270*4882a593Smuzhiyun vcc3-supply = <&vcc3v3_sys>; 271*4882a593Smuzhiyun vcc4-supply = <&vcc3v3_sys>; 272*4882a593Smuzhiyun vcc6-supply = <&vcc3v3_sys>; 273*4882a593Smuzhiyun vcc7-supply = <&vcc3v3_sys>; 274*4882a593Smuzhiyun vcc8-supply = <&vcc3v3_sys>; 275*4882a593Smuzhiyun vcc9-supply = <&vcc3v3_sys>; 276*4882a593Smuzhiyun vcc10-supply = <&vcc3v3_sys>; 277*4882a593Smuzhiyun vcc11-supply = <&vcc3v3_sys>; 278*4882a593Smuzhiyun vcc12-supply = <&vcc3v3_sys>; 279*4882a593Smuzhiyun vddio-supply = <&vcc_3v0>; 280*4882a593Smuzhiyun 281*4882a593Smuzhiyun regulators { 282*4882a593Smuzhiyun vdd_center: DCDC_REG1 { 283*4882a593Smuzhiyun regulator-always-on; 284*4882a593Smuzhiyun regulator-boot-on; 285*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 286*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 287*4882a593Smuzhiyun regulator-name = "vdd_center"; 288*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 289*4882a593Smuzhiyun 290*4882a593Smuzhiyun regulator-state-mem { 291*4882a593Smuzhiyun regulator-off-in-suspend; 292*4882a593Smuzhiyun }; 293*4882a593Smuzhiyun }; 294*4882a593Smuzhiyun 295*4882a593Smuzhiyun vdd_cpu_l: DCDC_REG2 { 296*4882a593Smuzhiyun regulator-always-on; 297*4882a593Smuzhiyun regulator-boot-on; 298*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 299*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 300*4882a593Smuzhiyun regulator-name = "vdd_cpu_l"; 301*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 302*4882a593Smuzhiyun 303*4882a593Smuzhiyun regulator-state-mem { 304*4882a593Smuzhiyun regulator-off-in-suspend; 305*4882a593Smuzhiyun }; 306*4882a593Smuzhiyun }; 307*4882a593Smuzhiyun 308*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 309*4882a593Smuzhiyun regulator-always-on; 310*4882a593Smuzhiyun regulator-boot-on; 311*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 312*4882a593Smuzhiyun 313*4882a593Smuzhiyun regulator-state-mem { 314*4882a593Smuzhiyun regulator-on-in-suspend; 315*4882a593Smuzhiyun }; 316*4882a593Smuzhiyun }; 317*4882a593Smuzhiyun 318*4882a593Smuzhiyun vcc_1v8: DCDC_REG4 { 319*4882a593Smuzhiyun regulator-always-on; 320*4882a593Smuzhiyun regulator-boot-on; 321*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 322*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 323*4882a593Smuzhiyun regulator-name = "vcc_1v8"; 324*4882a593Smuzhiyun 325*4882a593Smuzhiyun regulator-state-mem { 326*4882a593Smuzhiyun regulator-on-in-suspend; 327*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 328*4882a593Smuzhiyun }; 329*4882a593Smuzhiyun }; 330*4882a593Smuzhiyun 331*4882a593Smuzhiyun vcc1v8_cam: LDO_REG1 { 332*4882a593Smuzhiyun regulator-always-on; 333*4882a593Smuzhiyun regulator-boot-on; 334*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 335*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 336*4882a593Smuzhiyun regulator-name = "vcc1v8_cam"; 337*4882a593Smuzhiyun 338*4882a593Smuzhiyun regulator-state-mem { 339*4882a593Smuzhiyun regulator-off-in-suspend; 340*4882a593Smuzhiyun }; 341*4882a593Smuzhiyun }; 342*4882a593Smuzhiyun 343*4882a593Smuzhiyun vcc3v0_touch: LDO_REG2 { 344*4882a593Smuzhiyun regulator-always-on; 345*4882a593Smuzhiyun regulator-boot-on; 346*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 347*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 348*4882a593Smuzhiyun regulator-name = "vcc3v0_touch"; 349*4882a593Smuzhiyun 350*4882a593Smuzhiyun regulator-state-mem { 351*4882a593Smuzhiyun regulator-off-in-suspend; 352*4882a593Smuzhiyun }; 353*4882a593Smuzhiyun }; 354*4882a593Smuzhiyun 355*4882a593Smuzhiyun vcc1v8_pmupll: LDO_REG3 { 356*4882a593Smuzhiyun regulator-always-on; 357*4882a593Smuzhiyun regulator-boot-on; 358*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 359*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 360*4882a593Smuzhiyun regulator-name = "vcc1v8_pmupll"; 361*4882a593Smuzhiyun 362*4882a593Smuzhiyun regulator-state-mem { 363*4882a593Smuzhiyun regulator-on-in-suspend; 364*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 365*4882a593Smuzhiyun }; 366*4882a593Smuzhiyun }; 367*4882a593Smuzhiyun 368*4882a593Smuzhiyun vcc_sdio: LDO_REG4 { 369*4882a593Smuzhiyun regulator-always-on; 370*4882a593Smuzhiyun regulator-boot-on; 371*4882a593Smuzhiyun regulator-init-microvolt = <3000000>; 372*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 373*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 374*4882a593Smuzhiyun regulator-name = "vcc_sdio"; 375*4882a593Smuzhiyun 376*4882a593Smuzhiyun regulator-state-mem { 377*4882a593Smuzhiyun regulator-on-in-suspend; 378*4882a593Smuzhiyun regulator-suspend-microvolt = <3000000>; 379*4882a593Smuzhiyun }; 380*4882a593Smuzhiyun }; 381*4882a593Smuzhiyun 382*4882a593Smuzhiyun vcca3v0_codec: LDO_REG5 { 383*4882a593Smuzhiyun regulator-always-on; 384*4882a593Smuzhiyun regulator-boot-on; 385*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 386*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 387*4882a593Smuzhiyun regulator-name = "vcca3v0_codec"; 388*4882a593Smuzhiyun 389*4882a593Smuzhiyun regulator-state-mem { 390*4882a593Smuzhiyun regulator-off-in-suspend; 391*4882a593Smuzhiyun }; 392*4882a593Smuzhiyun }; 393*4882a593Smuzhiyun 394*4882a593Smuzhiyun vcc_1v5: LDO_REG6 { 395*4882a593Smuzhiyun regulator-always-on; 396*4882a593Smuzhiyun regulator-boot-on; 397*4882a593Smuzhiyun regulator-min-microvolt = <1500000>; 398*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 399*4882a593Smuzhiyun regulator-name = "vcc_1v5"; 400*4882a593Smuzhiyun 401*4882a593Smuzhiyun regulator-state-mem { 402*4882a593Smuzhiyun regulator-on-in-suspend; 403*4882a593Smuzhiyun regulator-suspend-microvolt = <1500000>; 404*4882a593Smuzhiyun }; 405*4882a593Smuzhiyun }; 406*4882a593Smuzhiyun 407*4882a593Smuzhiyun vcca1v8_codec: LDO_REG7 { 408*4882a593Smuzhiyun regulator-always-on; 409*4882a593Smuzhiyun regulator-boot-on; 410*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 411*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 412*4882a593Smuzhiyun regulator-name = "vcca1v8_codec"; 413*4882a593Smuzhiyun 414*4882a593Smuzhiyun regulator-state-mem { 415*4882a593Smuzhiyun regulator-off-in-suspend; 416*4882a593Smuzhiyun }; 417*4882a593Smuzhiyun }; 418*4882a593Smuzhiyun 419*4882a593Smuzhiyun vcc_3v0: LDO_REG8 { 420*4882a593Smuzhiyun regulator-always-on; 421*4882a593Smuzhiyun regulator-boot-on; 422*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 423*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 424*4882a593Smuzhiyun regulator-name = "vcc_3v0"; 425*4882a593Smuzhiyun 426*4882a593Smuzhiyun regulator-state-mem { 427*4882a593Smuzhiyun regulator-on-in-suspend; 428*4882a593Smuzhiyun regulator-suspend-microvolt = <3000000>; 429*4882a593Smuzhiyun }; 430*4882a593Smuzhiyun }; 431*4882a593Smuzhiyun 432*4882a593Smuzhiyun vcc3v3_s3: SWITCH_REG1 { 433*4882a593Smuzhiyun regulator-always-on; 434*4882a593Smuzhiyun regulator-boot-on; 435*4882a593Smuzhiyun regulator-name = "vcc3v3_s3"; 436*4882a593Smuzhiyun 437*4882a593Smuzhiyun regulator-state-mem { 438*4882a593Smuzhiyun regulator-off-in-suspend; 439*4882a593Smuzhiyun }; 440*4882a593Smuzhiyun }; 441*4882a593Smuzhiyun 442*4882a593Smuzhiyun vcc3v3_s0: SWITCH_REG2 { 443*4882a593Smuzhiyun regulator-always-on; 444*4882a593Smuzhiyun regulator-boot-on; 445*4882a593Smuzhiyun regulator-name = "vcc3v3_s0"; 446*4882a593Smuzhiyun 447*4882a593Smuzhiyun regulator-state-mem { 448*4882a593Smuzhiyun regulator-off-in-suspend; 449*4882a593Smuzhiyun }; 450*4882a593Smuzhiyun }; 451*4882a593Smuzhiyun }; 452*4882a593Smuzhiyun }; 453*4882a593Smuzhiyun}; 454*4882a593Smuzhiyun 455*4882a593Smuzhiyun&i2c1 { 456*4882a593Smuzhiyun clock-frequency = <200000>; 457*4882a593Smuzhiyun i2c-scl-rising-time-ns = <150>; 458*4882a593Smuzhiyun i2c-scl-falling-time-ns = <30>; 459*4882a593Smuzhiyun status = "okay"; 460*4882a593Smuzhiyun}; 461*4882a593Smuzhiyun 462*4882a593Smuzhiyun&i2c2 { 463*4882a593Smuzhiyun status = "okay"; 464*4882a593Smuzhiyun}; 465*4882a593Smuzhiyun 466*4882a593Smuzhiyun&i2c4 { 467*4882a593Smuzhiyun clock-frequency = <400000>; 468*4882a593Smuzhiyun i2c-scl-rising-time-ns = <160>; 469*4882a593Smuzhiyun i2c-scl-falling-time-ns = <30>; 470*4882a593Smuzhiyun status = "okay"; 471*4882a593Smuzhiyun 472*4882a593Smuzhiyun fusb0: typec-portc@22 { 473*4882a593Smuzhiyun compatible = "fcs,fusb302"; 474*4882a593Smuzhiyun reg = <0x22>; 475*4882a593Smuzhiyun interrupt-parent = <&gpio1>; 476*4882a593Smuzhiyun interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>; 477*4882a593Smuzhiyun pinctrl-names = "default"; 478*4882a593Smuzhiyun pinctrl-0 = <&fusb0_int>; 479*4882a593Smuzhiyun vbus-supply = <&vbus_typec>; 480*4882a593Smuzhiyun }; 481*4882a593Smuzhiyun}; 482*4882a593Smuzhiyun 483*4882a593Smuzhiyun&i2c7 { 484*4882a593Smuzhiyun status = "okay"; 485*4882a593Smuzhiyun}; 486*4882a593Smuzhiyun 487*4882a593Smuzhiyun&i2s2 { 488*4882a593Smuzhiyun status = "okay"; 489*4882a593Smuzhiyun}; 490*4882a593Smuzhiyun 491*4882a593Smuzhiyun&io_domains { 492*4882a593Smuzhiyun bt656-supply = <&vcc_1v8>; 493*4882a593Smuzhiyun audio-supply = <&vcca1v8_codec>; 494*4882a593Smuzhiyun sdmmc-supply = <&vcc_sdio>; 495*4882a593Smuzhiyun gpio1830-supply = <&vcc_3v0>; 496*4882a593Smuzhiyun status = "okay"; 497*4882a593Smuzhiyun}; 498*4882a593Smuzhiyun 499*4882a593Smuzhiyun&pcie_phy { 500*4882a593Smuzhiyun assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>; 501*4882a593Smuzhiyun assigned-clock-rates = <100000000>; 502*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_PCIEPHY_REF>; 503*4882a593Smuzhiyun status = "okay"; 504*4882a593Smuzhiyun}; 505*4882a593Smuzhiyun 506*4882a593Smuzhiyun&pcie0 { 507*4882a593Smuzhiyun ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>; 508*4882a593Smuzhiyun max-link-speed = <2>; 509*4882a593Smuzhiyun num-lanes = <2>; 510*4882a593Smuzhiyun vpcie0v9-supply = <&vcca0v9_s3>; 511*4882a593Smuzhiyun vpcie1v8-supply = <&vcca1v8_s3>; 512*4882a593Smuzhiyun status = "okay"; 513*4882a593Smuzhiyun}; 514*4882a593Smuzhiyun 515*4882a593Smuzhiyun&pinctrl { 516*4882a593Smuzhiyun fusb30x { 517*4882a593Smuzhiyun fusb0_int: fusb0-int { 518*4882a593Smuzhiyun rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; 519*4882a593Smuzhiyun }; 520*4882a593Smuzhiyun }; 521*4882a593Smuzhiyun 522*4882a593Smuzhiyun gpio-leds { 523*4882a593Smuzhiyun status_led_pin: status-led-pin { 524*4882a593Smuzhiyun rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; 525*4882a593Smuzhiyun }; 526*4882a593Smuzhiyun }; 527*4882a593Smuzhiyun 528*4882a593Smuzhiyun gmac { 529*4882a593Smuzhiyun phy_intb: phy-intb { 530*4882a593Smuzhiyun rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; 531*4882a593Smuzhiyun }; 532*4882a593Smuzhiyun 533*4882a593Smuzhiyun phy_rstb: phy-rstb { 534*4882a593Smuzhiyun rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 535*4882a593Smuzhiyun }; 536*4882a593Smuzhiyun }; 537*4882a593Smuzhiyun 538*4882a593Smuzhiyun pmic { 539*4882a593Smuzhiyun cpu_b_sleep: cpu-b-sleep { 540*4882a593Smuzhiyun rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; 541*4882a593Smuzhiyun }; 542*4882a593Smuzhiyun 543*4882a593Smuzhiyun gpu_sleep: gpu-sleep { 544*4882a593Smuzhiyun rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; 545*4882a593Smuzhiyun }; 546*4882a593Smuzhiyun 547*4882a593Smuzhiyun pmic_int_l: pmic-int-l { 548*4882a593Smuzhiyun rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; 549*4882a593Smuzhiyun }; 550*4882a593Smuzhiyun }; 551*4882a593Smuzhiyun 552*4882a593Smuzhiyun rockchip-key { 553*4882a593Smuzhiyun power_key: power-key { 554*4882a593Smuzhiyun rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; 555*4882a593Smuzhiyun }; 556*4882a593Smuzhiyun }; 557*4882a593Smuzhiyun 558*4882a593Smuzhiyun sdio { 559*4882a593Smuzhiyun bt_host_wake_l: bt-host-wake-l { 560*4882a593Smuzhiyun rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 561*4882a593Smuzhiyun }; 562*4882a593Smuzhiyun 563*4882a593Smuzhiyun bt_reg_on_h: bt-reg-on-h { 564*4882a593Smuzhiyun /* external pullup to VCC1V8_PMUPLL */ 565*4882a593Smuzhiyun rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 566*4882a593Smuzhiyun }; 567*4882a593Smuzhiyun 568*4882a593Smuzhiyun bt_wake_l: bt-wake-l { 569*4882a593Smuzhiyun rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; 570*4882a593Smuzhiyun }; 571*4882a593Smuzhiyun 572*4882a593Smuzhiyun wifi_reg_on_h: wifi-reg_on-h { 573*4882a593Smuzhiyun rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 574*4882a593Smuzhiyun }; 575*4882a593Smuzhiyun }; 576*4882a593Smuzhiyun 577*4882a593Smuzhiyun sdmmc { 578*4882a593Smuzhiyun sdmmc0_det_l: sdmmc0-det-l { 579*4882a593Smuzhiyun rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; 580*4882a593Smuzhiyun }; 581*4882a593Smuzhiyun 582*4882a593Smuzhiyun sdmmc0_pwr_h: sdmmc0-pwr-h { 583*4882a593Smuzhiyun rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; 584*4882a593Smuzhiyun }; 585*4882a593Smuzhiyun }; 586*4882a593Smuzhiyun}; 587*4882a593Smuzhiyun 588*4882a593Smuzhiyun&pmu_io_domains { 589*4882a593Smuzhiyun pmu1830-supply = <&vcc_3v0>; 590*4882a593Smuzhiyun status = "okay"; 591*4882a593Smuzhiyun}; 592*4882a593Smuzhiyun 593*4882a593Smuzhiyun&pwm0 { 594*4882a593Smuzhiyun status = "okay"; 595*4882a593Smuzhiyun}; 596*4882a593Smuzhiyun 597*4882a593Smuzhiyun&pwm1 { 598*4882a593Smuzhiyun status = "okay"; 599*4882a593Smuzhiyun}; 600*4882a593Smuzhiyun 601*4882a593Smuzhiyun&pwm2 { 602*4882a593Smuzhiyun pinctrl-names = "active"; 603*4882a593Smuzhiyun pinctrl-0 = <&pwm2_pin_pull_down>; 604*4882a593Smuzhiyun status = "okay"; 605*4882a593Smuzhiyun}; 606*4882a593Smuzhiyun 607*4882a593Smuzhiyun&saradc { 608*4882a593Smuzhiyun vref-supply = <&vcca1v8_s3>; 609*4882a593Smuzhiyun status = "okay"; 610*4882a593Smuzhiyun}; 611*4882a593Smuzhiyun 612*4882a593Smuzhiyun&sdhci { 613*4882a593Smuzhiyun bus-width = <8>; 614*4882a593Smuzhiyun mmc-hs200-1_8v; 615*4882a593Smuzhiyun non-removable; 616*4882a593Smuzhiyun status = "okay"; 617*4882a593Smuzhiyun}; 618*4882a593Smuzhiyun 619*4882a593Smuzhiyun&sdio0 { 620*4882a593Smuzhiyun bus-width = <4>; 621*4882a593Smuzhiyun cap-sd-highspeed; 622*4882a593Smuzhiyun cap-sdio-irq; 623*4882a593Smuzhiyun keep-power-in-suspend; 624*4882a593Smuzhiyun mmc-pwrseq = <&sdio_pwrseq>; 625*4882a593Smuzhiyun non-removable; 626*4882a593Smuzhiyun pinctrl-names = "default"; 627*4882a593Smuzhiyun pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; 628*4882a593Smuzhiyun sd-uhs-sdr104; 629*4882a593Smuzhiyun status = "okay"; 630*4882a593Smuzhiyun}; 631*4882a593Smuzhiyun 632*4882a593Smuzhiyun&sdmmc { 633*4882a593Smuzhiyun bus-width = <4>; 634*4882a593Smuzhiyun cap-sd-highspeed; 635*4882a593Smuzhiyun cap-mmc-highspeed; 636*4882a593Smuzhiyun cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; 637*4882a593Smuzhiyun disable-wp; 638*4882a593Smuzhiyun pinctrl-names = "default"; 639*4882a593Smuzhiyun pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc0_det_l>; 640*4882a593Smuzhiyun sd-uhs-sdr104; 641*4882a593Smuzhiyun vmmc-supply = <&vcc3v0_sd>; 642*4882a593Smuzhiyun vqmmc-supply = <&vcc_sdio>; 643*4882a593Smuzhiyun status = "okay"; 644*4882a593Smuzhiyun}; 645*4882a593Smuzhiyun 646*4882a593Smuzhiyun&tcphy0 { 647*4882a593Smuzhiyun status = "okay"; 648*4882a593Smuzhiyun}; 649*4882a593Smuzhiyun 650*4882a593Smuzhiyun&tcphy1 { 651*4882a593Smuzhiyun status = "okay"; 652*4882a593Smuzhiyun}; 653*4882a593Smuzhiyun 654*4882a593Smuzhiyun&tsadc { 655*4882a593Smuzhiyun /* tshut mode 0:CRU 1:GPIO */ 656*4882a593Smuzhiyun rockchip,hw-tshut-mode = <1>; 657*4882a593Smuzhiyun /* tshut polarity 0:LOW 1:HIGH */ 658*4882a593Smuzhiyun rockchip,hw-tshut-polarity = <1>; 659*4882a593Smuzhiyun status = "okay"; 660*4882a593Smuzhiyun}; 661*4882a593Smuzhiyun 662*4882a593Smuzhiyun&u2phy0 { 663*4882a593Smuzhiyun status = "okay"; 664*4882a593Smuzhiyun}; 665*4882a593Smuzhiyun 666*4882a593Smuzhiyun&u2phy0_host { 667*4882a593Smuzhiyun status = "okay"; 668*4882a593Smuzhiyun}; 669*4882a593Smuzhiyun 670*4882a593Smuzhiyun&u2phy0_otg { 671*4882a593Smuzhiyun status = "okay"; 672*4882a593Smuzhiyun}; 673*4882a593Smuzhiyun 674*4882a593Smuzhiyun&u2phy1 { 675*4882a593Smuzhiyun status = "okay"; 676*4882a593Smuzhiyun}; 677*4882a593Smuzhiyun 678*4882a593Smuzhiyun&u2phy1_host { 679*4882a593Smuzhiyun status = "okay"; 680*4882a593Smuzhiyun}; 681*4882a593Smuzhiyun 682*4882a593Smuzhiyun&u2phy1_otg { 683*4882a593Smuzhiyun status = "okay"; 684*4882a593Smuzhiyun}; 685*4882a593Smuzhiyun 686*4882a593Smuzhiyun&uart0 { 687*4882a593Smuzhiyun pinctrl-names = "default"; 688*4882a593Smuzhiyun pinctrl-0 = <&uart0_xfer &uart0_rts &uart0_cts>; 689*4882a593Smuzhiyun status = "okay"; 690*4882a593Smuzhiyun 691*4882a593Smuzhiyun bluetooth { 692*4882a593Smuzhiyun compatible = "brcm,bcm43438-bt"; 693*4882a593Smuzhiyun clocks = <&rk808 1>; 694*4882a593Smuzhiyun clock-names = "lpo"; 695*4882a593Smuzhiyun device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; 696*4882a593Smuzhiyun host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; 697*4882a593Smuzhiyun shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; 698*4882a593Smuzhiyun max-speed = <4000000>; 699*4882a593Smuzhiyun pinctrl-names = "default"; 700*4882a593Smuzhiyun pinctrl-0 = <&bt_reg_on_h &bt_host_wake_l &bt_wake_l>; 701*4882a593Smuzhiyun vbat-supply = <&vcc3v3_sys>; 702*4882a593Smuzhiyun vddio-supply = <&vcc_1v8>; 703*4882a593Smuzhiyun }; 704*4882a593Smuzhiyun}; 705*4882a593Smuzhiyun 706*4882a593Smuzhiyun&uart2 { 707*4882a593Smuzhiyun status = "okay"; 708*4882a593Smuzhiyun}; 709*4882a593Smuzhiyun 710*4882a593Smuzhiyun&usbdrd3_0 { 711*4882a593Smuzhiyun status = "okay"; 712*4882a593Smuzhiyun}; 713*4882a593Smuzhiyun 714*4882a593Smuzhiyun&usbdrd3_1 { 715*4882a593Smuzhiyun status = "okay"; 716*4882a593Smuzhiyun}; 717*4882a593Smuzhiyun 718*4882a593Smuzhiyun&usbdrd_dwc3_0 { 719*4882a593Smuzhiyun status = "okay"; 720*4882a593Smuzhiyun}; 721*4882a593Smuzhiyun 722*4882a593Smuzhiyun&usbdrd_dwc3_1 { 723*4882a593Smuzhiyun dr_mode = "host"; 724*4882a593Smuzhiyun status = "okay"; 725*4882a593Smuzhiyun}; 726*4882a593Smuzhiyun 727*4882a593Smuzhiyun&usb_host0_ehci { 728*4882a593Smuzhiyun status = "okay"; 729*4882a593Smuzhiyun}; 730*4882a593Smuzhiyun 731*4882a593Smuzhiyun&usb_host0_ohci { 732*4882a593Smuzhiyun status = "okay"; 733*4882a593Smuzhiyun}; 734*4882a593Smuzhiyun 735*4882a593Smuzhiyun&usb_host1_ehci { 736*4882a593Smuzhiyun status = "okay"; 737*4882a593Smuzhiyun}; 738*4882a593Smuzhiyun 739*4882a593Smuzhiyun&usb_host1_ohci { 740*4882a593Smuzhiyun status = "okay"; 741*4882a593Smuzhiyun}; 742*4882a593Smuzhiyun 743*4882a593Smuzhiyun&vopb { 744*4882a593Smuzhiyun status = "okay"; 745*4882a593Smuzhiyun}; 746*4882a593Smuzhiyun 747*4882a593Smuzhiyun&vopb_mmu { 748*4882a593Smuzhiyun status = "okay"; 749*4882a593Smuzhiyun}; 750*4882a593Smuzhiyun 751*4882a593Smuzhiyun&vopl { 752*4882a593Smuzhiyun status = "okay"; 753*4882a593Smuzhiyun}; 754*4882a593Smuzhiyun 755*4882a593Smuzhiyun&vopl_mmu { 756*4882a593Smuzhiyun status = "okay"; 757*4882a593Smuzhiyun}; 758