1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2018 Collabora Ltd. 4*4882a593Smuzhiyun * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Schematics available at https://dl.vamrs.com/products/ficus/docs/hw 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/dts-v1/; 10*4882a593Smuzhiyun#include "rk3399-rock960.dtsi" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun model = "96boards RK3399 Ficus"; 14*4882a593Smuzhiyun compatible = "vamrs,ficus", "rockchip,rk3399"; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun chosen { 17*4882a593Smuzhiyun stdout-path = "serial2:1500000n8"; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun clkin_gmac: external-gmac-clock { 21*4882a593Smuzhiyun compatible = "fixed-clock"; 22*4882a593Smuzhiyun clock-frequency = <125000000>; 23*4882a593Smuzhiyun clock-output-names = "clkin_gmac"; 24*4882a593Smuzhiyun #clock-cells = <0>; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun leds { 28*4882a593Smuzhiyun compatible = "gpio-leds"; 29*4882a593Smuzhiyun pinctrl-names = "default"; 30*4882a593Smuzhiyun pinctrl-0 = <&user_led1_pin>, <&user_led2_pin>, 31*4882a593Smuzhiyun <&user_led3_pin>, <&user_led4_pin>, 32*4882a593Smuzhiyun <&wlan_led_pin>, <&bt_led_pin>; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun user_led1: led-1 { 35*4882a593Smuzhiyun label = "red:user1"; 36*4882a593Smuzhiyun gpios = <&gpio4 25 0>; 37*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun user_led2: led-2 { 41*4882a593Smuzhiyun label = "red:user2"; 42*4882a593Smuzhiyun gpios = <&gpio4 26 0>; 43*4882a593Smuzhiyun linux,default-trigger = "mmc0"; 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun user_led3: led-3 { 47*4882a593Smuzhiyun label = "red:user3"; 48*4882a593Smuzhiyun gpios = <&gpio4 30 0>; 49*4882a593Smuzhiyun linux,default-trigger = "mmc1"; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun user_led4: led-4 { 53*4882a593Smuzhiyun label = "red:user4"; 54*4882a593Smuzhiyun gpios = <&gpio1 0 0>; 55*4882a593Smuzhiyun panic-indicator; 56*4882a593Smuzhiyun linux,default-trigger = "none"; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun wlan_active_led: led-5 { 60*4882a593Smuzhiyun label = "red:wlan"; 61*4882a593Smuzhiyun gpios = <&gpio1 1 0>; 62*4882a593Smuzhiyun linux,default-trigger = "phy0tx"; 63*4882a593Smuzhiyun default-state = "off"; 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun bt_active_led: led-6 { 67*4882a593Smuzhiyun label = "red:bt"; 68*4882a593Smuzhiyun gpios = <&gpio1 4 0>; 69*4882a593Smuzhiyun linux,default-trigger = "hci0-power"; 70*4882a593Smuzhiyun default-state = "off"; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun}; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun&gmac { 76*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_RMII_SRC>; 77*4882a593Smuzhiyun assigned-clock-parents = <&clkin_gmac>; 78*4882a593Smuzhiyun clock_in_out = "input"; 79*4882a593Smuzhiyun phy-supply = <&vcc3v3_sys>; 80*4882a593Smuzhiyun phy-mode = "rgmii"; 81*4882a593Smuzhiyun pinctrl-names = "default"; 82*4882a593Smuzhiyun pinctrl-0 = <&rgmii_pins>; 83*4882a593Smuzhiyun snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 84*4882a593Smuzhiyun snps,reset-active-low; 85*4882a593Smuzhiyun snps,reset-delays-us = <0 10000 50000>; 86*4882a593Smuzhiyun tx_delay = <0x28>; 87*4882a593Smuzhiyun rx_delay = <0x11>; 88*4882a593Smuzhiyun status = "okay"; 89*4882a593Smuzhiyun}; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun&pcie0 { 92*4882a593Smuzhiyun ep-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_HIGH>; 93*4882a593Smuzhiyun}; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun&pinctrl { 96*4882a593Smuzhiyun gmac { 97*4882a593Smuzhiyun rgmii_sleep_pins: rgmii-sleep-pins { 98*4882a593Smuzhiyun rockchip,pins = 99*4882a593Smuzhiyun <3 RK_PB7 RK_FUNC_GPIO &pcfg_output_low>; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun }; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun pcie { 104*4882a593Smuzhiyun pcie_drv: pcie-drv { 105*4882a593Smuzhiyun rockchip,pins = 106*4882a593Smuzhiyun <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; 107*4882a593Smuzhiyun }; 108*4882a593Smuzhiyun }; 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun usb2 { 111*4882a593Smuzhiyun host_vbus_drv: host-vbus-drv { 112*4882a593Smuzhiyun rockchip,pins = 113*4882a593Smuzhiyun <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun leds { 118*4882a593Smuzhiyun user_led1_pin: user-led1-pin { 119*4882a593Smuzhiyun rockchip,pins = 120*4882a593Smuzhiyun <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun user_led2_pin: user-led2-pin { 124*4882a593Smuzhiyun rockchip,pins = 125*4882a593Smuzhiyun <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun user_led3_pin: user-led3-pin { 129*4882a593Smuzhiyun rockchip,pins = 130*4882a593Smuzhiyun <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; 131*4882a593Smuzhiyun }; 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun user_led4_pin: user-led4-pin { 134*4882a593Smuzhiyun rockchip,pins = 135*4882a593Smuzhiyun <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun wlan_led_pin: wlan-led-pin { 139*4882a593Smuzhiyun rockchip,pins = 140*4882a593Smuzhiyun <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; 141*4882a593Smuzhiyun }; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun bt_led_pin: bt-led-pin { 144*4882a593Smuzhiyun rockchip,pins = 145*4882a593Smuzhiyun <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 146*4882a593Smuzhiyun }; 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun}; 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun&spi1 { 151*4882a593Smuzhiyun /* On both Low speed and High speed expansion */ 152*4882a593Smuzhiyun cs-gpios = <0>, <&gpio4 RK_PA6 0>, <&gpio4 RK_PA7 0>; 153*4882a593Smuzhiyun status = "okay"; 154*4882a593Smuzhiyun}; 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun&usbdrd_dwc3_0 { 157*4882a593Smuzhiyun dr_mode = "host"; 158*4882a593Smuzhiyun}; 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun&usbdrd_dwc3_1 { 161*4882a593Smuzhiyun dr_mode = "host"; 162*4882a593Smuzhiyun}; 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun&vcc3v3_pcie { 165*4882a593Smuzhiyun gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>; 166*4882a593Smuzhiyun}; 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun&vcc5v0_host { 169*4882a593Smuzhiyun gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>; 170*4882a593Smuzhiyun}; 171