xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm64/rockchip/rk3399-evb.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
8*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h>
9*4882a593Smuzhiyun#include "rk3399.dtsi"
10*4882a593Smuzhiyun#include "rk3399-opp.dtsi"
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun	adc_keys: adc-keys {
16*4882a593Smuzhiyun		compatible = "adc-keys";
17*4882a593Smuzhiyun		io-channels = <&saradc 1>;
18*4882a593Smuzhiyun		io-channel-names = "buttons";
19*4882a593Smuzhiyun		keyup-threshold-microvolt = <1800000>;
20*4882a593Smuzhiyun		poll-interval = <100>;
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun		vol-up-key {
23*4882a593Smuzhiyun			label = "volume up";
24*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEUP>;
25*4882a593Smuzhiyun			press-threshold-microvolt = <1750>;
26*4882a593Smuzhiyun		};
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun		vol-down-key {
29*4882a593Smuzhiyun			label = "volume down";
30*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEDOWN>;
31*4882a593Smuzhiyun			press-threshold-microvolt = <297500>;
32*4882a593Smuzhiyun		};
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun		menu-key {
35*4882a593Smuzhiyun			label = "menu";
36*4882a593Smuzhiyun			linux,code = <KEY_MENU>;
37*4882a593Smuzhiyun			press-threshold-microvolt = <1305500>;
38*4882a593Smuzhiyun		};
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun		home-key {
41*4882a593Smuzhiyun			label = "home";
42*4882a593Smuzhiyun			linux,code = <KEY_HOME>;
43*4882a593Smuzhiyun			press-threshold-microvolt = <621250>;
44*4882a593Smuzhiyun		};
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun		back-key {
47*4882a593Smuzhiyun			label = "back";
48*4882a593Smuzhiyun			linux,code = <KEY_BACK>;
49*4882a593Smuzhiyun			press-threshold-microvolt = <980000>;
50*4882a593Smuzhiyun		};
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun		camera-key {
53*4882a593Smuzhiyun			label = "camera";
54*4882a593Smuzhiyun			linux,code = <KEY_CAMERA>;
55*4882a593Smuzhiyun			press-threshold-microvolt = <787500>;
56*4882a593Smuzhiyun		};
57*4882a593Smuzhiyun	};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun	vcc3v3_sys: vcc3v3-sys {
60*4882a593Smuzhiyun		compatible = "regulator-fixed";
61*4882a593Smuzhiyun		regulator-name = "vcc3v3_sys";
62*4882a593Smuzhiyun		regulator-always-on;
63*4882a593Smuzhiyun		regulator-boot-on;
64*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
65*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
66*4882a593Smuzhiyun	};
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun	vcc5v0_host: vcc5v0-host-regulator {
69*4882a593Smuzhiyun		compatible = "regulator-fixed";
70*4882a593Smuzhiyun		enable-active-high;
71*4882a593Smuzhiyun		gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
72*4882a593Smuzhiyun		pinctrl-names = "default";
73*4882a593Smuzhiyun		pinctrl-0 = <&host_vbus_drv>;
74*4882a593Smuzhiyun		regulator-name = "vcc5v0_host";
75*4882a593Smuzhiyun		regulator-always-on;
76*4882a593Smuzhiyun	};
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun	backlight: backlight {
79*4882a593Smuzhiyun		compatible = "pwm-backlight";
80*4882a593Smuzhiyun		pwms = <&pwm0 0 25000 0>;
81*4882a593Smuzhiyun		brightness-levels = <
82*4882a593Smuzhiyun			  0   1   2   3   4   5   6   7
83*4882a593Smuzhiyun			  8   9  10  11  12  13  14  15
84*4882a593Smuzhiyun			 16  17  18  19  20  21  22  23
85*4882a593Smuzhiyun			 24  25  26  27  28  29  30  31
86*4882a593Smuzhiyun			 32  33  34  35  36  37  38  39
87*4882a593Smuzhiyun			 40  41  42  43  44  45  46  47
88*4882a593Smuzhiyun			 48  49  50  51  52  53  54  55
89*4882a593Smuzhiyun			 56  57  58  59  60  61  62  63
90*4882a593Smuzhiyun			 64  65  66  67  68  69  70  71
91*4882a593Smuzhiyun			 72  73  74  75  76  77  78  79
92*4882a593Smuzhiyun			 80  81  82  83  84  85  86  87
93*4882a593Smuzhiyun			 88  89  90  91  92  93  94  95
94*4882a593Smuzhiyun			 96  97  98  99 100 101 102 103
95*4882a593Smuzhiyun			104 105 106 107 108 109 110 111
96*4882a593Smuzhiyun			112 113 114 115 116 117 118 119
97*4882a593Smuzhiyun			120 121 122 123 124 125 126 127
98*4882a593Smuzhiyun			128 129 130 131 132 133 134 135
99*4882a593Smuzhiyun			136 137 138 139 140 141 142 143
100*4882a593Smuzhiyun			144 145 146 147 148 149 150 151
101*4882a593Smuzhiyun			152 153 154 155 156 157 158 159
102*4882a593Smuzhiyun			160 161 162 163 164 165 166 167
103*4882a593Smuzhiyun			168 169 170 171 172 173 174 175
104*4882a593Smuzhiyun			176 177 178 179 180 181 182 183
105*4882a593Smuzhiyun			184 185 186 187 188 189 190 191
106*4882a593Smuzhiyun			192 193 194 195 196 197 198 199
107*4882a593Smuzhiyun			200 201 202 203 204 205 206 207
108*4882a593Smuzhiyun			208 209 210 211 212 213 214 215
109*4882a593Smuzhiyun			216 217 218 219 220 221 222 223
110*4882a593Smuzhiyun			224 225 226 227 228 229 230 231
111*4882a593Smuzhiyun			232 233 234 235 236 237 238 239
112*4882a593Smuzhiyun			240 241 242 243 244 245 246 247
113*4882a593Smuzhiyun			248 249 250 251 252 253 254 255>;
114*4882a593Smuzhiyun		default-brightness-level = <200>;
115*4882a593Smuzhiyun	};
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun	clkin_gmac: external-gmac-clock {
118*4882a593Smuzhiyun		compatible = "fixed-clock";
119*4882a593Smuzhiyun		clock-frequency = <125000000>;
120*4882a593Smuzhiyun		clock-output-names = "clkin_gmac";
121*4882a593Smuzhiyun		#clock-cells = <0>;
122*4882a593Smuzhiyun	};
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun	vcc_phy: vcc-phy-regulator {
125*4882a593Smuzhiyun		compatible = "regulator-fixed";
126*4882a593Smuzhiyun		regulator-name = "vcc_phy";
127*4882a593Smuzhiyun		regulator-always-on;
128*4882a593Smuzhiyun		regulator-boot-on;
129*4882a593Smuzhiyun	};
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun	es8316-sound {
132*4882a593Smuzhiyun		compatible = "simple-audio-card";
133*4882a593Smuzhiyun		simple-audio-card,format = "i2s";
134*4882a593Smuzhiyun		simple-audio-card,name = "rockchip,es8316-codec";
135*4882a593Smuzhiyun		simple-audio-card,mclk-fs = <256>;
136*4882a593Smuzhiyun		simple-audio-card,widgets =
137*4882a593Smuzhiyun			"Microphone", "Mic Jack",
138*4882a593Smuzhiyun			"Headphone", "Headphone Jack";
139*4882a593Smuzhiyun		simple-audio-card,routing =
140*4882a593Smuzhiyun			"Mic Jack", "MICBIAS1",
141*4882a593Smuzhiyun			"IN1P", "Mic Jack",
142*4882a593Smuzhiyun			"Headphone Jack", "HPOL",
143*4882a593Smuzhiyun			"Headphone Jack", "HPOR";
144*4882a593Smuzhiyun		simple-audio-card,cpu {
145*4882a593Smuzhiyun			sound-dai = <&i2s0>;
146*4882a593Smuzhiyun		};
147*4882a593Smuzhiyun		simple-audio-card,codec {
148*4882a593Smuzhiyun			sound-dai = <&es8316>;
149*4882a593Smuzhiyun		};
150*4882a593Smuzhiyun	};
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun	hdmi_sound: hdmi-sound {
153*4882a593Smuzhiyun		status = "disabled";
154*4882a593Smuzhiyun		compatible = "simple-audio-card";
155*4882a593Smuzhiyun		simple-audio-card,format = "i2s";
156*4882a593Smuzhiyun		simple-audio-card,mclk-fs = <256>;
157*4882a593Smuzhiyun		simple-audio-card,name = "rockchip,hdmi";
158*4882a593Smuzhiyun		simple-audio-card,cpu {
159*4882a593Smuzhiyun			sound-dai = <&i2s2>;
160*4882a593Smuzhiyun		};
161*4882a593Smuzhiyun		simple-audio-card,codec {
162*4882a593Smuzhiyun			sound-dai = <&dw_hdmi_audio>;
163*4882a593Smuzhiyun		};
164*4882a593Smuzhiyun	};
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun	dw_hdmi_audio: dw-hdmi-audio {
167*4882a593Smuzhiyun		status = "disabled";
168*4882a593Smuzhiyun		compatible = "rockchip,dw-hdmi-audio";
169*4882a593Smuzhiyun		#sound-dai-cells = <0>;
170*4882a593Smuzhiyun	};
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun	spdif_sound: spdif-sound {
173*4882a593Smuzhiyun		status = "disabled";
174*4882a593Smuzhiyun		compatible = "simple-audio-card";
175*4882a593Smuzhiyun		simple-audio-card,name = "ROCKCHIP,SPDIF";
176*4882a593Smuzhiyun		simple-audio-card,mclk-fs = <128>;
177*4882a593Smuzhiyun		simple-audio-card,cpu {
178*4882a593Smuzhiyun			sound-dai = <&spdif>;
179*4882a593Smuzhiyun		};
180*4882a593Smuzhiyun		simple-audio-card,codec {
181*4882a593Smuzhiyun			sound-dai = <&spdif_out>;
182*4882a593Smuzhiyun		};
183*4882a593Smuzhiyun	};
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun	spdif_out: spdif-out {
186*4882a593Smuzhiyun		status = "disabled";
187*4882a593Smuzhiyun		compatible = "linux,spdif-dit";
188*4882a593Smuzhiyun		#sound-dai-cells = <0>;
189*4882a593Smuzhiyun	};
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun	sdio_pwrseq: sdio-pwrseq {
192*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
193*4882a593Smuzhiyun		clocks = <&rk808 1>;
194*4882a593Smuzhiyun		clock-names = "ext_clock";
195*4882a593Smuzhiyun		pinctrl-names = "default";
196*4882a593Smuzhiyun		pinctrl-0 = <&wifi_enable_h>;
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun		/*
199*4882a593Smuzhiyun		 * On the module itself this is one of these (depending
200*4882a593Smuzhiyun		 * on the actual card populated):
201*4882a593Smuzhiyun		 * - SDIO_RESET_L_WL_REG_ON
202*4882a593Smuzhiyun		 * - PDN (power down when low)
203*4882a593Smuzhiyun		 */
204*4882a593Smuzhiyun		reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
205*4882a593Smuzhiyun	};
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun	wireless-wlan {
208*4882a593Smuzhiyun		compatible = "wlan-platdata";
209*4882a593Smuzhiyun		rockchip,grf = <&grf>;
210*4882a593Smuzhiyun		wifi_chip_type = "ap6354";
211*4882a593Smuzhiyun		sdio_vref = <1800>;
212*4882a593Smuzhiyun		WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
213*4882a593Smuzhiyun		WIFI,poweren_gpio = <&gpio0 10 GPIO_ACTIVE_HIGH>;
214*4882a593Smuzhiyun		status = "okay";
215*4882a593Smuzhiyun	};
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun	wireless-bluetooth {
218*4882a593Smuzhiyun		compatible = "bluetooth-platdata";
219*4882a593Smuzhiyun		clocks = <&rk808 1>;
220*4882a593Smuzhiyun		clock-names = "ext_clock";
221*4882a593Smuzhiyun		//wifi-bt-power-toggle;
222*4882a593Smuzhiyun		uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
223*4882a593Smuzhiyun		pinctrl-names = "default", "rts_gpio";
224*4882a593Smuzhiyun		pinctrl-0 = <&uart0_rts>;
225*4882a593Smuzhiyun		pinctrl-1 = <&uart0_gpios>;
226*4882a593Smuzhiyun		//BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
227*4882a593Smuzhiyun		BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
228*4882a593Smuzhiyun		BT,wake_gpio     = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
229*4882a593Smuzhiyun		BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
230*4882a593Smuzhiyun		status = "okay";
231*4882a593Smuzhiyun	};
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun	test-power {
234*4882a593Smuzhiyun		status = "okay";
235*4882a593Smuzhiyun	};
236*4882a593Smuzhiyun};
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun&cpu_l0 {
239*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_l>;
240*4882a593Smuzhiyun};
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun&cpu_l1 {
243*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_l>;
244*4882a593Smuzhiyun};
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun&cpu_l2 {
247*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_l>;
248*4882a593Smuzhiyun};
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun&cpu_l3 {
251*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_l>;
252*4882a593Smuzhiyun};
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun&cpu_b0 {
255*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_b>;
256*4882a593Smuzhiyun};
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun&cpu_b1 {
259*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_b>;
260*4882a593Smuzhiyun};
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun&gpu {
263*4882a593Smuzhiyun	status = "okay";
264*4882a593Smuzhiyun	mali-supply = <&vdd_gpu>;
265*4882a593Smuzhiyun};
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun&sdmmc {
268*4882a593Smuzhiyun	clock-frequency = <150000000>;
269*4882a593Smuzhiyun	clock-freq-min-max = <400000 150000000>;
270*4882a593Smuzhiyun	no-sdio;
271*4882a593Smuzhiyun	no-mmc;
272*4882a593Smuzhiyun	bus-width = <4>;
273*4882a593Smuzhiyun	cap-mmc-highspeed;
274*4882a593Smuzhiyun	cap-sd-highspeed;
275*4882a593Smuzhiyun	disable-wp;
276*4882a593Smuzhiyun	num-slots = <1>;
277*4882a593Smuzhiyun	//sd-uhs-sdr104;
278*4882a593Smuzhiyun	vqmmc-supply = <&vcc_sd>;
279*4882a593Smuzhiyun	pinctrl-names = "default";
280*4882a593Smuzhiyun	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
281*4882a593Smuzhiyun	status = "okay";
282*4882a593Smuzhiyun};
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun&sdio0 {
285*4882a593Smuzhiyun	clock-frequency = <150000000>;
286*4882a593Smuzhiyun	clock-freq-min-max = <200000 150000000>;
287*4882a593Smuzhiyun	no-sd;
288*4882a593Smuzhiyun	no-mmc;
289*4882a593Smuzhiyun	bus-width = <4>;
290*4882a593Smuzhiyun	disable-wp;
291*4882a593Smuzhiyun	cap-sd-highspeed;
292*4882a593Smuzhiyun	cap-sdio-irq;
293*4882a593Smuzhiyun	keep-power-in-suspend;
294*4882a593Smuzhiyun	mmc-pwrseq = <&sdio_pwrseq>;
295*4882a593Smuzhiyun	non-removable;
296*4882a593Smuzhiyun	num-slots = <1>;
297*4882a593Smuzhiyun	pinctrl-names = "default";
298*4882a593Smuzhiyun	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
299*4882a593Smuzhiyun	sd-uhs-sdr104;
300*4882a593Smuzhiyun	status = "okay";
301*4882a593Smuzhiyun};
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun&emmc_phy {
304*4882a593Smuzhiyun	status = "okay";
305*4882a593Smuzhiyun};
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun&dfi {
308*4882a593Smuzhiyun	status = "okay";
309*4882a593Smuzhiyun};
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun&dmc {
312*4882a593Smuzhiyun	status = "okay";
313*4882a593Smuzhiyun	center-supply = <&vdd_center>;
314*4882a593Smuzhiyun	upthreshold = <40>;
315*4882a593Smuzhiyun	downdifferential = <20>;
316*4882a593Smuzhiyun	system-status-freq = <
317*4882a593Smuzhiyun		/*system status         freq(KHz)*/
318*4882a593Smuzhiyun		SYS_STATUS_NORMAL       800000
319*4882a593Smuzhiyun		SYS_STATUS_REBOOT       528000
320*4882a593Smuzhiyun		SYS_STATUS_SUSPEND      200000
321*4882a593Smuzhiyun		SYS_STATUS_VIDEO_1080P  200000
322*4882a593Smuzhiyun		SYS_STATUS_VIDEO_4K     600000
323*4882a593Smuzhiyun		SYS_STATUS_VIDEO_4K_10B 800000
324*4882a593Smuzhiyun		SYS_STATUS_PERFORMANCE  800000
325*4882a593Smuzhiyun		SYS_STATUS_BOOST        400000
326*4882a593Smuzhiyun		SYS_STATUS_DUALVIEW     600000
327*4882a593Smuzhiyun		SYS_STATUS_ISP          600000
328*4882a593Smuzhiyun	>;
329*4882a593Smuzhiyun	vop-bw-dmc-freq = <
330*4882a593Smuzhiyun	/* min_bw(MB/s) max_bw(MB/s) freq(KHz) */
331*4882a593Smuzhiyun		0       577      200000
332*4882a593Smuzhiyun		578     1701     300000
333*4882a593Smuzhiyun		1702    99999    400000
334*4882a593Smuzhiyun	>;
335*4882a593Smuzhiyun	auto-min-freq = <200000>;
336*4882a593Smuzhiyun};
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun&sdhci {
339*4882a593Smuzhiyun	bus-width = <8>;
340*4882a593Smuzhiyun	mmc-hs400-1_8v;
341*4882a593Smuzhiyun	no-sdio;
342*4882a593Smuzhiyun	no-sd;
343*4882a593Smuzhiyun	non-removable;
344*4882a593Smuzhiyun	keep-power-in-suspend;
345*4882a593Smuzhiyun	mmc-hs400-enhanced-strobe;
346*4882a593Smuzhiyun	status = "okay";
347*4882a593Smuzhiyun};
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun&i2s0 {
350*4882a593Smuzhiyun	status = "okay";
351*4882a593Smuzhiyun	rockchip,i2s-broken-burst-len;
352*4882a593Smuzhiyun	rockchip,playback-channels = <8>;
353*4882a593Smuzhiyun	rockchip,capture-channels = <8>;
354*4882a593Smuzhiyun	#sound-dai-cells = <0>;
355*4882a593Smuzhiyun};
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun&i2s2 {
358*4882a593Smuzhiyun	#sound-dai-cells = <0>;
359*4882a593Smuzhiyun};
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun&spdif {
362*4882a593Smuzhiyun	#sound-dai-cells = <0>;
363*4882a593Smuzhiyun};
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun&i2c0 {
366*4882a593Smuzhiyun	status = "okay";
367*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <450>;
368*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <15>;
369*4882a593Smuzhiyun};
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun&i2c1 {
372*4882a593Smuzhiyun	status = "okay";
373*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <300>;
374*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <15>;
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun	es8316: es8316@10 {
377*4882a593Smuzhiyun		#sound-dai-cells = <0>;
378*4882a593Smuzhiyun		compatible = "everest,es8316";
379*4882a593Smuzhiyun		reg = <0x10>;
380*4882a593Smuzhiyun		clocks = <&cru SCLK_I2S_8CH_OUT>;
381*4882a593Smuzhiyun		clock-names = "mclk";
382*4882a593Smuzhiyun		pinctrl-names = "default";
383*4882a593Smuzhiyun		pinctrl-0 = <&i2s_8ch_mclk>;
384*4882a593Smuzhiyun		spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
385*4882a593Smuzhiyun		hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
386*4882a593Smuzhiyun	};
387*4882a593Smuzhiyun};
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun&i2c4 {
390*4882a593Smuzhiyun	status = "okay";
391*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <600>;
392*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <20>;
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun	gt9xx: gt9xx@14 {
395*4882a593Smuzhiyun		compatible = "goodix,gt9xx";
396*4882a593Smuzhiyun		reg = <0x14>;
397*4882a593Smuzhiyun		touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
398*4882a593Smuzhiyun		reset-gpio = <&gpio4 22 GPIO_ACTIVE_HIGH>;
399*4882a593Smuzhiyun		max-x = <1200>;
400*4882a593Smuzhiyun		max-y = <1900>;
401*4882a593Smuzhiyun		tp-size = <911>;
402*4882a593Smuzhiyun		tp-supply = <&vcc3v0_tp>;
403*4882a593Smuzhiyun	};
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun	gsl3673: gsl3673@40 {
406*4882a593Smuzhiyun		compatible = "GSL,GSL3673";
407*4882a593Smuzhiyun		reg = <0x40>;
408*4882a593Smuzhiyun		screen_max_x = <1536>;
409*4882a593Smuzhiyun		screen_max_y = <2048>;
410*4882a593Smuzhiyun		irq_gpio_number = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
411*4882a593Smuzhiyun		rst_gpio_number = <&gpio4 22 GPIO_ACTIVE_HIGH>;
412*4882a593Smuzhiyun	};
413*4882a593Smuzhiyun};
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun&io_domains {
416*4882a593Smuzhiyun	status = "okay";
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun	bt656-supply = <&vcc1v8_dvp>;
419*4882a593Smuzhiyun	audio-supply = <&vcca1v8_codec>;
420*4882a593Smuzhiyun	sdmmc-supply = <&vcc_sd>;
421*4882a593Smuzhiyun	gpio1830-supply = <&vcc_3v0>;
422*4882a593Smuzhiyun};
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun&pcie_phy {
425*4882a593Smuzhiyun	status = "disabled";
426*4882a593Smuzhiyun};
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun&pcie0 {
429*4882a593Smuzhiyun	ep-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
430*4882a593Smuzhiyun	num-lanes = <4>;
431*4882a593Smuzhiyun	pinctrl-names = "default";
432*4882a593Smuzhiyun	pinctrl-0 = <&pcie_clkreqn_cpm>;
433*4882a593Smuzhiyun	status = "disabled";
434*4882a593Smuzhiyun};
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun&tcphy0 {
437*4882a593Smuzhiyun	extcon = <&fusb0>;
438*4882a593Smuzhiyun	status = "okay";
439*4882a593Smuzhiyun};
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun&tcphy1 {
442*4882a593Smuzhiyun	extcon = <&fusb1>;
443*4882a593Smuzhiyun	status = "okay";
444*4882a593Smuzhiyun};
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun&tsadc {
447*4882a593Smuzhiyun	rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
448*4882a593Smuzhiyun	rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
449*4882a593Smuzhiyun	status = "okay";
450*4882a593Smuzhiyun};
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun&u2phy0 {
453*4882a593Smuzhiyun	status = "okay";
454*4882a593Smuzhiyun	extcon = <&fusb0>;
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun	u2phy0_otg: otg-port {
457*4882a593Smuzhiyun		status = "okay";
458*4882a593Smuzhiyun	};
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun	u2phy0_host: host-port {
461*4882a593Smuzhiyun		phy-supply = <&vcc5v0_host>;
462*4882a593Smuzhiyun		status = "okay";
463*4882a593Smuzhiyun	};
464*4882a593Smuzhiyun};
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun&u2phy1 {
467*4882a593Smuzhiyun	status = "okay";
468*4882a593Smuzhiyun	extcon = <&fusb1>;
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun	u2phy1_otg: otg-port {
471*4882a593Smuzhiyun		status = "okay";
472*4882a593Smuzhiyun	};
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun	u2phy1_host: host-port {
475*4882a593Smuzhiyun		phy-supply = <&vcc5v0_host>;
476*4882a593Smuzhiyun		status = "okay";
477*4882a593Smuzhiyun	};
478*4882a593Smuzhiyun};
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun&uart0 {
481*4882a593Smuzhiyun	pinctrl-names = "default";
482*4882a593Smuzhiyun	pinctrl-0 = <&uart0_xfer &uart0_cts>;
483*4882a593Smuzhiyun	status = "okay";
484*4882a593Smuzhiyun};
485*4882a593Smuzhiyun
486*4882a593Smuzhiyun&uart2 {
487*4882a593Smuzhiyun	status = "okay";
488*4882a593Smuzhiyun};
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun&usb_host0_ehci {
491*4882a593Smuzhiyun	status = "okay";
492*4882a593Smuzhiyun};
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun&usb_host0_ohci {
495*4882a593Smuzhiyun	status = "okay";
496*4882a593Smuzhiyun};
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun&usb_host1_ehci {
499*4882a593Smuzhiyun	status = "okay";
500*4882a593Smuzhiyun};
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun&usb_host1_ohci {
503*4882a593Smuzhiyun	status = "okay";
504*4882a593Smuzhiyun};
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun&usbdrd3_0 {
507*4882a593Smuzhiyun	status = "okay";
508*4882a593Smuzhiyun};
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun&usbdrd_dwc3_0 {
511*4882a593Smuzhiyun	status = "okay";
512*4882a593Smuzhiyun	extcon = <&fusb0>;
513*4882a593Smuzhiyun};
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun&usbdrd3_1 {
516*4882a593Smuzhiyun	status = "okay";
517*4882a593Smuzhiyun};
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun&usbdrd_dwc3_1 {
520*4882a593Smuzhiyun	status = "okay";
521*4882a593Smuzhiyun	extcon = <&fusb1>;
522*4882a593Smuzhiyun};
523*4882a593Smuzhiyun
524*4882a593Smuzhiyun&pwm0 {
525*4882a593Smuzhiyun	status = "okay";
526*4882a593Smuzhiyun};
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun&gmac {
529*4882a593Smuzhiyun	phy-supply = <&vcc_phy>;
530*4882a593Smuzhiyun	phy-mode = "rgmii";
531*4882a593Smuzhiyun	clock_in_out = "input";
532*4882a593Smuzhiyun	snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
533*4882a593Smuzhiyun	snps,reset-active-low;
534*4882a593Smuzhiyun	snps,reset-delays-us = <0 10000 50000>;
535*4882a593Smuzhiyun	assigned-clocks = <&cru SCLK_RMII_SRC>;
536*4882a593Smuzhiyun	assigned-clock-parents = <&clkin_gmac>;
537*4882a593Smuzhiyun	pinctrl-names = "default";
538*4882a593Smuzhiyun	pinctrl-0 = <&rgmii_pins>;
539*4882a593Smuzhiyun	tx_delay = <0x28>;
540*4882a593Smuzhiyun	rx_delay = <0x11>;
541*4882a593Smuzhiyun	status = "okay";
542*4882a593Smuzhiyun};
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun&saradc {
545*4882a593Smuzhiyun	status = "okay";
546*4882a593Smuzhiyun	vref-supply = <&vcc_1v8>;
547*4882a593Smuzhiyun};
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun&pinctrl {
550*4882a593Smuzhiyun	sdio-pwrseq {
551*4882a593Smuzhiyun		wifi_enable_h: wifi-enable-h {
552*4882a593Smuzhiyun			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
553*4882a593Smuzhiyun		};
554*4882a593Smuzhiyun	};
555*4882a593Smuzhiyun
556*4882a593Smuzhiyun	wireless-bluetooth {
557*4882a593Smuzhiyun		uart0_gpios: uart0-gpios {
558*4882a593Smuzhiyun			rockchip,pins = <2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
559*4882a593Smuzhiyun		};
560*4882a593Smuzhiyun	};
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun	pmic {
563*4882a593Smuzhiyun		pmic_int_l: pmic-int-l {
564*4882a593Smuzhiyun			rockchip,pins =
565*4882a593Smuzhiyun				<1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
566*4882a593Smuzhiyun		};
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun		pmic_dvs2: pmic-dvs2 {
569*4882a593Smuzhiyun			rockchip,pins =
570*4882a593Smuzhiyun				<1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
571*4882a593Smuzhiyun		};
572*4882a593Smuzhiyun		vsel1_gpio: vsel1-gpio {
573*4882a593Smuzhiyun			rockchip,pins =
574*4882a593Smuzhiyun				<1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
575*4882a593Smuzhiyun		};
576*4882a593Smuzhiyun		vsel2_gpio: vsel2-gpio {
577*4882a593Smuzhiyun			rockchip,pins =
578*4882a593Smuzhiyun				<1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
579*4882a593Smuzhiyun		};
580*4882a593Smuzhiyun	};
581*4882a593Smuzhiyun
582*4882a593Smuzhiyun	usb2 {
583*4882a593Smuzhiyun		host_vbus_drv: host-vbus-drv {
584*4882a593Smuzhiyun			rockchip,pins =
585*4882a593Smuzhiyun				<4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
586*4882a593Smuzhiyun		};
587*4882a593Smuzhiyun	};
588*4882a593Smuzhiyun
589*4882a593Smuzhiyun	fusb30x {
590*4882a593Smuzhiyun		fusb0_int: fusb0-int {
591*4882a593Smuzhiyun			rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
592*4882a593Smuzhiyun		};
593*4882a593Smuzhiyun
594*4882a593Smuzhiyun		fusb1_int: fusb1-int {
595*4882a593Smuzhiyun			rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
596*4882a593Smuzhiyun		};
597*4882a593Smuzhiyun	};
598*4882a593Smuzhiyun};
599*4882a593Smuzhiyun
600*4882a593Smuzhiyun&pvtm {
601*4882a593Smuzhiyun	status = "okay";
602*4882a593Smuzhiyun};
603*4882a593Smuzhiyun
604*4882a593Smuzhiyun&pmu_pvtm {
605*4882a593Smuzhiyun	status = "okay";
606*4882a593Smuzhiyun};
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun&pmu_io_domains {
609*4882a593Smuzhiyun	status = "okay";
610*4882a593Smuzhiyun	pmu1830-supply = <&vcc1v8_pmu>;
611*4882a593Smuzhiyun};
612*4882a593Smuzhiyun
613