xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm64/rockchip/rk3399-evb.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/dts-v1/;
7*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h>
8*4882a593Smuzhiyun#include "rk3399.dtsi"
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun/ {
11*4882a593Smuzhiyun	model = "Rockchip RK3399 Evaluation Board";
12*4882a593Smuzhiyun	compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun	backlight: backlight {
15*4882a593Smuzhiyun		compatible = "pwm-backlight";
16*4882a593Smuzhiyun		brightness-levels = <
17*4882a593Smuzhiyun			  0   1   2   3   4   5   6   7
18*4882a593Smuzhiyun			  8   9  10  11  12  13  14  15
19*4882a593Smuzhiyun			 16  17  18  19  20  21  22  23
20*4882a593Smuzhiyun			 24  25  26  27  28  29  30  31
21*4882a593Smuzhiyun			 32  33  34  35  36  37  38  39
22*4882a593Smuzhiyun			 40  41  42  43  44  45  46  47
23*4882a593Smuzhiyun			 48  49  50  51  52  53  54  55
24*4882a593Smuzhiyun			 56  57  58  59  60  61  62  63
25*4882a593Smuzhiyun			 64  65  66  67  68  69  70  71
26*4882a593Smuzhiyun			 72  73  74  75  76  77  78  79
27*4882a593Smuzhiyun			 80  81  82  83  84  85  86  87
28*4882a593Smuzhiyun			 88  89  90  91  92  93  94  95
29*4882a593Smuzhiyun			 96  97  98  99 100 101 102 103
30*4882a593Smuzhiyun			104 105 106 107 108 109 110 111
31*4882a593Smuzhiyun			112 113 114 115 116 117 118 119
32*4882a593Smuzhiyun			120 121 122 123 124 125 126 127
33*4882a593Smuzhiyun			128 129 130 131 132 133 134 135
34*4882a593Smuzhiyun			136 137 138 139 140 141 142 143
35*4882a593Smuzhiyun			144 145 146 147 148 149 150 151
36*4882a593Smuzhiyun			152 153 154 155 156 157 158 159
37*4882a593Smuzhiyun			160 161 162 163 164 165 166 167
38*4882a593Smuzhiyun			168 169 170 171 172 173 174 175
39*4882a593Smuzhiyun			176 177 178 179 180 181 182 183
40*4882a593Smuzhiyun			184 185 186 187 188 189 190 191
41*4882a593Smuzhiyun			192 193 194 195 196 197 198 199
42*4882a593Smuzhiyun			200 201 202 203 204 205 206 207
43*4882a593Smuzhiyun			208 209 210 211 212 213 214 215
44*4882a593Smuzhiyun			216 217 218 219 220 221 222 223
45*4882a593Smuzhiyun			224 225 226 227 228 229 230 231
46*4882a593Smuzhiyun			232 233 234 235 236 237 238 239
47*4882a593Smuzhiyun			240 241 242 243 244 245 246 247
48*4882a593Smuzhiyun			248 249 250 251 252 253 254 255>;
49*4882a593Smuzhiyun		default-brightness-level = <200>;
50*4882a593Smuzhiyun		pwms = <&pwm0 0 25000 0>;
51*4882a593Smuzhiyun	};
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun	edp_panel: edp-panel {
54*4882a593Smuzhiyun		compatible ="lg,lp079qx1-sp0v";
55*4882a593Smuzhiyun		backlight = <&backlight>;
56*4882a593Smuzhiyun		enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
57*4882a593Smuzhiyun		power-supply = <&vcc3v3_s0>;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun		port {
60*4882a593Smuzhiyun			panel_in_edp: endpoint {
61*4882a593Smuzhiyun				remote-endpoint = <&edp_out_panel>;
62*4882a593Smuzhiyun			};
63*4882a593Smuzhiyun		};
64*4882a593Smuzhiyun	};
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun	clkin_gmac: external-gmac-clock {
67*4882a593Smuzhiyun		compatible = "fixed-clock";
68*4882a593Smuzhiyun		clock-frequency = <125000000>;
69*4882a593Smuzhiyun		clock-output-names = "clkin_gmac";
70*4882a593Smuzhiyun		#clock-cells = <0>;
71*4882a593Smuzhiyun	};
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun	vdd_center: vdd-center {
74*4882a593Smuzhiyun		compatible = "pwm-regulator";
75*4882a593Smuzhiyun		pwms = <&pwm3 0 25000 0>;
76*4882a593Smuzhiyun		regulator-name = "vdd_center";
77*4882a593Smuzhiyun		regulator-min-microvolt = <800000>;
78*4882a593Smuzhiyun		regulator-max-microvolt = <1400000>;
79*4882a593Smuzhiyun		regulator-always-on;
80*4882a593Smuzhiyun		regulator-boot-on;
81*4882a593Smuzhiyun		status = "okay";
82*4882a593Smuzhiyun	};
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun	vcc3v3_sys: vcc3v3-sys {
85*4882a593Smuzhiyun		compatible = "regulator-fixed";
86*4882a593Smuzhiyun		regulator-name = "vcc3v3_sys";
87*4882a593Smuzhiyun		regulator-always-on;
88*4882a593Smuzhiyun		regulator-boot-on;
89*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
90*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
91*4882a593Smuzhiyun	};
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun	vcc5v0_sys: vcc5v0-sys {
94*4882a593Smuzhiyun		compatible = "regulator-fixed";
95*4882a593Smuzhiyun		regulator-name = "vcc5v0_sys";
96*4882a593Smuzhiyun		regulator-always-on;
97*4882a593Smuzhiyun		regulator-boot-on;
98*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
99*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
100*4882a593Smuzhiyun	};
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun	vcc5v0_host: vcc5v0-host-regulator {
103*4882a593Smuzhiyun		compatible = "regulator-fixed";
104*4882a593Smuzhiyun		enable-active-high;
105*4882a593Smuzhiyun		gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
106*4882a593Smuzhiyun		pinctrl-names = "default";
107*4882a593Smuzhiyun		pinctrl-0 = <&vcc5v0_host_en>;
108*4882a593Smuzhiyun		regulator-name = "vcc5v0_host";
109*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
110*4882a593Smuzhiyun	};
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun	vcc_phy: vcc-phy-regulator {
113*4882a593Smuzhiyun		compatible = "regulator-fixed";
114*4882a593Smuzhiyun		regulator-name = "vcc_phy";
115*4882a593Smuzhiyun		regulator-always-on;
116*4882a593Smuzhiyun		regulator-boot-on;
117*4882a593Smuzhiyun	};
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun	vcc_phy: vcc-phy-regulator {
120*4882a593Smuzhiyun		compatible = "regulator-fixed";
121*4882a593Smuzhiyun		regulator-name = "vcc_phy";
122*4882a593Smuzhiyun		regulator-always-on;
123*4882a593Smuzhiyun		regulator-boot-on;
124*4882a593Smuzhiyun	};
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun};
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun&edp {
129*4882a593Smuzhiyun	status = "okay";
130*4882a593Smuzhiyun	force-hpd;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun	ports {
133*4882a593Smuzhiyun		edp_out: port@1 {
134*4882a593Smuzhiyun			reg = <1>;
135*4882a593Smuzhiyun			#address-cells = <1>;
136*4882a593Smuzhiyun			#size-cells = <0>;
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun			edp_out_panel: endpoint@0 {
139*4882a593Smuzhiyun				reg = <0>;
140*4882a593Smuzhiyun				remote-endpoint = <&panel_in_edp>;
141*4882a593Smuzhiyun			};
142*4882a593Smuzhiyun		};
143*4882a593Smuzhiyun	};
144*4882a593Smuzhiyun};
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun&emmc_phy {
147*4882a593Smuzhiyun	status = "okay";
148*4882a593Smuzhiyun};
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun&gmac {
151*4882a593Smuzhiyun	assigned-clocks = <&cru SCLK_RMII_SRC>;
152*4882a593Smuzhiyun	assigned-clock-parents = <&clkin_gmac>;
153*4882a593Smuzhiyun	clock_in_out = "input";
154*4882a593Smuzhiyun	phy-supply = <&vcc_phy>;
155*4882a593Smuzhiyun	phy-mode = "rgmii";
156*4882a593Smuzhiyun	pinctrl-names = "default";
157*4882a593Smuzhiyun	pinctrl-0 = <&rgmii_pins>;
158*4882a593Smuzhiyun	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
159*4882a593Smuzhiyun	snps,reset-active-low;
160*4882a593Smuzhiyun	snps,reset-delays-us = <0 10000 50000>;
161*4882a593Smuzhiyun	tx_delay = <0x28>;
162*4882a593Smuzhiyun	rx_delay = <0x11>;
163*4882a593Smuzhiyun	status = "okay";
164*4882a593Smuzhiyun};
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun&i2c0 {
167*4882a593Smuzhiyun	status = "okay";
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun	rk808: pmic@1b {
170*4882a593Smuzhiyun		compatible = "rockchip,rk808";
171*4882a593Smuzhiyun		reg = <0x1b>;
172*4882a593Smuzhiyun		interrupt-parent = <&gpio1>;
173*4882a593Smuzhiyun		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
174*4882a593Smuzhiyun		pinctrl-names = "default";
175*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int_l>;
176*4882a593Smuzhiyun		rockchip,system-power-controller;
177*4882a593Smuzhiyun		wakeup-source;
178*4882a593Smuzhiyun		#clock-cells = <1>;
179*4882a593Smuzhiyun		clock-output-names = "rk808-clkout1", "rk808-clkout2";
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun		vcc1-supply = <&vcc3v3_sys>;
182*4882a593Smuzhiyun		vcc2-supply = <&vcc3v3_sys>;
183*4882a593Smuzhiyun		vcc3-supply = <&vcc3v3_sys>;
184*4882a593Smuzhiyun		vcc4-supply = <&vcc3v3_sys>;
185*4882a593Smuzhiyun		vcc6-supply = <&vcc3v3_sys>;
186*4882a593Smuzhiyun		vcc7-supply = <&vcc3v3_sys>;
187*4882a593Smuzhiyun		vcc8-supply = <&vcc3v3_sys>;
188*4882a593Smuzhiyun		vcc9-supply = <&vcc3v3_sys>;
189*4882a593Smuzhiyun		vcc10-supply = <&vcc3v3_sys>;
190*4882a593Smuzhiyun		vcc11-supply = <&vcc3v3_sys>;
191*4882a593Smuzhiyun		vcc12-supply = <&vcc3v3_sys>;
192*4882a593Smuzhiyun		vddio-supply = <&vcc1v8_pmu>;
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun		regulators {
195*4882a593Smuzhiyun			vdd_log: DCDC_REG1 {
196*4882a593Smuzhiyun				regulator-name = "vdd_log";
197*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
198*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
199*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
200*4882a593Smuzhiyun				regulator-always-on;
201*4882a593Smuzhiyun				regulator-boot-on;
202*4882a593Smuzhiyun				regulator-state-mem {
203*4882a593Smuzhiyun					regulator-on-in-suspend;
204*4882a593Smuzhiyun					regulator-suspend-microvolt = <900000>;
205*4882a593Smuzhiyun				};
206*4882a593Smuzhiyun			};
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun			vdd_cpu_l: DCDC_REG2 {
209*4882a593Smuzhiyun				regulator-name = "vdd_cpu_l";
210*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
211*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
212*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
213*4882a593Smuzhiyun				regulator-always-on;
214*4882a593Smuzhiyun				regulator-boot-on;
215*4882a593Smuzhiyun				regulator-state-mem {
216*4882a593Smuzhiyun					regulator-off-in-suspend;
217*4882a593Smuzhiyun				};
218*4882a593Smuzhiyun			};
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
221*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
222*4882a593Smuzhiyun				regulator-always-on;
223*4882a593Smuzhiyun				regulator-boot-on;
224*4882a593Smuzhiyun				regulator-state-mem {
225*4882a593Smuzhiyun					regulator-on-in-suspend;
226*4882a593Smuzhiyun				};
227*4882a593Smuzhiyun			};
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun			vcc_1v8: DCDC_REG4 {
230*4882a593Smuzhiyun				regulator-name = "vcc_1v8";
231*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
232*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
233*4882a593Smuzhiyun				regulator-always-on;
234*4882a593Smuzhiyun				regulator-boot-on;
235*4882a593Smuzhiyun				regulator-state-mem {
236*4882a593Smuzhiyun					regulator-on-in-suspend;
237*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
238*4882a593Smuzhiyun				};
239*4882a593Smuzhiyun			};
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun			vcc1v8_dvp: LDO_REG1 {
242*4882a593Smuzhiyun				regulator-name = "vcc1v8_dvp";
243*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
244*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
245*4882a593Smuzhiyun				regulator-always-on;
246*4882a593Smuzhiyun				regulator-boot-on;
247*4882a593Smuzhiyun				regulator-state-mem {
248*4882a593Smuzhiyun					regulator-off-in-suspend;
249*4882a593Smuzhiyun				};
250*4882a593Smuzhiyun			};
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun			vcc3v0_tp: LDO_REG2 {
253*4882a593Smuzhiyun				regulator-name = "vcc3v0_tp";
254*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
255*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
256*4882a593Smuzhiyun				regulator-always-on;
257*4882a593Smuzhiyun				regulator-boot-on;
258*4882a593Smuzhiyun				regulator-state-mem {
259*4882a593Smuzhiyun					regulator-off-in-suspend;
260*4882a593Smuzhiyun				};
261*4882a593Smuzhiyun			};
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun			vcc1v8_pmu: LDO_REG3 {
264*4882a593Smuzhiyun				regulator-name = "vcc1v8_pmu";
265*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
266*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
267*4882a593Smuzhiyun				regulator-always-on;
268*4882a593Smuzhiyun				regulator-boot-on;
269*4882a593Smuzhiyun				regulator-state-mem {
270*4882a593Smuzhiyun					regulator-on-in-suspend;
271*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
272*4882a593Smuzhiyun				};
273*4882a593Smuzhiyun			};
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun			vcc_sd: LDO_REG4 {
276*4882a593Smuzhiyun				regulator-name = "vcc_sd";
277*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
278*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
279*4882a593Smuzhiyun				regulator-always-on;
280*4882a593Smuzhiyun				regulator-boot-on;
281*4882a593Smuzhiyun				regulator-state-mem {
282*4882a593Smuzhiyun					regulator-on-in-suspend;
283*4882a593Smuzhiyun					regulator-suspend-microvolt = <3000000>;
284*4882a593Smuzhiyun				};
285*4882a593Smuzhiyun			};
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun			vcca3v0_codec: LDO_REG5 {
288*4882a593Smuzhiyun				regulator-name = "vcca3v0_codec";
289*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
290*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
291*4882a593Smuzhiyun				regulator-always-on;
292*4882a593Smuzhiyun				regulator-boot-on;
293*4882a593Smuzhiyun				regulator-state-mem {
294*4882a593Smuzhiyun					regulator-off-in-suspend;
295*4882a593Smuzhiyun				};
296*4882a593Smuzhiyun			};
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun			vcc_1v5: LDO_REG6 {
299*4882a593Smuzhiyun				regulator-name = "vcc_1v5";
300*4882a593Smuzhiyun				regulator-min-microvolt = <1500000>;
301*4882a593Smuzhiyun				regulator-max-microvolt = <1500000>;
302*4882a593Smuzhiyun				regulator-always-on;
303*4882a593Smuzhiyun				regulator-boot-on;
304*4882a593Smuzhiyun				regulator-state-mem {
305*4882a593Smuzhiyun					regulator-on-in-suspend;
306*4882a593Smuzhiyun					regulator-suspend-microvolt = <1500000>;
307*4882a593Smuzhiyun				};
308*4882a593Smuzhiyun			};
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun			vcca1v8_codec: LDO_REG7 {
311*4882a593Smuzhiyun				regulator-name = "vcca1v8_codec";
312*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
313*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
314*4882a593Smuzhiyun				regulator-always-on;
315*4882a593Smuzhiyun				regulator-boot-on;
316*4882a593Smuzhiyun				regulator-state-mem {
317*4882a593Smuzhiyun					regulator-off-in-suspend;
318*4882a593Smuzhiyun				};
319*4882a593Smuzhiyun			};
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun			vcc_3v0: LDO_REG8 {
322*4882a593Smuzhiyun				regulator-name = "vcc_3v0";
323*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
324*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
325*4882a593Smuzhiyun				regulator-always-on;
326*4882a593Smuzhiyun				regulator-boot-on;
327*4882a593Smuzhiyun				regulator-state-mem {
328*4882a593Smuzhiyun					regulator-on-in-suspend;
329*4882a593Smuzhiyun					regulator-suspend-microvolt = <3000000>;
330*4882a593Smuzhiyun				};
331*4882a593Smuzhiyun			};
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun			vcc3v3_s3: SWITCH_REG1 {
334*4882a593Smuzhiyun				regulator-name = "vcc3v3_s3";
335*4882a593Smuzhiyun				regulator-always-on;
336*4882a593Smuzhiyun				regulator-boot-on;
337*4882a593Smuzhiyun				regulator-state-mem {
338*4882a593Smuzhiyun					regulator-on-in-suspend;
339*4882a593Smuzhiyun				};
340*4882a593Smuzhiyun			};
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun			vcc3v3_s0: SWITCH_REG2 {
343*4882a593Smuzhiyun				regulator-name = "vcc3v3_s0";
344*4882a593Smuzhiyun				regulator-always-on;
345*4882a593Smuzhiyun				regulator-boot-on;
346*4882a593Smuzhiyun				regulator-state-mem {
347*4882a593Smuzhiyun					regulator-off-in-suspend;
348*4882a593Smuzhiyun				};
349*4882a593Smuzhiyun			};
350*4882a593Smuzhiyun		};
351*4882a593Smuzhiyun	};
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun	vdd_cpu_b: regulator@40 {
354*4882a593Smuzhiyun		compatible = "silergy,syr827";
355*4882a593Smuzhiyun		reg = <0x40>;
356*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <1>;
357*4882a593Smuzhiyun		regulator-name = "vdd_cpu_b";
358*4882a593Smuzhiyun		regulator-min-microvolt = <712500>;
359*4882a593Smuzhiyun		regulator-max-microvolt = <1500000>;
360*4882a593Smuzhiyun		regulator-ramp-delay = <1000>;
361*4882a593Smuzhiyun		regulator-always-on;
362*4882a593Smuzhiyun		regulator-boot-on;
363*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun		regulator-state-mem {
366*4882a593Smuzhiyun			regulator-off-in-suspend;
367*4882a593Smuzhiyun		};
368*4882a593Smuzhiyun	};
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun	vdd_gpu: regulator@41 {
371*4882a593Smuzhiyun		compatible = "silergy,syr828";
372*4882a593Smuzhiyun		reg = <0x41>;
373*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <1>;
374*4882a593Smuzhiyun		regulator-name = "vdd_gpu";
375*4882a593Smuzhiyun		regulator-min-microvolt = <712500>;
376*4882a593Smuzhiyun		regulator-max-microvolt = <1500000>;
377*4882a593Smuzhiyun		regulator-ramp-delay = <1000>;
378*4882a593Smuzhiyun		regulator-always-on;
379*4882a593Smuzhiyun		regulator-boot-on;
380*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun		regulator-state-mem {
383*4882a593Smuzhiyun			regulator-off-in-suspend;
384*4882a593Smuzhiyun		};
385*4882a593Smuzhiyun	};
386*4882a593Smuzhiyun};
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun&pwm0 {
389*4882a593Smuzhiyun	status = "okay";
390*4882a593Smuzhiyun};
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun&pwm2 {
393*4882a593Smuzhiyun	status = "okay";
394*4882a593Smuzhiyun};
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun&pwm3 {
397*4882a593Smuzhiyun	status = "okay";
398*4882a593Smuzhiyun};
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun&sdhci {
401*4882a593Smuzhiyun	bus-width = <8>;
402*4882a593Smuzhiyun	mmc-hs400-1_8v;
403*4882a593Smuzhiyun	mmc-hs400-enhanced-strobe;
404*4882a593Smuzhiyun	non-removable;
405*4882a593Smuzhiyun	status = "okay";
406*4882a593Smuzhiyun};
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun&pcie_phy {
409*4882a593Smuzhiyun	status = "disabled";
410*4882a593Smuzhiyun};
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun&pcie0 {
413*4882a593Smuzhiyun	ep-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
414*4882a593Smuzhiyun	num-lanes = <4>;
415*4882a593Smuzhiyun	pinctrl-names = "default";
416*4882a593Smuzhiyun	pinctrl-0 = <&pcie_clkreqn_cpm>;
417*4882a593Smuzhiyun	status = "disabled";
418*4882a593Smuzhiyun};
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun&u2phy0 {
421*4882a593Smuzhiyun	status = "okay";
422*4882a593Smuzhiyun};
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun&u2phy0_host {
425*4882a593Smuzhiyun	phy-supply = <&vcc5v0_host>;
426*4882a593Smuzhiyun	status = "okay";
427*4882a593Smuzhiyun};
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun&u2phy1 {
430*4882a593Smuzhiyun	status = "okay";
431*4882a593Smuzhiyun};
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun&u2phy1_host {
434*4882a593Smuzhiyun	phy-supply = <&vcc5v0_host>;
435*4882a593Smuzhiyun	status = "okay";
436*4882a593Smuzhiyun};
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun&uart2 {
439*4882a593Smuzhiyun	status = "okay";
440*4882a593Smuzhiyun};
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun&usb_host0_ehci {
443*4882a593Smuzhiyun	status = "okay";
444*4882a593Smuzhiyun};
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun&usb_host0_ohci {
447*4882a593Smuzhiyun	status = "okay";
448*4882a593Smuzhiyun};
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun&usb_host1_ehci {
451*4882a593Smuzhiyun	status = "okay";
452*4882a593Smuzhiyun};
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun&usb_host1_ohci {
455*4882a593Smuzhiyun	status = "okay";
456*4882a593Smuzhiyun};
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun&pinctrl {
459*4882a593Smuzhiyun	pmic {
460*4882a593Smuzhiyun		pmic_int_l: pmic-int-l {
461*4882a593Smuzhiyun			rockchip,pins =
462*4882a593Smuzhiyun				<1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
463*4882a593Smuzhiyun		};
464*4882a593Smuzhiyun	};
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun	usb2 {
467*4882a593Smuzhiyun		vcc5v0_host_en: vcc5v0-host-en {
468*4882a593Smuzhiyun			rockchip,pins =
469*4882a593Smuzhiyun				<4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
470*4882a593Smuzhiyun		};
471*4882a593Smuzhiyun	};
472*4882a593Smuzhiyun};
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun&vopb {
475*4882a593Smuzhiyun	status = "okay";
476*4882a593Smuzhiyun};
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun&vopb_mmu {
479*4882a593Smuzhiyun	status = "okay";
480*4882a593Smuzhiyun};
481