1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2022 Rockchip Electronics Co., Ltd. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h> 8*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 9*4882a593Smuzhiyun#include "rk3399.dtsi" 10*4882a593Smuzhiyun#include "rk3399-android.dtsi" 11*4882a593Smuzhiyun#include "rk3399-opp.dtsi" 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun/ { 14*4882a593Smuzhiyun compatible = "rockchip,rk3399-box","rockchip,rk3399"; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun vcc1v8_s0: vcc1v8-s0 { 17*4882a593Smuzhiyun compatible = "regulator-fixed"; 18*4882a593Smuzhiyun regulator-name = "vcc1v8_s0"; 19*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 20*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 21*4882a593Smuzhiyun regulator-always-on; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun vcc_sys: vcc-sys { 25*4882a593Smuzhiyun compatible = "regulator-fixed"; 26*4882a593Smuzhiyun regulator-name = "vcc_sys"; 27*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 28*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 29*4882a593Smuzhiyun regulator-always-on; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun vcc_phy: vcc-phy-regulator { 33*4882a593Smuzhiyun compatible = "regulator-fixed"; 34*4882a593Smuzhiyun regulator-name = "vcc_phy"; 35*4882a593Smuzhiyun regulator-always-on; 36*4882a593Smuzhiyun regulator-boot-on; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun vcc3v3_sys: vcc3v3-sys { 40*4882a593Smuzhiyun compatible = "regulator-fixed"; 41*4882a593Smuzhiyun regulator-name = "vcc3v3_sys"; 42*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 43*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 44*4882a593Smuzhiyun regulator-always-on; 45*4882a593Smuzhiyun vin-supply = <&vcc_sys>; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun vcc5v0_host: vcc5v0-host-regulator { 49*4882a593Smuzhiyun compatible = "regulator-fixed"; 50*4882a593Smuzhiyun enable-active-high; 51*4882a593Smuzhiyun gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>; 52*4882a593Smuzhiyun pinctrl-names = "default"; 53*4882a593Smuzhiyun pinctrl-0 = <&host_vbus_drv>; 54*4882a593Smuzhiyun regulator-name = "vcc5v0_host"; 55*4882a593Smuzhiyun regulator-always-on; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun vdd_log: vdd-log { 59*4882a593Smuzhiyun compatible = "pwm-regulator"; 60*4882a593Smuzhiyun pwms = <&pwm2 0 25000 1>; 61*4882a593Smuzhiyun regulator-name = "vdd_log"; 62*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 63*4882a593Smuzhiyun regulator-max-microvolt = <1400000>; 64*4882a593Smuzhiyun regulator-always-on; 65*4882a593Smuzhiyun regulator-boot-on; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun /* for rockchip boot on */ 68*4882a593Smuzhiyun rockchip,pwm_id= <2>; 69*4882a593Smuzhiyun rockchip,pwm_voltage = <900000>; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun vin-supply = <&vcc_sys>; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun xin32k: xin32k { 75*4882a593Smuzhiyun compatible = "fixed-clock"; 76*4882a593Smuzhiyun clock-frequency = <32768>; 77*4882a593Smuzhiyun clock-output-names = "xin32k"; 78*4882a593Smuzhiyun #clock-cells = <0>; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun clkin_gmac: external-gmac-clock { 82*4882a593Smuzhiyun compatible = "fixed-clock"; 83*4882a593Smuzhiyun clock-frequency = <125000000>; 84*4882a593Smuzhiyun clock-output-names = "clkin_gmac"; 85*4882a593Smuzhiyun #clock-cells = <0>; 86*4882a593Smuzhiyun }; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun spdif-sound { 89*4882a593Smuzhiyun status = "okay"; 90*4882a593Smuzhiyun compatible = "simple-audio-card"; 91*4882a593Smuzhiyun simple-audio-card,name = "ROCKCHIP,SPDIF"; 92*4882a593Smuzhiyun simple-audio-card,mclk-fs = <128>; 93*4882a593Smuzhiyun simple-audio-card,cpu { 94*4882a593Smuzhiyun sound-dai = <&spdif>; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun simple-audio-card,codec { 97*4882a593Smuzhiyun sound-dai = <&spdif_out>; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun spdif_out: spdif-out { 102*4882a593Smuzhiyun status = "okay"; 103*4882a593Smuzhiyun compatible = "linux,spdif-dit"; 104*4882a593Smuzhiyun #sound-dai-cells = <0>; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 108*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 109*4882a593Smuzhiyun clocks = <&rk808 1>; 110*4882a593Smuzhiyun clock-names = "ext_clock"; 111*4882a593Smuzhiyun pinctrl-names = "default"; 112*4882a593Smuzhiyun pinctrl-0 = <&wifi_enable_h>; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun /* 115*4882a593Smuzhiyun * On the module itself this is one of these (depending 116*4882a593Smuzhiyun * on the actual card populated): 117*4882a593Smuzhiyun * - SDIO_RESET_L_WL_REG_ON 118*4882a593Smuzhiyun * - PDN (power down when low) 119*4882a593Smuzhiyun */ 120*4882a593Smuzhiyun reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun wireless-wlan { 124*4882a593Smuzhiyun compatible = "wlan-platdata"; 125*4882a593Smuzhiyun rockchip,grf = <&grf>; 126*4882a593Smuzhiyun wifi_chip_type = "ap6354"; 127*4882a593Smuzhiyun sdio_vref = <1800>; 128*4882a593Smuzhiyun WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; 129*4882a593Smuzhiyun status = "okay"; 130*4882a593Smuzhiyun }; 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun wireless-bluetooth { 133*4882a593Smuzhiyun compatible = "bluetooth-platdata"; 134*4882a593Smuzhiyun clocks = <&rk808 1>; 135*4882a593Smuzhiyun clock-names = "ext_clock"; 136*4882a593Smuzhiyun /* wifi-bt-power-toggle; */ 137*4882a593Smuzhiyun uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; 138*4882a593Smuzhiyun pinctrl-names = "default", "rts_gpio"; 139*4882a593Smuzhiyun pinctrl-0 = <&uart0_rts>; 140*4882a593Smuzhiyun pinctrl-1 = <&uart0_gpios>; 141*4882a593Smuzhiyun /* BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; */ 142*4882a593Smuzhiyun BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; 143*4882a593Smuzhiyun BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; 144*4882a593Smuzhiyun BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; 145*4882a593Smuzhiyun status = "okay"; 146*4882a593Smuzhiyun }; 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun test-power { 149*4882a593Smuzhiyun status = "okay"; 150*4882a593Smuzhiyun }; 151*4882a593Smuzhiyun}; 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun&hdmi_dp_sound { 154*4882a593Smuzhiyun status = "okay"; 155*4882a593Smuzhiyun}; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun&hdmi { 158*4882a593Smuzhiyun pinctrl-names = "default"; 159*4882a593Smuzhiyun pinctrl-0 = <&hdmi_i2c_xfer>, <&hdmi_cec>; 160*4882a593Smuzhiyun}; 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun&sdmmc { 163*4882a593Smuzhiyun clock-frequency = <100000000>; 164*4882a593Smuzhiyun clock-freq-min-max = <100000 100000000>; 165*4882a593Smuzhiyun no-sdio; 166*4882a593Smuzhiyun no-mmc; 167*4882a593Smuzhiyun bus-width = <4>; 168*4882a593Smuzhiyun cap-mmc-highspeed; 169*4882a593Smuzhiyun cap-sd-highspeed; 170*4882a593Smuzhiyun disable-wp; 171*4882a593Smuzhiyun num-slots = <1>; 172*4882a593Smuzhiyun //sd-uhs-sdr104; 173*4882a593Smuzhiyun vqmmc-supply = <&vcc_sd>; 174*4882a593Smuzhiyun pinctrl-names = "default"; 175*4882a593Smuzhiyun pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; 176*4882a593Smuzhiyun card-detect-delay = <800>; 177*4882a593Smuzhiyun status = "okay"; 178*4882a593Smuzhiyun}; 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun&sdio0 { 181*4882a593Smuzhiyun clock-frequency = <100000000>; 182*4882a593Smuzhiyun clock-freq-min-max = <200000 100000000>; 183*4882a593Smuzhiyun no-sd; 184*4882a593Smuzhiyun no-mmc; 185*4882a593Smuzhiyun bus-width = <4>; 186*4882a593Smuzhiyun disable-wp; 187*4882a593Smuzhiyun cap-sd-highspeed; 188*4882a593Smuzhiyun cap-sdio-irq; 189*4882a593Smuzhiyun keep-power-in-suspend; 190*4882a593Smuzhiyun mmc-pwrseq = <&sdio_pwrseq>; 191*4882a593Smuzhiyun non-removable; 192*4882a593Smuzhiyun num-slots = <1>; 193*4882a593Smuzhiyun pinctrl-names = "default"; 194*4882a593Smuzhiyun pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; 195*4882a593Smuzhiyun sd-uhs-sdr104; 196*4882a593Smuzhiyun status = "okay"; 197*4882a593Smuzhiyun}; 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun&emmc_phy { 200*4882a593Smuzhiyun status = "okay"; 201*4882a593Smuzhiyun}; 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun&sdhci { 204*4882a593Smuzhiyun bus-width = <8>; 205*4882a593Smuzhiyun mmc-hs400-1_8v; 206*4882a593Smuzhiyun no-sdio; 207*4882a593Smuzhiyun no-sd; 208*4882a593Smuzhiyun non-removable; 209*4882a593Smuzhiyun mmc-hs400-enhanced-strobe; 210*4882a593Smuzhiyun status = "okay"; 211*4882a593Smuzhiyun}; 212*4882a593Smuzhiyun 213*4882a593Smuzhiyun&i2s0 { 214*4882a593Smuzhiyun status = "okay"; 215*4882a593Smuzhiyun rockchip,i2s-broken-burst-len; 216*4882a593Smuzhiyun rockchip,playback-channels = <8>; 217*4882a593Smuzhiyun rockchip,capture-channels = <8>; 218*4882a593Smuzhiyun #sound-dai-cells = <0>; 219*4882a593Smuzhiyun}; 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun&i2s2 { 222*4882a593Smuzhiyun #sound-dai-cells = <0>; 223*4882a593Smuzhiyun}; 224*4882a593Smuzhiyun 225*4882a593Smuzhiyun&spdif { 226*4882a593Smuzhiyun pinctrl-0 = <&spdif_bus_1>; 227*4882a593Smuzhiyun status = "okay"; 228*4882a593Smuzhiyun #sound-dai-cells = <0>; 229*4882a593Smuzhiyun}; 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun&i2c0 { 232*4882a593Smuzhiyun status = "okay"; 233*4882a593Smuzhiyun i2c-scl-rising-time-ns = <168>; 234*4882a593Smuzhiyun i2c-scl-falling-time-ns = <4>; 235*4882a593Smuzhiyun clock-frequency = <400000>; 236*4882a593Smuzhiyun 237*4882a593Smuzhiyun vdd_cpu_b: syr827@40 { 238*4882a593Smuzhiyun compatible = "silergy,syr827"; 239*4882a593Smuzhiyun reg = <0x40>; 240*4882a593Smuzhiyun regulator-compatible = "fan53555-reg"; 241*4882a593Smuzhiyun pinctrl-0 = <&vsel1_gpio>; 242*4882a593Smuzhiyun vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; 243*4882a593Smuzhiyun regulator-name = "vdd_cpu_b"; 244*4882a593Smuzhiyun regulator-min-microvolt = <712500>; 245*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 246*4882a593Smuzhiyun regulator-ramp-delay = <1000>; 247*4882a593Smuzhiyun fcs,suspend-voltage-selector = <1>; 248*4882a593Smuzhiyun regulator-always-on; 249*4882a593Smuzhiyun regulator-boot-on; 250*4882a593Smuzhiyun vin-supply = <&vcc_sys>; 251*4882a593Smuzhiyun regulator-state-mem { 252*4882a593Smuzhiyun regulator-off-in-suspend; 253*4882a593Smuzhiyun }; 254*4882a593Smuzhiyun }; 255*4882a593Smuzhiyun 256*4882a593Smuzhiyun vdd_gpu: syr828@41 { 257*4882a593Smuzhiyun compatible = "silergy,syr828"; 258*4882a593Smuzhiyun reg = <0x41>; 259*4882a593Smuzhiyun regulator-compatible = "fan53555-reg"; 260*4882a593Smuzhiyun pinctrl-0 = <&vsel2_gpio>; 261*4882a593Smuzhiyun vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; 262*4882a593Smuzhiyun regulator-name = "vdd_gpu"; 263*4882a593Smuzhiyun regulator-min-microvolt = <712500>; 264*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 265*4882a593Smuzhiyun regulator-ramp-delay = <1000>; 266*4882a593Smuzhiyun fcs,suspend-voltage-selector = <1>; 267*4882a593Smuzhiyun regulator-always-on; 268*4882a593Smuzhiyun regulator-boot-on; 269*4882a593Smuzhiyun vin-supply = <&vcc_sys>; 270*4882a593Smuzhiyun regulator-initial-mode = <1>; /* 1:force PWM 2:auto */ 271*4882a593Smuzhiyun regulator-state-mem { 272*4882a593Smuzhiyun regulator-off-in-suspend; 273*4882a593Smuzhiyun }; 274*4882a593Smuzhiyun }; 275*4882a593Smuzhiyun 276*4882a593Smuzhiyun rk808: pmic@1b { 277*4882a593Smuzhiyun compatible = "rockchip,rk808"; 278*4882a593Smuzhiyun reg = <0x1b>; 279*4882a593Smuzhiyun interrupt-parent = <&gpio1>; 280*4882a593Smuzhiyun interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 281*4882a593Smuzhiyun pinctrl-names = "default"; 282*4882a593Smuzhiyun pinctrl-0 = <&pmic_int_l>; 283*4882a593Smuzhiyun rockchip,system-power-controller; 284*4882a593Smuzhiyun wakeup-source; 285*4882a593Smuzhiyun #clock-cells = <1>; 286*4882a593Smuzhiyun clock-output-names = "rk808-clkout1", "rk808-clkout2"; 287*4882a593Smuzhiyun 288*4882a593Smuzhiyun vcc1-supply = <&vcc_sys>; 289*4882a593Smuzhiyun vcc2-supply = <&vcc_sys>; 290*4882a593Smuzhiyun vcc3-supply = <&vcc_sys>; 291*4882a593Smuzhiyun vcc4-supply = <&vcc_sys>; 292*4882a593Smuzhiyun vcc6-supply = <&vcc_sys>; 293*4882a593Smuzhiyun vcc7-supply = <&vcc_sys>; 294*4882a593Smuzhiyun vcc8-supply = <&vcc3v3_sys>; 295*4882a593Smuzhiyun vcc9-supply = <&vcc_sys>; 296*4882a593Smuzhiyun vcc10-supply = <&vcc_sys>; 297*4882a593Smuzhiyun vcc11-supply = <&vcc_sys>; 298*4882a593Smuzhiyun vcc12-supply = <&vcc3v3_sys>; 299*4882a593Smuzhiyun vddio-supply = <&vcc_1v8>; 300*4882a593Smuzhiyun 301*4882a593Smuzhiyun regulators { 302*4882a593Smuzhiyun vdd_center: DCDC_REG1 { 303*4882a593Smuzhiyun regulator-name = "vdd_center"; 304*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 305*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 306*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 307*4882a593Smuzhiyun regulator-always-on; 308*4882a593Smuzhiyun regulator-boot-on; 309*4882a593Smuzhiyun regulator-state-mem { 310*4882a593Smuzhiyun regulator-off-in-suspend; 311*4882a593Smuzhiyun }; 312*4882a593Smuzhiyun }; 313*4882a593Smuzhiyun 314*4882a593Smuzhiyun vdd_cpu_l: DCDC_REG2 { 315*4882a593Smuzhiyun regulator-name = "vdd_cpu_l"; 316*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 317*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 318*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 319*4882a593Smuzhiyun regulator-always-on; 320*4882a593Smuzhiyun regulator-boot-on; 321*4882a593Smuzhiyun regulator-state-mem { 322*4882a593Smuzhiyun regulator-off-in-suspend; 323*4882a593Smuzhiyun }; 324*4882a593Smuzhiyun }; 325*4882a593Smuzhiyun 326*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 327*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 328*4882a593Smuzhiyun regulator-always-on; 329*4882a593Smuzhiyun regulator-boot-on; 330*4882a593Smuzhiyun regulator-state-mem { 331*4882a593Smuzhiyun regulator-on-in-suspend; 332*4882a593Smuzhiyun }; 333*4882a593Smuzhiyun }; 334*4882a593Smuzhiyun 335*4882a593Smuzhiyun vcc_1v8: DCDC_REG4 { 336*4882a593Smuzhiyun regulator-name = "vcc_1v8"; 337*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 338*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 339*4882a593Smuzhiyun regulator-always-on; 340*4882a593Smuzhiyun regulator-boot-on; 341*4882a593Smuzhiyun regulator-state-mem { 342*4882a593Smuzhiyun regulator-on-in-suspend; 343*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 344*4882a593Smuzhiyun }; 345*4882a593Smuzhiyun }; 346*4882a593Smuzhiyun 347*4882a593Smuzhiyun vcc1v8_dvp: LDO_REG1 { 348*4882a593Smuzhiyun regulator-name = "vcc1v8_dvp"; 349*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 350*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 351*4882a593Smuzhiyun regulator-always-on; 352*4882a593Smuzhiyun regulator-boot-on; 353*4882a593Smuzhiyun regulator-state-mem { 354*4882a593Smuzhiyun regulator-on-in-suspend; 355*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 356*4882a593Smuzhiyun }; 357*4882a593Smuzhiyun }; 358*4882a593Smuzhiyun 359*4882a593Smuzhiyun vcca1v8_hdmi: LDO_REG2 { 360*4882a593Smuzhiyun regulator-name = "vcca1v8_hdmi"; 361*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 362*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 363*4882a593Smuzhiyun regulator-always-on; 364*4882a593Smuzhiyun regulator-boot-on; 365*4882a593Smuzhiyun regulator-state-mem { 366*4882a593Smuzhiyun regulator-on-in-suspend; 367*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 368*4882a593Smuzhiyun }; 369*4882a593Smuzhiyun }; 370*4882a593Smuzhiyun 371*4882a593Smuzhiyun vcca_1v8: LDO_REG3 { 372*4882a593Smuzhiyun regulator-name = "vcca_1v8"; 373*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 374*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 375*4882a593Smuzhiyun regulator-always-on; 376*4882a593Smuzhiyun regulator-boot-on; 377*4882a593Smuzhiyun regulator-state-mem { 378*4882a593Smuzhiyun regulator-on-in-suspend; 379*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 380*4882a593Smuzhiyun }; 381*4882a593Smuzhiyun }; 382*4882a593Smuzhiyun 383*4882a593Smuzhiyun vcc_sd: LDO_REG4 { 384*4882a593Smuzhiyun regulator-name = "vcc_sd"; 385*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 386*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 387*4882a593Smuzhiyun regulator-always-on; 388*4882a593Smuzhiyun regulator-boot-on; 389*4882a593Smuzhiyun regulator-state-mem { 390*4882a593Smuzhiyun regulator-on-in-suspend; 391*4882a593Smuzhiyun regulator-suspend-microvolt = <3000000>; 392*4882a593Smuzhiyun }; 393*4882a593Smuzhiyun }; 394*4882a593Smuzhiyun 395*4882a593Smuzhiyun vcc3v0_sd: LDO_REG5 { 396*4882a593Smuzhiyun regulator-name = "vcc3v0_sd"; 397*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 398*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 399*4882a593Smuzhiyun regulator-always-on; 400*4882a593Smuzhiyun regulator-boot-on; 401*4882a593Smuzhiyun regulator-state-mem { 402*4882a593Smuzhiyun regulator-on-in-suspend; 403*4882a593Smuzhiyun regulator-suspend-microvolt = <3000000>; 404*4882a593Smuzhiyun }; 405*4882a593Smuzhiyun }; 406*4882a593Smuzhiyun 407*4882a593Smuzhiyun vcc_1v5: LDO_REG6 { 408*4882a593Smuzhiyun regulator-name = "vcc_1v5"; 409*4882a593Smuzhiyun regulator-min-microvolt = <1500000>; 410*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 411*4882a593Smuzhiyun regulator-always-on; 412*4882a593Smuzhiyun regulator-boot-on; 413*4882a593Smuzhiyun regulator-state-mem { 414*4882a593Smuzhiyun regulator-on-in-suspend; 415*4882a593Smuzhiyun regulator-suspend-microvolt = <1500000>; 416*4882a593Smuzhiyun }; 417*4882a593Smuzhiyun }; 418*4882a593Smuzhiyun 419*4882a593Smuzhiyun vcca0v9_hdmi: LDO_REG7 { 420*4882a593Smuzhiyun regulator-name = "vcca0v9_hdmi"; 421*4882a593Smuzhiyun regulator-min-microvolt = <900000>; 422*4882a593Smuzhiyun regulator-max-microvolt = <900000>; 423*4882a593Smuzhiyun regulator-always-on; 424*4882a593Smuzhiyun regulator-boot-on; 425*4882a593Smuzhiyun regulator-state-mem { 426*4882a593Smuzhiyun regulator-on-in-suspend; 427*4882a593Smuzhiyun regulator-suspend-microvolt = <900000>; 428*4882a593Smuzhiyun }; 429*4882a593Smuzhiyun }; 430*4882a593Smuzhiyun 431*4882a593Smuzhiyun vcc_3v0: LDO_REG8 { 432*4882a593Smuzhiyun regulator-name = "vcc_3v0"; 433*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 434*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 435*4882a593Smuzhiyun regulator-always-on; 436*4882a593Smuzhiyun regulator-boot-on; 437*4882a593Smuzhiyun regulator-state-mem { 438*4882a593Smuzhiyun regulator-on-in-suspend; 439*4882a593Smuzhiyun regulator-suspend-microvolt = <3000000>; 440*4882a593Smuzhiyun }; 441*4882a593Smuzhiyun }; 442*4882a593Smuzhiyun 443*4882a593Smuzhiyun vcc3v3_s3: SWITCH_REG1 { 444*4882a593Smuzhiyun regulator-name = "vcc3v3_s3"; 445*4882a593Smuzhiyun regulator-always-on; 446*4882a593Smuzhiyun regulator-boot-on; 447*4882a593Smuzhiyun regulator-state-mem { 448*4882a593Smuzhiyun regulator-on-in-suspend; 449*4882a593Smuzhiyun }; 450*4882a593Smuzhiyun }; 451*4882a593Smuzhiyun 452*4882a593Smuzhiyun vcc3v3_s0: SWITCH_REG2 { 453*4882a593Smuzhiyun regulator-name = "vcc3v3_s0"; 454*4882a593Smuzhiyun regulator-always-on; 455*4882a593Smuzhiyun regulator-boot-on; 456*4882a593Smuzhiyun regulator-state-mem { 457*4882a593Smuzhiyun regulator-on-in-suspend; 458*4882a593Smuzhiyun }; 459*4882a593Smuzhiyun }; 460*4882a593Smuzhiyun }; 461*4882a593Smuzhiyun }; 462*4882a593Smuzhiyun}; 463*4882a593Smuzhiyun 464*4882a593Smuzhiyun&cpu_l0 { 465*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_l>; 466*4882a593Smuzhiyun}; 467*4882a593Smuzhiyun 468*4882a593Smuzhiyun&cpu_l1 { 469*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_l>; 470*4882a593Smuzhiyun}; 471*4882a593Smuzhiyun 472*4882a593Smuzhiyun&cpu_l2 { 473*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_l>; 474*4882a593Smuzhiyun}; 475*4882a593Smuzhiyun 476*4882a593Smuzhiyun&cpu_l3 { 477*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_l>; 478*4882a593Smuzhiyun}; 479*4882a593Smuzhiyun 480*4882a593Smuzhiyun&cpu_b0 { 481*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_b>; 482*4882a593Smuzhiyun}; 483*4882a593Smuzhiyun 484*4882a593Smuzhiyun&cpu_b1 { 485*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_b>; 486*4882a593Smuzhiyun}; 487*4882a593Smuzhiyun 488*4882a593Smuzhiyun&firmware_android { 489*4882a593Smuzhiyun compatible = "android,firmware"; 490*4882a593Smuzhiyun fstab { 491*4882a593Smuzhiyun compatible = "android,fstab"; 492*4882a593Smuzhiyun system { 493*4882a593Smuzhiyun compatible = "android,system"; 494*4882a593Smuzhiyun dev = "/dev/block/by-name/system"; 495*4882a593Smuzhiyun type = "ext4"; 496*4882a593Smuzhiyun mnt_flags = "ro,barrier=1,inode_readahead_blks=8"; 497*4882a593Smuzhiyun fsmgr_flags = "wait,verify"; 498*4882a593Smuzhiyun }; 499*4882a593Smuzhiyun vendor { 500*4882a593Smuzhiyun compatible = "android,vendor"; 501*4882a593Smuzhiyun dev = "/dev/block/by-name/vendor"; 502*4882a593Smuzhiyun type = "ext4"; 503*4882a593Smuzhiyun mnt_flags = "ro,barrier=1,inode_readahead_blks=8"; 504*4882a593Smuzhiyun fsmgr_flags = "wait,verify"; 505*4882a593Smuzhiyun }; 506*4882a593Smuzhiyun }; 507*4882a593Smuzhiyun}; 508*4882a593Smuzhiyun 509*4882a593Smuzhiyun&gpu { 510*4882a593Smuzhiyun status = "okay"; 511*4882a593Smuzhiyun mali-supply = <&vdd_gpu>; 512*4882a593Smuzhiyun}; 513*4882a593Smuzhiyun 514*4882a593Smuzhiyun&threshold { 515*4882a593Smuzhiyun temperature = <85000>; 516*4882a593Smuzhiyun}; 517*4882a593Smuzhiyun 518*4882a593Smuzhiyun&target { 519*4882a593Smuzhiyun temperature = <100000>; 520*4882a593Smuzhiyun}; 521*4882a593Smuzhiyun 522*4882a593Smuzhiyun&soc_crit { 523*4882a593Smuzhiyun temperature = <115000>; 524*4882a593Smuzhiyun}; 525*4882a593Smuzhiyun 526*4882a593Smuzhiyun&tcphy0 { 527*4882a593Smuzhiyun extcon = <&fusb0>; 528*4882a593Smuzhiyun status = "okay"; 529*4882a593Smuzhiyun}; 530*4882a593Smuzhiyun 531*4882a593Smuzhiyun&tcphy1 { 532*4882a593Smuzhiyun status = "okay"; 533*4882a593Smuzhiyun}; 534*4882a593Smuzhiyun 535*4882a593Smuzhiyun&tsadc { 536*4882a593Smuzhiyun /* tshut mode 0:CRU 1:GPIO */ 537*4882a593Smuzhiyun rockchip,hw-tshut-mode = <1>; 538*4882a593Smuzhiyun /* tshut polarity 0:LOW 1:HIGH */ 539*4882a593Smuzhiyun rockchip,hw-tshut-polarity = <1>; 540*4882a593Smuzhiyun rockchip,hw-tshut-temp = <120000>; 541*4882a593Smuzhiyun status = "okay"; 542*4882a593Smuzhiyun}; 543*4882a593Smuzhiyun 544*4882a593Smuzhiyun&u2phy0 { 545*4882a593Smuzhiyun status = "okay"; 546*4882a593Smuzhiyun extcon = <&fusb0>; 547*4882a593Smuzhiyun 548*4882a593Smuzhiyun u2phy0_otg: otg-port { 549*4882a593Smuzhiyun status = "okay"; 550*4882a593Smuzhiyun }; 551*4882a593Smuzhiyun 552*4882a593Smuzhiyun u2phy0_host: host-port { 553*4882a593Smuzhiyun phy-supply = <&vcc5v0_host>; 554*4882a593Smuzhiyun status = "okay"; 555*4882a593Smuzhiyun }; 556*4882a593Smuzhiyun}; 557*4882a593Smuzhiyun 558*4882a593Smuzhiyun&u2phy1 { 559*4882a593Smuzhiyun status = "okay"; 560*4882a593Smuzhiyun 561*4882a593Smuzhiyun u2phy1_otg: otg-port { 562*4882a593Smuzhiyun status = "okay"; 563*4882a593Smuzhiyun }; 564*4882a593Smuzhiyun 565*4882a593Smuzhiyun u2phy1_host: host-port { 566*4882a593Smuzhiyun phy-supply = <&vcc5v0_host>; 567*4882a593Smuzhiyun status = "okay"; 568*4882a593Smuzhiyun }; 569*4882a593Smuzhiyun}; 570*4882a593Smuzhiyun 571*4882a593Smuzhiyun&uart0 { 572*4882a593Smuzhiyun pinctrl-names = "default"; 573*4882a593Smuzhiyun pinctrl-0 = <&uart0_xfer &uart0_cts>; 574*4882a593Smuzhiyun status = "okay"; 575*4882a593Smuzhiyun}; 576*4882a593Smuzhiyun 577*4882a593Smuzhiyun&uart2 { 578*4882a593Smuzhiyun status = "okay"; 579*4882a593Smuzhiyun}; 580*4882a593Smuzhiyun 581*4882a593Smuzhiyun&usb_host0_ehci { 582*4882a593Smuzhiyun status = "okay"; 583*4882a593Smuzhiyun}; 584*4882a593Smuzhiyun 585*4882a593Smuzhiyun&usb_host0_ohci { 586*4882a593Smuzhiyun status = "okay"; 587*4882a593Smuzhiyun}; 588*4882a593Smuzhiyun 589*4882a593Smuzhiyun&usb_host1_ehci { 590*4882a593Smuzhiyun status = "okay"; 591*4882a593Smuzhiyun}; 592*4882a593Smuzhiyun 593*4882a593Smuzhiyun&usb_host1_ohci { 594*4882a593Smuzhiyun status = "okay"; 595*4882a593Smuzhiyun}; 596*4882a593Smuzhiyun 597*4882a593Smuzhiyun&usbdrd3_0 { 598*4882a593Smuzhiyun status = "okay"; 599*4882a593Smuzhiyun}; 600*4882a593Smuzhiyun 601*4882a593Smuzhiyun&usbdrd_dwc3_0 { 602*4882a593Smuzhiyun dr_mode = "otg"; 603*4882a593Smuzhiyun status = "okay"; 604*4882a593Smuzhiyun extcon = <&fusb0>; 605*4882a593Smuzhiyun}; 606*4882a593Smuzhiyun 607*4882a593Smuzhiyun&usbdrd3_1 { 608*4882a593Smuzhiyun status = "okay"; 609*4882a593Smuzhiyun}; 610*4882a593Smuzhiyun 611*4882a593Smuzhiyun&usbdrd_dwc3_1 { 612*4882a593Smuzhiyun dr_mode = "host"; 613*4882a593Smuzhiyun status = "okay"; 614*4882a593Smuzhiyun}; 615*4882a593Smuzhiyun 616*4882a593Smuzhiyun&pwm2 { 617*4882a593Smuzhiyun status = "okay"; 618*4882a593Smuzhiyun pinctrl-names = "active"; 619*4882a593Smuzhiyun pinctrl-0 = <&pwm2_pin_pull_down>; 620*4882a593Smuzhiyun}; 621*4882a593Smuzhiyun 622*4882a593Smuzhiyun&pwm3 { 623*4882a593Smuzhiyun status = "okay"; 624*4882a593Smuzhiyun 625*4882a593Smuzhiyun interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>; 626*4882a593Smuzhiyun compatible = "rockchip,remotectl-pwm"; 627*4882a593Smuzhiyun remote_pwm_id = <3>; 628*4882a593Smuzhiyun handle_cpu_id = <1>; 629*4882a593Smuzhiyun remote_support_psci = <1>; 630*4882a593Smuzhiyun 631*4882a593Smuzhiyun ir_key1 { 632*4882a593Smuzhiyun rockchip,usercode = <0x4040>; 633*4882a593Smuzhiyun rockchip,key_table = 634*4882a593Smuzhiyun <0xf2 KEY_REPLY>, 635*4882a593Smuzhiyun <0xba KEY_BACK>, 636*4882a593Smuzhiyun <0xf4 KEY_UP>, 637*4882a593Smuzhiyun <0xf1 KEY_DOWN>, 638*4882a593Smuzhiyun <0xef KEY_LEFT>, 639*4882a593Smuzhiyun <0xee KEY_RIGHT>, 640*4882a593Smuzhiyun <0xbd KEY_HOME>, 641*4882a593Smuzhiyun <0xea KEY_VOLUMEUP>, 642*4882a593Smuzhiyun <0xe3 KEY_VOLUMEDOWN>, 643*4882a593Smuzhiyun <0xe2 KEY_SEARCH>, 644*4882a593Smuzhiyun <0xb2 KEY_POWER>, 645*4882a593Smuzhiyun <0xbc KEY_MUTE>, 646*4882a593Smuzhiyun <0xec KEY_MENU>, 647*4882a593Smuzhiyun <0xbf 0x190>, 648*4882a593Smuzhiyun <0xe0 0x191>, 649*4882a593Smuzhiyun <0xe1 0x192>, 650*4882a593Smuzhiyun <0xe9 183>, 651*4882a593Smuzhiyun <0xe6 248>, 652*4882a593Smuzhiyun <0xe8 185>, 653*4882a593Smuzhiyun <0xe7 186>, 654*4882a593Smuzhiyun <0xf0 388>, 655*4882a593Smuzhiyun <0xbe 0x175>; 656*4882a593Smuzhiyun }; 657*4882a593Smuzhiyun 658*4882a593Smuzhiyun ir_key2 { 659*4882a593Smuzhiyun rockchip,usercode = <0xff00>; 660*4882a593Smuzhiyun rockchip,key_table = 661*4882a593Smuzhiyun <0xf9 KEY_HOME>, 662*4882a593Smuzhiyun <0xbf KEY_BACK>, 663*4882a593Smuzhiyun <0xfb KEY_MENU>, 664*4882a593Smuzhiyun <0xaa KEY_REPLY>, 665*4882a593Smuzhiyun <0xb9 KEY_UP>, 666*4882a593Smuzhiyun <0xe9 KEY_DOWN>, 667*4882a593Smuzhiyun <0xb8 KEY_LEFT>, 668*4882a593Smuzhiyun <0xea KEY_RIGHT>, 669*4882a593Smuzhiyun <0xeb KEY_VOLUMEDOWN>, 670*4882a593Smuzhiyun <0xef KEY_VOLUMEUP>, 671*4882a593Smuzhiyun <0xf7 KEY_MUTE>, 672*4882a593Smuzhiyun <0xe7 KEY_POWER>, 673*4882a593Smuzhiyun <0xfc KEY_POWER>, 674*4882a593Smuzhiyun <0xa9 KEY_VOLUMEDOWN>, 675*4882a593Smuzhiyun <0xa8 KEY_VOLUMEDOWN>, 676*4882a593Smuzhiyun <0xe0 KEY_VOLUMEDOWN>, 677*4882a593Smuzhiyun <0xa5 KEY_VOLUMEDOWN>, 678*4882a593Smuzhiyun <0xab 183>, 679*4882a593Smuzhiyun <0xb7 388>, 680*4882a593Smuzhiyun <0xe8 388>, 681*4882a593Smuzhiyun <0xf8 184>, 682*4882a593Smuzhiyun <0xaf 185>, 683*4882a593Smuzhiyun <0xed KEY_VOLUMEDOWN>, 684*4882a593Smuzhiyun <0xee 186>, 685*4882a593Smuzhiyun <0xb3 KEY_VOLUMEDOWN>, 686*4882a593Smuzhiyun <0xf1 KEY_VOLUMEDOWN>, 687*4882a593Smuzhiyun <0xf2 KEY_VOLUMEDOWN>, 688*4882a593Smuzhiyun <0xf3 KEY_SEARCH>, 689*4882a593Smuzhiyun <0xb4 KEY_VOLUMEDOWN>, 690*4882a593Smuzhiyun <0xbe KEY_SEARCH>; 691*4882a593Smuzhiyun }; 692*4882a593Smuzhiyun 693*4882a593Smuzhiyun ir_key3 { 694*4882a593Smuzhiyun rockchip,usercode = <0x1dcc>; 695*4882a593Smuzhiyun rockchip,key_table = 696*4882a593Smuzhiyun <0xee KEY_REPLY>, 697*4882a593Smuzhiyun <0xf0 KEY_BACK>, 698*4882a593Smuzhiyun <0xf8 KEY_UP>, 699*4882a593Smuzhiyun <0xbb KEY_DOWN>, 700*4882a593Smuzhiyun <0xef KEY_LEFT>, 701*4882a593Smuzhiyun <0xed KEY_RIGHT>, 702*4882a593Smuzhiyun <0xfc KEY_HOME>, 703*4882a593Smuzhiyun <0xf1 KEY_VOLUMEUP>, 704*4882a593Smuzhiyun <0xfd KEY_VOLUMEDOWN>, 705*4882a593Smuzhiyun <0xb7 KEY_SEARCH>, 706*4882a593Smuzhiyun <0xff KEY_POWER>, 707*4882a593Smuzhiyun <0xf3 KEY_MUTE>, 708*4882a593Smuzhiyun <0xbf KEY_MENU>, 709*4882a593Smuzhiyun <0xf9 0x191>, 710*4882a593Smuzhiyun <0xf5 0x192>, 711*4882a593Smuzhiyun <0xb3 388>, 712*4882a593Smuzhiyun <0xbe KEY_1>, 713*4882a593Smuzhiyun <0xba KEY_2>, 714*4882a593Smuzhiyun <0xb2 KEY_3>, 715*4882a593Smuzhiyun <0xbd KEY_4>, 716*4882a593Smuzhiyun <0xf9 KEY_5>, 717*4882a593Smuzhiyun <0xb1 KEY_6>, 718*4882a593Smuzhiyun <0xfc KEY_7>, 719*4882a593Smuzhiyun <0xf8 KEY_8>, 720*4882a593Smuzhiyun <0xb0 KEY_9>, 721*4882a593Smuzhiyun <0xb6 KEY_0>, 722*4882a593Smuzhiyun <0xb5 KEY_BACKSPACE>; 723*4882a593Smuzhiyun }; 724*4882a593Smuzhiyun}; 725*4882a593Smuzhiyun 726*4882a593Smuzhiyun&gmac { 727*4882a593Smuzhiyun phy-supply = <&vcc_phy>; 728*4882a593Smuzhiyun phy-mode = "rgmii"; 729*4882a593Smuzhiyun clock_in_out = "input"; 730*4882a593Smuzhiyun snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>; 731*4882a593Smuzhiyun snps,reset-active-low; 732*4882a593Smuzhiyun snps,reset-delays-us = <0 10000 50000>; 733*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_RMII_SRC>; 734*4882a593Smuzhiyun assigned-clock-parents = <&clkin_gmac>; 735*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 736*4882a593Smuzhiyun pinctrl-0 = <&rgmii_pins>; 737*4882a593Smuzhiyun pinctrl-1 = <&rgmii_sleep_pins>; 738*4882a593Smuzhiyun tx_delay = <0x28>; 739*4882a593Smuzhiyun rx_delay = <0x11>; 740*4882a593Smuzhiyun status = "okay"; 741*4882a593Smuzhiyun}; 742*4882a593Smuzhiyun 743*4882a593Smuzhiyun&saradc { 744*4882a593Smuzhiyun status = "okay"; 745*4882a593Smuzhiyun}; 746*4882a593Smuzhiyun 747*4882a593Smuzhiyun&i2s2 { 748*4882a593Smuzhiyun status = "okay"; 749*4882a593Smuzhiyun}; 750*4882a593Smuzhiyun 751*4882a593Smuzhiyun&io_domains { 752*4882a593Smuzhiyun status = "okay"; 753*4882a593Smuzhiyun 754*4882a593Smuzhiyun bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */ 755*4882a593Smuzhiyun audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */ 756*4882a593Smuzhiyun sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */ 757*4882a593Smuzhiyun gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */ 758*4882a593Smuzhiyun}; 759*4882a593Smuzhiyun 760*4882a593Smuzhiyun&pinctrl { 761*4882a593Smuzhiyun sdio-pwrseq { 762*4882a593Smuzhiyun wifi_enable_h: wifi-enable-h { 763*4882a593Smuzhiyun rockchip,pins = 764*4882a593Smuzhiyun <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 765*4882a593Smuzhiyun }; 766*4882a593Smuzhiyun }; 767*4882a593Smuzhiyun 768*4882a593Smuzhiyun wireless-bluetooth { 769*4882a593Smuzhiyun uart0_gpios: uart0-gpios { 770*4882a593Smuzhiyun rockchip,pins = 771*4882a593Smuzhiyun <2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; 772*4882a593Smuzhiyun }; 773*4882a593Smuzhiyun }; 774*4882a593Smuzhiyun 775*4882a593Smuzhiyun usb2 { 776*4882a593Smuzhiyun host_vbus_drv: host-vbus-drv { 777*4882a593Smuzhiyun rockchip,pins = 778*4882a593Smuzhiyun <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 779*4882a593Smuzhiyun }; 780*4882a593Smuzhiyun }; 781*4882a593Smuzhiyun 782*4882a593Smuzhiyun pmic { 783*4882a593Smuzhiyun pmic_int_l: pmic-int-l { 784*4882a593Smuzhiyun rockchip,pins = 785*4882a593Smuzhiyun <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; 786*4882a593Smuzhiyun }; 787*4882a593Smuzhiyun 788*4882a593Smuzhiyun vsel1_gpio: vsel1-gpio { 789*4882a593Smuzhiyun rockchip,pins = 790*4882a593Smuzhiyun <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; 791*4882a593Smuzhiyun }; 792*4882a593Smuzhiyun 793*4882a593Smuzhiyun vsel2_gpio: vsel2-gpio { 794*4882a593Smuzhiyun rockchip,pins = 795*4882a593Smuzhiyun <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; 796*4882a593Smuzhiyun }; 797*4882a593Smuzhiyun }; 798*4882a593Smuzhiyun 799*4882a593Smuzhiyun gmac { 800*4882a593Smuzhiyun rgmii_sleep_pins: rgmii-sleep-pins { 801*4882a593Smuzhiyun rockchip,pins = 802*4882a593Smuzhiyun <3 RK_PB7 RK_FUNC_GPIO &pcfg_output_low>; 803*4882a593Smuzhiyun }; 804*4882a593Smuzhiyun }; 805*4882a593Smuzhiyun}; 806*4882a593Smuzhiyun 807*4882a593Smuzhiyun&pvtm { 808*4882a593Smuzhiyun status = "okay"; 809*4882a593Smuzhiyun}; 810*4882a593Smuzhiyun 811*4882a593Smuzhiyun&pmu_pvtm { 812*4882a593Smuzhiyun status = "okay"; 813*4882a593Smuzhiyun}; 814*4882a593Smuzhiyun 815*4882a593Smuzhiyun&pmu_io_domains { 816*4882a593Smuzhiyun status = "okay"; 817*4882a593Smuzhiyun pmu1830-supply = <&vcc_1v8>; 818*4882a593Smuzhiyun}; 819*4882a593Smuzhiyun 820*4882a593Smuzhiyun&rockchip_suspend { 821*4882a593Smuzhiyun status = "okay"; 822*4882a593Smuzhiyun rockchip,sleep-debug-en = <0>; 823*4882a593Smuzhiyun rockchip,sleep-mode-config = < 824*4882a593Smuzhiyun (0 825*4882a593Smuzhiyun | RKPM_SLP_ARMPD 826*4882a593Smuzhiyun | RKPM_SLP_PERILPPD 827*4882a593Smuzhiyun | RKPM_SLP_DDR_RET 828*4882a593Smuzhiyun | RKPM_SLP_PLLPD 829*4882a593Smuzhiyun | RKPM_SLP_CENTER_PD 830*4882a593Smuzhiyun | RKPM_SLP_AP_PWROFF 831*4882a593Smuzhiyun ) 832*4882a593Smuzhiyun >; 833*4882a593Smuzhiyun rockchip,wakeup-config = < 834*4882a593Smuzhiyun (0 835*4882a593Smuzhiyun | RKPM_GPIO_WKUP_EN 836*4882a593Smuzhiyun | RKPM_PWM_WKUP_EN 837*4882a593Smuzhiyun ) 838*4882a593Smuzhiyun >; 839*4882a593Smuzhiyun rockchip,pwm-regulator-config = < 840*4882a593Smuzhiyun (0 841*4882a593Smuzhiyun | PWM2_REGULATOR_EN 842*4882a593Smuzhiyun ) 843*4882a593Smuzhiyun >; 844*4882a593Smuzhiyun rockchip,power-ctrl = 845*4882a593Smuzhiyun <&gpio1 17 GPIO_ACTIVE_HIGH>, 846*4882a593Smuzhiyun <&gpio1 14 GPIO_ACTIVE_HIGH>; 847*4882a593Smuzhiyun}; 848*4882a593Smuzhiyun 849*4882a593Smuzhiyun&vopb { 850*4882a593Smuzhiyun assigned-clocks = <&cru DCLK_VOP0_DIV>; 851*4882a593Smuzhiyun assigned-clock-parents = <&cru PLL_VPLL>; 852*4882a593Smuzhiyun}; 853*4882a593Smuzhiyun 854*4882a593Smuzhiyun&vopl { 855*4882a593Smuzhiyun assigned-clocks = <&cru DCLK_VOP1_DIV>; 856*4882a593Smuzhiyun assigned-clock-parents = <&cru PLL_CPLL>; 857*4882a593Smuzhiyun}; 858