1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2022 Rockchip Electronics Co., Ltd. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/dts-v1/; 8*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h> 9*4882a593Smuzhiyun#include <dt-bindings/sensor-dev.h> 10*4882a593Smuzhiyun#include "rk3368.dtsi" 11*4882a593Smuzhiyun#include "rk3368-android.dtsi" 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun/ { 14*4882a593Smuzhiyun es8316-sound { 15*4882a593Smuzhiyun compatible = "simple-audio-card"; 16*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 17*4882a593Smuzhiyun simple-audio-card,name = "rockchip,rk-es8316-codec"; 18*4882a593Smuzhiyun simple-audio-card,mclk-fs = <256>; 19*4882a593Smuzhiyun simple-audio-card,widgets = 20*4882a593Smuzhiyun "Microphone", "Mic Jack", 21*4882a593Smuzhiyun "Headphone", "Headphone Jack"; 22*4882a593Smuzhiyun simple-audio-card,routing = 23*4882a593Smuzhiyun "Mic Jack", "MICBIAS1", 24*4882a593Smuzhiyun "IN1P", "Mic Jack", 25*4882a593Smuzhiyun "Headphone Jack", "HPOL", 26*4882a593Smuzhiyun "Headphone Jack", "HPOR"; 27*4882a593Smuzhiyun simple-audio-card,cpu { 28*4882a593Smuzhiyun sound-dai = <&i2s_8ch>; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun simple-audio-card,codec { 31*4882a593Smuzhiyun sound-dai = <&es8316>; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 36*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 37*4882a593Smuzhiyun clocks = <&rk818 1>; 38*4882a593Smuzhiyun clock-names = "ext_clock"; 39*4882a593Smuzhiyun pinctrl-names = "default"; 40*4882a593Smuzhiyun pinctrl-0 = <&wifi_enable_h>; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun /* 43*4882a593Smuzhiyun * On the module itself this is one of these (depending 44*4882a593Smuzhiyun * on the actual card populated): 45*4882a593Smuzhiyun * - SDIO_RESET_L_WL_REG_ON 46*4882a593Smuzhiyun * - PDN (power down when low) 47*4882a593Smuzhiyun */ 48*4882a593Smuzhiyun reset-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* GPIO3_A4 */ 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun backlight: backlight { 52*4882a593Smuzhiyun compatible = "pwm-backlight"; 53*4882a593Smuzhiyun pwms = <&pwm0 0 25000 0>; 54*4882a593Smuzhiyun brightness-levels = < 55*4882a593Smuzhiyun 0 1 2 3 4 5 6 7 56*4882a593Smuzhiyun 8 9 10 11 12 13 14 15 57*4882a593Smuzhiyun 16 17 18 19 20 21 22 23 58*4882a593Smuzhiyun 24 25 26 27 28 29 30 31 59*4882a593Smuzhiyun 32 33 34 35 36 37 38 39 60*4882a593Smuzhiyun 40 41 42 43 44 45 46 47 61*4882a593Smuzhiyun 48 49 50 51 52 53 54 55 62*4882a593Smuzhiyun 56 57 58 59 60 61 62 63 63*4882a593Smuzhiyun 64 65 66 67 68 69 70 71 64*4882a593Smuzhiyun 72 73 74 75 76 77 78 79 65*4882a593Smuzhiyun 80 81 82 83 84 85 86 87 66*4882a593Smuzhiyun 88 89 90 91 92 93 94 95 67*4882a593Smuzhiyun 96 97 98 99 100 101 102 103 68*4882a593Smuzhiyun 104 105 106 107 108 109 110 111 69*4882a593Smuzhiyun 112 113 114 115 116 117 118 119 70*4882a593Smuzhiyun 120 121 122 123 124 125 126 127 71*4882a593Smuzhiyun 128 129 130 131 132 133 134 135 72*4882a593Smuzhiyun 136 137 138 139 140 141 142 143 73*4882a593Smuzhiyun 144 145 146 147 148 149 150 151 74*4882a593Smuzhiyun 152 153 154 155 156 157 158 159 75*4882a593Smuzhiyun 160 161 162 163 164 165 166 167 76*4882a593Smuzhiyun 168 169 170 171 172 173 174 175 77*4882a593Smuzhiyun 176 177 178 179 180 181 182 183 78*4882a593Smuzhiyun 184 185 186 187 188 189 190 191 79*4882a593Smuzhiyun 192 193 194 195 196 197 198 199 80*4882a593Smuzhiyun 200 201 202 203 204 205 206 207 81*4882a593Smuzhiyun 208 209 210 211 212 213 214 215 82*4882a593Smuzhiyun 216 217 218 219 220 221 222 223 83*4882a593Smuzhiyun 224 225 226 227 228 229 230 231 84*4882a593Smuzhiyun 232 233 234 235 236 237 238 239 85*4882a593Smuzhiyun 240 241 242 243 244 245 246 247 86*4882a593Smuzhiyun 248 249 250 251 252 253 254 255>; 87*4882a593Smuzhiyun default-brightness-level = <200>; 88*4882a593Smuzhiyun enable-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun charge-animation { 92*4882a593Smuzhiyun compatible = "rockchip,uboot-charge"; 93*4882a593Smuzhiyun rockchip,uboot-charge-on = <1>; 94*4882a593Smuzhiyun rockchip,android-charge-on = <0>; 95*4882a593Smuzhiyun rockchip,uboot-low-power-voltage = <3500>; 96*4882a593Smuzhiyun rockchip,screen-on-voltage = <3600>; 97*4882a593Smuzhiyun status = "okay"; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun rk_key: rockchip-key { 101*4882a593Smuzhiyun compatible = "rockchip,key"; 102*4882a593Smuzhiyun status = "okay"; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun io-channels = <&saradc 1>; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun vol-up-key { 107*4882a593Smuzhiyun linux,code = <115>; 108*4882a593Smuzhiyun label = "volume up"; 109*4882a593Smuzhiyun rockchip,adc_value = <1>; 110*4882a593Smuzhiyun }; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun vol-down-key { 113*4882a593Smuzhiyun linux,code = <114>; 114*4882a593Smuzhiyun label = "volume down"; 115*4882a593Smuzhiyun rockchip,adc_value = <170>; 116*4882a593Smuzhiyun }; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun power-key { 119*4882a593Smuzhiyun gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; 120*4882a593Smuzhiyun linux,code = <116>; 121*4882a593Smuzhiyun label = "power"; 122*4882a593Smuzhiyun gpio-key,wakeup; 123*4882a593Smuzhiyun }; 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun wireless-wlan { 127*4882a593Smuzhiyun compatible = "wlan-platdata"; 128*4882a593Smuzhiyun rockchip,grf = <&grf>; 129*4882a593Smuzhiyun /* wifi_chip_type - wifi chip define 130*4882a593Smuzhiyun * ap6210, ap6330, ap6335 131*4882a593Smuzhiyun * rtl8188eu, rtl8723bs, rtl8723bu 132*4882a593Smuzhiyun * esp8089 133*4882a593Smuzhiyun */ 134*4882a593Smuzhiyun wifi_chip_type = "ap6210"; 135*4882a593Smuzhiyun sdio_vref = <1800>; //1800mv or 3300mv 136*4882a593Smuzhiyun WIFI,host_wake_irq = <&gpio3 6 GPIO_ACTIVE_HIGH>; 137*4882a593Smuzhiyun status = "okay"; 138*4882a593Smuzhiyun }; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun wireless-bluetooth { 141*4882a593Smuzhiyun compatible = "bluetooth-platdata"; 142*4882a593Smuzhiyun clocks = <&rk818 1>; 143*4882a593Smuzhiyun clock-names = "ext_clock"; 144*4882a593Smuzhiyun uart_rts_gpios = <&gpio2 27 GPIO_ACTIVE_LOW>; 145*4882a593Smuzhiyun pinctrl-names = "default","rts_gpio"; 146*4882a593Smuzhiyun pinctrl-0 = <&uart0_rts>; 147*4882a593Smuzhiyun pinctrl-1 = <&uart0_rts_gpio>; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun //BT,power_gpio = <&gpio3 3 GPIO_ACTIVE_HIGH>; 150*4882a593Smuzhiyun BT,reset_gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>; 151*4882a593Smuzhiyun BT,wake_gpio = <&gpio3 2 GPIO_ACTIVE_HIGH>; 152*4882a593Smuzhiyun BT,wake_host_irq = <&gpio3 7 GPIO_ACTIVE_HIGH>; 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun status = "okay"; 155*4882a593Smuzhiyun }; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun vcc_sys: vcc-sys { 158*4882a593Smuzhiyun compatible = "regulator-fixed"; 159*4882a593Smuzhiyun regulator-name = "vcc_sys"; 160*4882a593Smuzhiyun regulator-always-on; 161*4882a593Smuzhiyun regulator-boot-on; 162*4882a593Smuzhiyun regulator-min-microvolt = <3800000>; 163*4882a593Smuzhiyun regulator-max-microvolt = <3800000>; 164*4882a593Smuzhiyun }; 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun vcc_host: vcc-host { 167*4882a593Smuzhiyun compatible = "regulator-fixed"; 168*4882a593Smuzhiyun enable-active-high; 169*4882a593Smuzhiyun gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>; 170*4882a593Smuzhiyun pinctrl-names = "default"; 171*4882a593Smuzhiyun pinctrl-0 = <&host_vbus_drv>; 172*4882a593Smuzhiyun regulator-name = "vcc_host"; 173*4882a593Smuzhiyun regulator-always-on; 174*4882a593Smuzhiyun }; 175*4882a593Smuzhiyun 176*4882a593Smuzhiyun xin32k: xin32k { 177*4882a593Smuzhiyun compatible = "fixed-clock"; 178*4882a593Smuzhiyun clock-frequency = <32768>; 179*4882a593Smuzhiyun clock-output-names = "xin32k"; 180*4882a593Smuzhiyun #clock-cells = <0>; 181*4882a593Smuzhiyun }; 182*4882a593Smuzhiyun}; 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun&cpu_l0 { 185*4882a593Smuzhiyun cpu-supply = <&syr827>; 186*4882a593Smuzhiyun}; 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun&cpu_l1 { 189*4882a593Smuzhiyun cpu-supply = <&syr827>; 190*4882a593Smuzhiyun}; 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun&cpu_l2 { 193*4882a593Smuzhiyun cpu-supply = <&syr827>; 194*4882a593Smuzhiyun}; 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun&cpu_l3 { 197*4882a593Smuzhiyun cpu-supply = <&syr827>; 198*4882a593Smuzhiyun}; 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun&cpu_b0 { 201*4882a593Smuzhiyun cpu-supply = <&syr827>; 202*4882a593Smuzhiyun}; 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun&cpu_b1 { 205*4882a593Smuzhiyun cpu-supply = <&syr827>; 206*4882a593Smuzhiyun}; 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun&cpu_b2 { 209*4882a593Smuzhiyun cpu-supply = <&syr827>; 210*4882a593Smuzhiyun}; 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun&cpu_b3 { 213*4882a593Smuzhiyun cpu-supply = <&syr827>; 214*4882a593Smuzhiyun}; 215*4882a593Smuzhiyun 216*4882a593Smuzhiyun&gpu { 217*4882a593Smuzhiyun logic-supply = <&vdd_logic>; 218*4882a593Smuzhiyun}; 219*4882a593Smuzhiyun 220*4882a593Smuzhiyun&rockchip_suspend { 221*4882a593Smuzhiyun status = "okay"; 222*4882a593Smuzhiyun rockchip,sleep-mode-config = < 223*4882a593Smuzhiyun (0 224*4882a593Smuzhiyun | RKPM_SLP_ARMOFF 225*4882a593Smuzhiyun | RKPM_SLP_PMU_PLLS_PWRDN 226*4882a593Smuzhiyun | RKPM_SLP_PMU_PMUALIVE_32K 227*4882a593Smuzhiyun | RKPM_SLP_SFT_PLLS_DEEP 228*4882a593Smuzhiyun | RKPM_SLP_PMU_DIS_OSC 229*4882a593Smuzhiyun | RKPM_SLP_SFT_PD_NBSCUS 230*4882a593Smuzhiyun ) 231*4882a593Smuzhiyun >; 232*4882a593Smuzhiyun rockchip,wakeup-config = < 233*4882a593Smuzhiyun (0 234*4882a593Smuzhiyun | RKPM_GPIO_WKUP_EN 235*4882a593Smuzhiyun | RKPM_USB_WKUP_EN 236*4882a593Smuzhiyun | RKPM_CLUSTER_L_WKUP_EN 237*4882a593Smuzhiyun ) 238*4882a593Smuzhiyun >; 239*4882a593Smuzhiyun}; 240*4882a593Smuzhiyun 241*4882a593Smuzhiyun&emmc { 242*4882a593Smuzhiyun bus-width = <8>; 243*4882a593Smuzhiyun cap-mmc-highspeed; 244*4882a593Smuzhiyun mmc-hs200-1_8v; 245*4882a593Smuzhiyun no-sdio; 246*4882a593Smuzhiyun no-sd; 247*4882a593Smuzhiyun disable-wp; 248*4882a593Smuzhiyun non-removable; 249*4882a593Smuzhiyun num-slots = <1>; 250*4882a593Smuzhiyun pinctrl-names = "default"; 251*4882a593Smuzhiyun pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; 252*4882a593Smuzhiyun status = "okay"; 253*4882a593Smuzhiyun}; 254*4882a593Smuzhiyun 255*4882a593Smuzhiyun&nandc0 { 256*4882a593Smuzhiyun status = "disabled"; 257*4882a593Smuzhiyun}; 258*4882a593Smuzhiyun 259*4882a593Smuzhiyun&sdmmc { 260*4882a593Smuzhiyun clock-frequency = <37500000>; 261*4882a593Smuzhiyun clock-freq-min-max = <400000 37500000>; 262*4882a593Smuzhiyun no-sdio; 263*4882a593Smuzhiyun no-mmc; 264*4882a593Smuzhiyun cap-mmc-highspeed; 265*4882a593Smuzhiyun cap-sd-highspeed; 266*4882a593Smuzhiyun card-detect-delay = <200>; 267*4882a593Smuzhiyun disable-wp; 268*4882a593Smuzhiyun num-slots = <1>; 269*4882a593Smuzhiyun pinctrl-names = "default"; 270*4882a593Smuzhiyun pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; 271*4882a593Smuzhiyun status = "disabled"; 272*4882a593Smuzhiyun}; 273*4882a593Smuzhiyun 274*4882a593Smuzhiyun&sdio0 { 275*4882a593Smuzhiyun clock-frequency = <50000000>; 276*4882a593Smuzhiyun clock-freq-min-max = <200000 50000000>; 277*4882a593Smuzhiyun no-sd; 278*4882a593Smuzhiyun no-mmc; 279*4882a593Smuzhiyun bus-width = <4>; 280*4882a593Smuzhiyun disable-wp; 281*4882a593Smuzhiyun cap-sd-highspeed; 282*4882a593Smuzhiyun cap-sdio-irq; 283*4882a593Smuzhiyun keep-power-in-suspend; 284*4882a593Smuzhiyun mmc-pwrseq = <&sdio_pwrseq>; 285*4882a593Smuzhiyun non-removable; 286*4882a593Smuzhiyun num-slots = <1>; 287*4882a593Smuzhiyun pinctrl-names = "default"; 288*4882a593Smuzhiyun pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; 289*4882a593Smuzhiyun sd-uhs-sdr104; 290*4882a593Smuzhiyun status = "okay"; 291*4882a593Smuzhiyun}; 292*4882a593Smuzhiyun 293*4882a593Smuzhiyun&i2c0 { 294*4882a593Smuzhiyun status = "okay"; 295*4882a593Smuzhiyun 296*4882a593Smuzhiyun syr827: syr827@40 { 297*4882a593Smuzhiyun compatible = "silergy,syr827"; 298*4882a593Smuzhiyun status = "okay"; 299*4882a593Smuzhiyun reg = <0x40>; 300*4882a593Smuzhiyun regulator-compatible = "fan53555-reg"; 301*4882a593Smuzhiyun regulator-name = "vdd_arm"; 302*4882a593Smuzhiyun regulator-min-microvolt = <712500>; 303*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 304*4882a593Smuzhiyun regulator-ramp-delay = <1000>; 305*4882a593Smuzhiyun fcs,suspend-voltage-selector = <1>; 306*4882a593Smuzhiyun pinctrl-0 = <&vsel_gpio>; 307*4882a593Smuzhiyun vsel-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; 308*4882a593Smuzhiyun regulator-always-on; 309*4882a593Smuzhiyun regulator-boot-on; 310*4882a593Smuzhiyun regulator-initial-state = <3>; 311*4882a593Smuzhiyun regulator-state-mem { 312*4882a593Smuzhiyun regulator-off-in-suspend; 313*4882a593Smuzhiyun regulator-suspend-microvolt = <900000>; 314*4882a593Smuzhiyun }; 315*4882a593Smuzhiyun }; 316*4882a593Smuzhiyun 317*4882a593Smuzhiyun rk818: pmic@1c { 318*4882a593Smuzhiyun compatible = "rockchip,rk818"; 319*4882a593Smuzhiyun status = "okay"; 320*4882a593Smuzhiyun reg = <0x1c>; 321*4882a593Smuzhiyun clock-output-names = "rk818-clkout1", "wifibt_32kin"; 322*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 323*4882a593Smuzhiyun interrupts = <1 IRQ_TYPE_LEVEL_LOW>; 324*4882a593Smuzhiyun pinctrl-names = "default"; 325*4882a593Smuzhiyun pinctrl-0 = <&pmic_int_l>; 326*4882a593Smuzhiyun rockchip,system-power-controller; 327*4882a593Smuzhiyun wakeup-source; 328*4882a593Smuzhiyun #clock-cells = <1>; 329*4882a593Smuzhiyun 330*4882a593Smuzhiyun vcc1-supply = <&vcc_sys>; 331*4882a593Smuzhiyun vcc2-supply = <&vcc_sys>; 332*4882a593Smuzhiyun vcc3-supply = <&vcc_sys>; 333*4882a593Smuzhiyun vcc4-supply = <&vcc_sys>; 334*4882a593Smuzhiyun vcc6-supply = <&vcc_sys>; 335*4882a593Smuzhiyun vcc7-supply = <&vcc_sys>; 336*4882a593Smuzhiyun vcc8-supply = <&vcc_sys>; 337*4882a593Smuzhiyun vcc9-supply = <&vcc_io>; 338*4882a593Smuzhiyun 339*4882a593Smuzhiyun regulators { 340*4882a593Smuzhiyun vdd_logic: DCDC_REG1 { 341*4882a593Smuzhiyun regulator-name = "vdd_logic"; 342*4882a593Smuzhiyun regulator-always-on; 343*4882a593Smuzhiyun regulator-boot-on; 344*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 345*4882a593Smuzhiyun regulator-max-microvolt = <1450000>; 346*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 347*4882a593Smuzhiyun regulator-state-mem { 348*4882a593Smuzhiyun regulator-on-in-suspend; 349*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 350*4882a593Smuzhiyun }; 351*4882a593Smuzhiyun }; 352*4882a593Smuzhiyun 353*4882a593Smuzhiyun vdd_gpu: DCDC_REG2 { 354*4882a593Smuzhiyun regulator-name = "vdd_gpu"; 355*4882a593Smuzhiyun regulator-always-on; 356*4882a593Smuzhiyun regulator-boot-on; 357*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 358*4882a593Smuzhiyun regulator-max-microvolt = <1250000>; 359*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 360*4882a593Smuzhiyun regulator-state-mem { 361*4882a593Smuzhiyun regulator-on-in-suspend; 362*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 363*4882a593Smuzhiyun }; 364*4882a593Smuzhiyun }; 365*4882a593Smuzhiyun 366*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 367*4882a593Smuzhiyun regulator-always-on; 368*4882a593Smuzhiyun regulator-boot-on; 369*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 370*4882a593Smuzhiyun regulator-state-mem { 371*4882a593Smuzhiyun regulator-on-in-suspend; 372*4882a593Smuzhiyun }; 373*4882a593Smuzhiyun }; 374*4882a593Smuzhiyun 375*4882a593Smuzhiyun vcc_io: DCDC_REG4 { 376*4882a593Smuzhiyun regulator-always-on; 377*4882a593Smuzhiyun regulator-boot-on; 378*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 379*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 380*4882a593Smuzhiyun regulator-name = "vcc_io"; 381*4882a593Smuzhiyun regulator-state-mem { 382*4882a593Smuzhiyun regulator-on-in-suspend; 383*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 384*4882a593Smuzhiyun }; 385*4882a593Smuzhiyun }; 386*4882a593Smuzhiyun 387*4882a593Smuzhiyun vcca_codec: LDO_REG1 { 388*4882a593Smuzhiyun regulator-always-on; 389*4882a593Smuzhiyun regulator-boot-on; 390*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 391*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 392*4882a593Smuzhiyun regulator-name = "vcca_codec"; 393*4882a593Smuzhiyun regulator-state-mem { 394*4882a593Smuzhiyun regulator-on-in-suspend; 395*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 396*4882a593Smuzhiyun }; 397*4882a593Smuzhiyun }; 398*4882a593Smuzhiyun 399*4882a593Smuzhiyun vcc_tp: LDO_REG2 { 400*4882a593Smuzhiyun regulator-boot-on; 401*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 402*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 403*4882a593Smuzhiyun regulator-name = "vcc_tp"; 404*4882a593Smuzhiyun regulator-state-mem { 405*4882a593Smuzhiyun regulator-off-in-suspend; 406*4882a593Smuzhiyun }; 407*4882a593Smuzhiyun }; 408*4882a593Smuzhiyun 409*4882a593Smuzhiyun vdd_10: LDO_REG3 { 410*4882a593Smuzhiyun regulator-always-on; 411*4882a593Smuzhiyun regulator-boot-on; 412*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 413*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 414*4882a593Smuzhiyun regulator-name = "vdd_10"; 415*4882a593Smuzhiyun regulator-state-mem { 416*4882a593Smuzhiyun regulator-on-in-suspend; 417*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 418*4882a593Smuzhiyun }; 419*4882a593Smuzhiyun }; 420*4882a593Smuzhiyun 421*4882a593Smuzhiyun vcc18_lcd: LDO_REG4 { 422*4882a593Smuzhiyun regulator-always-on; 423*4882a593Smuzhiyun regulator-boot-on; 424*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 425*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 426*4882a593Smuzhiyun regulator-name = "vcc18_lcd"; 427*4882a593Smuzhiyun regulator-state-mem { 428*4882a593Smuzhiyun regulator-on-in-suspend; 429*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 430*4882a593Smuzhiyun }; 431*4882a593Smuzhiyun }; 432*4882a593Smuzhiyun 433*4882a593Smuzhiyun vccio_pmu: LDO_REG5 { 434*4882a593Smuzhiyun regulator-always-on; 435*4882a593Smuzhiyun regulator-boot-on; 436*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 437*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 438*4882a593Smuzhiyun regulator-name = "vccio_pmu"; 439*4882a593Smuzhiyun regulator-state-mem { 440*4882a593Smuzhiyun regulator-on-in-suspend; 441*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 442*4882a593Smuzhiyun }; 443*4882a593Smuzhiyun }; 444*4882a593Smuzhiyun 445*4882a593Smuzhiyun vdd10_lcd: LDO_REG6 { 446*4882a593Smuzhiyun regulator-always-on; 447*4882a593Smuzhiyun regulator-boot-on; 448*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 449*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 450*4882a593Smuzhiyun regulator-name = "vdd10_lcd"; 451*4882a593Smuzhiyun regulator-state-mem { 452*4882a593Smuzhiyun regulator-on-in-suspend; 453*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 454*4882a593Smuzhiyun }; 455*4882a593Smuzhiyun }; 456*4882a593Smuzhiyun 457*4882a593Smuzhiyun vcc_18: LDO_REG7 { 458*4882a593Smuzhiyun regulator-always-on; 459*4882a593Smuzhiyun regulator-boot-on; 460*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 461*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 462*4882a593Smuzhiyun regulator-name = "vcc_18"; 463*4882a593Smuzhiyun regulator-state-mem { 464*4882a593Smuzhiyun regulator-on-in-suspend; 465*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 466*4882a593Smuzhiyun }; 467*4882a593Smuzhiyun }; 468*4882a593Smuzhiyun 469*4882a593Smuzhiyun vccio_wl: LDO_REG8 { 470*4882a593Smuzhiyun regulator-always-on; 471*4882a593Smuzhiyun regulator-boot-on; 472*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 473*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 474*4882a593Smuzhiyun regulator-name = "vccio_wl"; 475*4882a593Smuzhiyun regulator-state-mem { 476*4882a593Smuzhiyun regulator-on-in-suspend; 477*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 478*4882a593Smuzhiyun }; 479*4882a593Smuzhiyun }; 480*4882a593Smuzhiyun 481*4882a593Smuzhiyun vccio_sd: LDO_REG9 { 482*4882a593Smuzhiyun regulator-always-on; 483*4882a593Smuzhiyun regulator-boot-on; 484*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 485*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 486*4882a593Smuzhiyun regulator-name = "vccio_sd"; 487*4882a593Smuzhiyun regulator-state-mem { 488*4882a593Smuzhiyun regulator-on-in-suspend; 489*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 490*4882a593Smuzhiyun }; 491*4882a593Smuzhiyun }; 492*4882a593Smuzhiyun 493*4882a593Smuzhiyun vcc_sd: SWITCH_REG { 494*4882a593Smuzhiyun regulator-always-on; 495*4882a593Smuzhiyun regulator-boot-on; 496*4882a593Smuzhiyun regulator-name = "vcc_sd"; 497*4882a593Smuzhiyun regulator-state-mem { 498*4882a593Smuzhiyun regulator-on-in-suspend; 499*4882a593Smuzhiyun }; 500*4882a593Smuzhiyun }; 501*4882a593Smuzhiyun 502*4882a593Smuzhiyun boost_otg: DCDC_BOOST { 503*4882a593Smuzhiyun regulator-name = "boost_otg"; 504*4882a593Smuzhiyun regulator-always-on; 505*4882a593Smuzhiyun regulator-boot-on; 506*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 507*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 508*4882a593Smuzhiyun regulator-state-mem { 509*4882a593Smuzhiyun regulator-on-in-suspend; 510*4882a593Smuzhiyun regulator-suspend-microvolt = <5000000>; 511*4882a593Smuzhiyun }; 512*4882a593Smuzhiyun }; 513*4882a593Smuzhiyun 514*4882a593Smuzhiyun otg_switch: OTG_SWITCH { 515*4882a593Smuzhiyun regulator-name = "otg_switch"; 516*4882a593Smuzhiyun }; 517*4882a593Smuzhiyun 518*4882a593Smuzhiyun hdmi_switch: HDMI_SWITCH { 519*4882a593Smuzhiyun regulator-always-on; 520*4882a593Smuzhiyun regulator-boot-on; 521*4882a593Smuzhiyun regulator-name = "hdmi_switch"; 522*4882a593Smuzhiyun regulator-state-mem { 523*4882a593Smuzhiyun regulator-off-in-suspend; 524*4882a593Smuzhiyun }; 525*4882a593Smuzhiyun }; 526*4882a593Smuzhiyun }; 527*4882a593Smuzhiyun 528*4882a593Smuzhiyun battery { 529*4882a593Smuzhiyun compatible = "rk818-battery"; 530*4882a593Smuzhiyun pinctrl-names = "default"; 531*4882a593Smuzhiyun pinctrl-0 = <&dc_irq_gpio>; 532*4882a593Smuzhiyun ocv_table = < 533*4882a593Smuzhiyun 3400 3650 3693 3707 3731 3749 3760 534*4882a593Smuzhiyun 3770 3782 3796 3812 3829 3852 3882 535*4882a593Smuzhiyun 3915 3951 3981 4047 4086 4132 4182>; 536*4882a593Smuzhiyun design_capacity = <8650>; 537*4882a593Smuzhiyun design_qmax = <8800>; 538*4882a593Smuzhiyun bat_res = <85>; 539*4882a593Smuzhiyun max_input_current = <2000>; 540*4882a593Smuzhiyun max_chrg_current = <1800>; 541*4882a593Smuzhiyun max_chrg_voltage = <4200>; 542*4882a593Smuzhiyun sleep_enter_current = <600>; 543*4882a593Smuzhiyun sleep_exit_current = <600>; 544*4882a593Smuzhiyun power_off_thresd = <3400>; 545*4882a593Smuzhiyun zero_algorithm_vol = <3850>; 546*4882a593Smuzhiyun fb_temperature = <115>; 547*4882a593Smuzhiyun sample_res = <20>; 548*4882a593Smuzhiyun max_soc_offset = <60>; 549*4882a593Smuzhiyun energy_mode = <0>; 550*4882a593Smuzhiyun monitor_sec = <5>; 551*4882a593Smuzhiyun virtual_power = <0>; 552*4882a593Smuzhiyun power_dc2otg = <1>; 553*4882a593Smuzhiyun support_usb_adp = <1>; 554*4882a593Smuzhiyun support_dc_adp = <1>; 555*4882a593Smuzhiyun dc_det_gpio = <&gpio0 17 GPIO_ACTIVE_LOW>; 556*4882a593Smuzhiyun }; 557*4882a593Smuzhiyun }; 558*4882a593Smuzhiyun}; 559*4882a593Smuzhiyun 560*4882a593Smuzhiyun&i2c1 { 561*4882a593Smuzhiyun status = "okay"; 562*4882a593Smuzhiyun 563*4882a593Smuzhiyun es8316: es8316@10 { 564*4882a593Smuzhiyun status = "okay"; 565*4882a593Smuzhiyun #sound-dai-cells = <0>; 566*4882a593Smuzhiyun compatible = "everest,es8316"; 567*4882a593Smuzhiyun reg = <0x10>; 568*4882a593Smuzhiyun clocks = <&cru SCLK_I2S_8CH_OUT>; 569*4882a593Smuzhiyun clock-names = "mclk"; 570*4882a593Smuzhiyun spk-con-gpio = <&gpio0 27 GPIO_ACTIVE_HIGH>; 571*4882a593Smuzhiyun hp-det-gpio = <&gpio0 23 GPIO_ACTIVE_HIGH>; 572*4882a593Smuzhiyun pinctrl-names = "default"; 573*4882a593Smuzhiyun pinctrl-0 = <&i2s_8ch_mclk>; 574*4882a593Smuzhiyun }; 575*4882a593Smuzhiyun}; 576*4882a593Smuzhiyun 577*4882a593Smuzhiyun&i2c2 { 578*4882a593Smuzhiyun status = "okay"; 579*4882a593Smuzhiyun 580*4882a593Smuzhiyun gt9xx: gt9xx@14 { 581*4882a593Smuzhiyun compatible = "goodix,gt9xx"; 582*4882a593Smuzhiyun reg = <0x14>; 583*4882a593Smuzhiyun touch-gpio = <&gpio0 12 IRQ_TYPE_LEVEL_LOW>; 584*4882a593Smuzhiyun reset-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>; 585*4882a593Smuzhiyun max-x = <1920>; 586*4882a593Smuzhiyun max-y = <1200>; 587*4882a593Smuzhiyun tp-size = <89>; 588*4882a593Smuzhiyun status = "okay"; 589*4882a593Smuzhiyun tp-supply = <&vcc_tp>; 590*4882a593Smuzhiyun }; 591*4882a593Smuzhiyun}; 592*4882a593Smuzhiyun 593*4882a593Smuzhiyun&i2c3 { 594*4882a593Smuzhiyun status = "okay"; 595*4882a593Smuzhiyun}; 596*4882a593Smuzhiyun 597*4882a593Smuzhiyun&i2c4 { 598*4882a593Smuzhiyun status = "okay"; 599*4882a593Smuzhiyun 600*4882a593Smuzhiyun mpu6500_acc: mpu_acc@68 { 601*4882a593Smuzhiyun compatible = "mpu6500_acc"; 602*4882a593Smuzhiyun reg = <0x68>; 603*4882a593Smuzhiyun irq-gpio = <&gpio3 14 IRQ_TYPE_LEVEL_LOW>; 604*4882a593Smuzhiyun irq_enable = <0>; 605*4882a593Smuzhiyun poll_delay_ms = <30>; 606*4882a593Smuzhiyun type = <SENSOR_TYPE_ACCEL>; 607*4882a593Smuzhiyun layout = <7>; 608*4882a593Smuzhiyun }; 609*4882a593Smuzhiyun 610*4882a593Smuzhiyun mpu6500_gyro: mpu_gyro@68 { 611*4882a593Smuzhiyun compatible = "mpu6500_gyro"; 612*4882a593Smuzhiyun reg = <0x68>; 613*4882a593Smuzhiyun irq_enable = <0>; 614*4882a593Smuzhiyun poll_delay_ms = <30>; 615*4882a593Smuzhiyun type = <SENSOR_TYPE_GYROSCOPE>; 616*4882a593Smuzhiyun layout = <7>; 617*4882a593Smuzhiyun }; 618*4882a593Smuzhiyun 619*4882a593Smuzhiyun mpu6500@68 { 620*4882a593Smuzhiyun status = "disabled"; 621*4882a593Smuzhiyun compatible = "invensense,mpu6500"; 622*4882a593Smuzhiyun pinctrl-names = "default"; 623*4882a593Smuzhiyun pinctrl-0 = <&mpu6500_irq_gpio>; 624*4882a593Smuzhiyun reg = <0x68>; 625*4882a593Smuzhiyun irq-gpio = <&gpio3 14 IRQ_TYPE_EDGE_RISING>; 626*4882a593Smuzhiyun mpu-int_config = <0x10>; 627*4882a593Smuzhiyun mpu-level_shifter = <0>; 628*4882a593Smuzhiyun mpu-orientation = <1 0 0 0 1 0 0 0 1>; 629*4882a593Smuzhiyun orientation-x= <1>; 630*4882a593Smuzhiyun orientation-y= <0>; 631*4882a593Smuzhiyun orientation-z= <1>; 632*4882a593Smuzhiyun support-hw-poweroff = <1>; 633*4882a593Smuzhiyun mpu-debug = <1>; 634*4882a593Smuzhiyun }; 635*4882a593Smuzhiyun}; 636*4882a593Smuzhiyun 637*4882a593Smuzhiyun&i2s_8ch { 638*4882a593Smuzhiyun status = "okay"; 639*4882a593Smuzhiyun rockchip,i2s-broken-burst-len; 640*4882a593Smuzhiyun rockchip,playback-channels = <8>; 641*4882a593Smuzhiyun rockchip,capture-channels = <2>; 642*4882a593Smuzhiyun #sound-dai-cells = <0>; 643*4882a593Smuzhiyun}; 644*4882a593Smuzhiyun 645*4882a593Smuzhiyun&io_domains { 646*4882a593Smuzhiyun status = "okay"; 647*4882a593Smuzhiyun 648*4882a593Smuzhiyun dvp-supply = <&vcc_18>; 649*4882a593Smuzhiyun audio-supply = <&vcc_io>; 650*4882a593Smuzhiyun gpio30-supply = <&vcc_io>; 651*4882a593Smuzhiyun gpio1830-supply = <&vcc_io>; 652*4882a593Smuzhiyun sdcard-supply = <&vccio_sd>; 653*4882a593Smuzhiyun wifi-supply = <&vccio_wl>; 654*4882a593Smuzhiyun}; 655*4882a593Smuzhiyun 656*4882a593Smuzhiyun&pmu_io_domains { 657*4882a593Smuzhiyun status = "okay"; 658*4882a593Smuzhiyun 659*4882a593Smuzhiyun pmu-supply = <&vccio_pmu>; 660*4882a593Smuzhiyun vop-supply = <&vccio_pmu>; 661*4882a593Smuzhiyun}; 662*4882a593Smuzhiyun 663*4882a593Smuzhiyun&pwm0 { 664*4882a593Smuzhiyun status = "okay"; 665*4882a593Smuzhiyun}; 666*4882a593Smuzhiyun 667*4882a593Smuzhiyun&uart0 { 668*4882a593Smuzhiyun pinctrl-names = "default"; 669*4882a593Smuzhiyun pinctrl-0 = <&uart0_xfer &uart0_cts>; 670*4882a593Smuzhiyun status = "okay"; 671*4882a593Smuzhiyun}; 672*4882a593Smuzhiyun 673*4882a593Smuzhiyun&saradc { 674*4882a593Smuzhiyun status = "okay"; 675*4882a593Smuzhiyun}; 676*4882a593Smuzhiyun 677*4882a593Smuzhiyun&u2phy { 678*4882a593Smuzhiyun status = "okay"; 679*4882a593Smuzhiyun 680*4882a593Smuzhiyun u2phy_host: host-port { 681*4882a593Smuzhiyun phy-supply = <&vcc_host>; 682*4882a593Smuzhiyun status = "okay"; 683*4882a593Smuzhiyun }; 684*4882a593Smuzhiyun}; 685*4882a593Smuzhiyun 686*4882a593Smuzhiyun&usb_host0_ehci { 687*4882a593Smuzhiyun status = "okay"; 688*4882a593Smuzhiyun}; 689*4882a593Smuzhiyun 690*4882a593Smuzhiyun&usb_host0_ohci { 691*4882a593Smuzhiyun status = "okay"; 692*4882a593Smuzhiyun}; 693*4882a593Smuzhiyun 694*4882a593Smuzhiyun&dsi { 695*4882a593Smuzhiyun status = "okay"; 696*4882a593Smuzhiyun 697*4882a593Smuzhiyun panel@0 { 698*4882a593Smuzhiyun compatible = "simple-panel-dsi"; 699*4882a593Smuzhiyun reg = <0>; 700*4882a593Smuzhiyun backlight = <&backlight>; 701*4882a593Smuzhiyun enable-gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>; 702*4882a593Smuzhiyun prepare-delay-ms = <120>; 703*4882a593Smuzhiyun enable-delay-ms = <200>; 704*4882a593Smuzhiyun 705*4882a593Smuzhiyun dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 706*4882a593Smuzhiyun MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; 707*4882a593Smuzhiyun dsi,format = <MIPI_DSI_FMT_RGB888>; 708*4882a593Smuzhiyun dsi,lanes = <4>; 709*4882a593Smuzhiyun 710*4882a593Smuzhiyun display-timings { 711*4882a593Smuzhiyun native-mode = <&timing0>; 712*4882a593Smuzhiyun 713*4882a593Smuzhiyun timing0: timing0 { 714*4882a593Smuzhiyun clock-frequency = <145000000>; 715*4882a593Smuzhiyun hactive = <1920>; 716*4882a593Smuzhiyun vactive = <1200>; 717*4882a593Smuzhiyun hback-porch = <16>; 718*4882a593Smuzhiyun hfront-porch = <24>; 719*4882a593Smuzhiyun vback-porch = <10>; 720*4882a593Smuzhiyun vfront-porch = <16>; 721*4882a593Smuzhiyun hsync-len = <10>; 722*4882a593Smuzhiyun vsync-len = <3>; 723*4882a593Smuzhiyun hsync-active = <0>; 724*4882a593Smuzhiyun vsync-active = <0>; 725*4882a593Smuzhiyun de-active = <0>; 726*4882a593Smuzhiyun pixelclk-active = <0>; 727*4882a593Smuzhiyun }; 728*4882a593Smuzhiyun }; 729*4882a593Smuzhiyun 730*4882a593Smuzhiyun ports { 731*4882a593Smuzhiyun #address-cells = <1>; 732*4882a593Smuzhiyun #size-cells = <0>; 733*4882a593Smuzhiyun 734*4882a593Smuzhiyun port@0 { 735*4882a593Smuzhiyun reg = <0>; 736*4882a593Smuzhiyun panel_in_dsi: endpoint { 737*4882a593Smuzhiyun remote-endpoint = <&dsi_out_panel>; 738*4882a593Smuzhiyun }; 739*4882a593Smuzhiyun }; 740*4882a593Smuzhiyun }; 741*4882a593Smuzhiyun }; 742*4882a593Smuzhiyun 743*4882a593Smuzhiyun ports { 744*4882a593Smuzhiyun #address-cells = <1>; 745*4882a593Smuzhiyun #size-cells = <0>; 746*4882a593Smuzhiyun 747*4882a593Smuzhiyun port@1 { 748*4882a593Smuzhiyun reg = <1>; 749*4882a593Smuzhiyun dsi_out_panel: endpoint { 750*4882a593Smuzhiyun remote-endpoint = <&panel_in_dsi>; 751*4882a593Smuzhiyun }; 752*4882a593Smuzhiyun }; 753*4882a593Smuzhiyun }; 754*4882a593Smuzhiyun}; 755*4882a593Smuzhiyun 756*4882a593Smuzhiyun&route_dsi { 757*4882a593Smuzhiyun status = "okay"; 758*4882a593Smuzhiyun}; 759*4882a593Smuzhiyun 760*4882a593Smuzhiyun&tsadc { 761*4882a593Smuzhiyun tsadc-supply = <&syr827>; 762*4882a593Smuzhiyun status = "okay"; 763*4882a593Smuzhiyun}; 764*4882a593Smuzhiyun 765*4882a593Smuzhiyun&pinctrl { 766*4882a593Smuzhiyun pmic { 767*4882a593Smuzhiyun pmic_int_l: pmic-int-l { 768*4882a593Smuzhiyun rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; 769*4882a593Smuzhiyun }; 770*4882a593Smuzhiyun vsel_gpio: vsel-gpio { 771*4882a593Smuzhiyun rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>; 772*4882a593Smuzhiyun }; 773*4882a593Smuzhiyun }; 774*4882a593Smuzhiyun 775*4882a593Smuzhiyun mpu6500 { 776*4882a593Smuzhiyun mpu6500_irq_gpio: mpu6500-irq-gpio { 777*4882a593Smuzhiyun rockchip,pins = <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; 778*4882a593Smuzhiyun }; 779*4882a593Smuzhiyun }; 780*4882a593Smuzhiyun 781*4882a593Smuzhiyun dc_det { 782*4882a593Smuzhiyun dc_irq_gpio: dc-irq-gpio { 783*4882a593Smuzhiyun rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; 784*4882a593Smuzhiyun }; 785*4882a593Smuzhiyun }; 786*4882a593Smuzhiyun 787*4882a593Smuzhiyun sdio-pwrseq { 788*4882a593Smuzhiyun wifi_enable_h: wifi-enable-h { 789*4882a593Smuzhiyun rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 790*4882a593Smuzhiyun }; 791*4882a593Smuzhiyun }; 792*4882a593Smuzhiyun 793*4882a593Smuzhiyun usb2 { 794*4882a593Smuzhiyun host_vbus_drv: host-vbus-drv { 795*4882a593Smuzhiyun rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 796*4882a593Smuzhiyun }; 797*4882a593Smuzhiyun }; 798*4882a593Smuzhiyun 799*4882a593Smuzhiyun wireless-bluetooth { 800*4882a593Smuzhiyun uart0_rts_gpio: uart0-rts-gpio { 801*4882a593Smuzhiyun rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; 802*4882a593Smuzhiyun }; 803*4882a593Smuzhiyun }; 804*4882a593Smuzhiyun}; 805*4882a593Smuzhiyun 806