xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm64/rockchip/rk3368-808-evb.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/dts-v1/;
7*4882a593Smuzhiyun#include "rk3368-808.dtsi"
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun/ {
10*4882a593Smuzhiyun	model = "Rockchip rk3368 808 evb board";
11*4882a593Smuzhiyun	compatible = "rockchip,rk3368-808-evb", "rockchip,rk3368";
12*4882a593Smuzhiyun};
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun&chosen {
15*4882a593Smuzhiyun	bootargs = "earlycon=uart8250,mmio32,0xff690000 console=ttyFIQ0 androidboot.baseband=N/A androidboot.veritymode=enforcing androidboot.hardware=rk30board androidboot.console=ttyFIQ0 androidboot.selinux=permissive init=/init kpti=0";
16*4882a593Smuzhiyun};
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun&fiq_debugger {
19*4882a593Smuzhiyun	status = "okay";
20*4882a593Smuzhiyun};
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun&cif {
23*4882a593Smuzhiyun	status = "disabled";
24*4882a593Smuzhiyun};
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun&cif_clkout {
27*4882a593Smuzhiyun	/* cif_clkout */
28*4882a593Smuzhiyun	rockchip,pins = <1 RK_PB3 1 &pcfg_pull_none_4ma>;
29*4882a593Smuzhiyun};
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun&dmc {
32*4882a593Smuzhiyun	vop-dclk-mode = <1>;
33*4882a593Smuzhiyun	status = "okay";
34*4882a593Smuzhiyun};
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun&isp_dvp_d2d9 {
37*4882a593Smuzhiyun	rockchip,pins =
38*4882a593Smuzhiyun			/* cif_data4 ... cif_data9 */
39*4882a593Smuzhiyun			<1 RK_PA2 1 &pcfg_pull_down>,
40*4882a593Smuzhiyun			<1 RK_PA3 1 &pcfg_pull_down>,
41*4882a593Smuzhiyun			<1 RK_PA4 1 &pcfg_pull_down>,
42*4882a593Smuzhiyun			<1 RK_PA5 1 &pcfg_pull_down>,
43*4882a593Smuzhiyun			<1 RK_PA6 1 &pcfg_pull_down>,
44*4882a593Smuzhiyun			<1 RK_PA7 1 &pcfg_pull_down>,
45*4882a593Smuzhiyun			/* cif_sync, cif_href */
46*4882a593Smuzhiyun			<1 RK_PB0 1 &pcfg_pull_down>,
47*4882a593Smuzhiyun			<1 RK_PB1 1 &pcfg_pull_down>,
48*4882a593Smuzhiyun			/* cif_clkin */
49*4882a593Smuzhiyun			<1 RK_PB2 1 &pcfg_pull_down>;
50*4882a593Smuzhiyun};
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun&isp_dvp_d10d11 {
53*4882a593Smuzhiyun	rockchip,pins =
54*4882a593Smuzhiyun			/* cif_data10, cif_data11 */
55*4882a593Smuzhiyun			<1 RK_PB6 1 &pcfg_pull_down>,
56*4882a593Smuzhiyun			<1 RK_PB7 1 &pcfg_pull_down>;
57*4882a593Smuzhiyun};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun&i2c3 {
60*4882a593Smuzhiyun	status = "okay";
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun	gc2145: gc2145@3c {
63*4882a593Smuzhiyun		compatible = "galaxycore,gc2145";
64*4882a593Smuzhiyun		reg = <0x3c>;
65*4882a593Smuzhiyun		clocks = <&cru SCLK_VIP_OUT>;
66*4882a593Smuzhiyun		clock-names = "xvclk";
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun		pinctrl-names = "default";
69*4882a593Smuzhiyun		pinctrl-0 = <&isp_dvp_d2d9 &isp_dvp_d10d11 &cif_clkout>;
70*4882a593Smuzhiyun		power-gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
71*4882a593Smuzhiyun		pwdn-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>;
72*4882a593Smuzhiyun		rockchip,camera-module-index = <1>;
73*4882a593Smuzhiyun		rockchip,camera-module-facing = "front";
74*4882a593Smuzhiyun		rockchip,camera-module-name = "CameraKing";
75*4882a593Smuzhiyun		rockchip,camera-module-lens-name = "Largan";
76*4882a593Smuzhiyun		port {
77*4882a593Smuzhiyun			gc2145_out: endpoint {
78*4882a593Smuzhiyun				remote-endpoint = <&isp_dvp_in>;
79*4882a593Smuzhiyun			};
80*4882a593Smuzhiyun		};
81*4882a593Smuzhiyun	};
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun	ov5695: ov5695@36 {
84*4882a593Smuzhiyun		compatible = "ovti,ov5695";
85*4882a593Smuzhiyun		reg = <0x36>;
86*4882a593Smuzhiyun		clocks = <&cru SCLK_VIP_OUT>;
87*4882a593Smuzhiyun		clock-names = "xvclk";
88*4882a593Smuzhiyun		pwdn-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
89*4882a593Smuzhiyun		pinctrl-names = "default";
90*4882a593Smuzhiyun		pinctrl-0 = <&cif_clkout>;
91*4882a593Smuzhiyun		rockchip,camera-module-index = <0>;
92*4882a593Smuzhiyun		rockchip,camera-module-facing = "back";
93*4882a593Smuzhiyun		rockchip,camera-module-name = "TongJu";
94*4882a593Smuzhiyun		rockchip,camera-module-lens-name = "CHT842-MD";
95*4882a593Smuzhiyun		port {
96*4882a593Smuzhiyun			ov5695_out: endpoint {
97*4882a593Smuzhiyun				remote-endpoint = <&mipi_in>;
98*4882a593Smuzhiyun				data-lanes = <1 2>;
99*4882a593Smuzhiyun			};
100*4882a593Smuzhiyun		};
101*4882a593Smuzhiyun	};
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun};
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun&isp {
106*4882a593Smuzhiyun	status = "disabled";
107*4882a593Smuzhiyun};
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun&isp_mmu {
110*4882a593Smuzhiyun	status = "okay";
111*4882a593Smuzhiyun};
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun&mipi_dphy_rx0 {
114*4882a593Smuzhiyun	status = "okay";
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun	ports {
117*4882a593Smuzhiyun		#address-cells = <1>;
118*4882a593Smuzhiyun		#size-cells = <0>;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun		port@0 {
121*4882a593Smuzhiyun			reg = <0>;
122*4882a593Smuzhiyun			#address-cells = <1>;
123*4882a593Smuzhiyun			#size-cells = <0>;
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun			mipi_in: endpoint@1 {
126*4882a593Smuzhiyun				reg = <1>;
127*4882a593Smuzhiyun				remote-endpoint = <&ov5695_out>;
128*4882a593Smuzhiyun				data-lanes = <1 2>;
129*4882a593Smuzhiyun			};
130*4882a593Smuzhiyun		};
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun		port@1 {
133*4882a593Smuzhiyun			reg = <1>;
134*4882a593Smuzhiyun			#address-cells = <1>;
135*4882a593Smuzhiyun			#size-cells = <0>;
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun			dphy_rx_out: endpoint@0 {
138*4882a593Smuzhiyun				reg = <0>;
139*4882a593Smuzhiyun				remote-endpoint = <&isp_mipi_in>;
140*4882a593Smuzhiyun			};
141*4882a593Smuzhiyun		};
142*4882a593Smuzhiyun	};
143*4882a593Smuzhiyun};
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun&pinctrl {
146*4882a593Smuzhiyun	pcfg_pull_none_4ma: pcfg-pull-none-4ma {
147*4882a593Smuzhiyun		bias-disable;
148*4882a593Smuzhiyun		drive-strength = <4>;
149*4882a593Smuzhiyun	};
150*4882a593Smuzhiyun};
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun&rkisp1 {
153*4882a593Smuzhiyun	status = "okay";
154*4882a593Smuzhiyun	port {
155*4882a593Smuzhiyun		#address-cells = <1>;
156*4882a593Smuzhiyun		#size-cells = <0>;
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun		isp_dvp_in: endpoint@1 {
159*4882a593Smuzhiyun			reg = <1>;
160*4882a593Smuzhiyun			remote-endpoint = <&gc2145_out>;
161*4882a593Smuzhiyun		};
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun		isp_mipi_in: endpoint@0 {
164*4882a593Smuzhiyun			reg = <0>;
165*4882a593Smuzhiyun			remote-endpoint = <&dphy_rx_out>;
166*4882a593Smuzhiyun		};
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun	};
169*4882a593Smuzhiyun};
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun/*
172*4882a593Smuzhiyun * In sleep mode, should be close vcca_33 and vcc_lan,
173*4882a593Smuzhiyun * but due to small defects in hardware settings and
174*4882a593Smuzhiyun * the system sleeps and wakes up, 4g module can not disconnect the network,
175*4882a593Smuzhiyun * so system sleep mode cannot be turned off vcca_33 and vcc_lan.
176*4882a593Smuzhiyun * This configuration will result in increased power consumption,
177*4882a593Smuzhiyun * please configure according to the actual needs of the project.
178*4882a593Smuzhiyun */
179*4882a593Smuzhiyun&vcca_33 {
180*4882a593Smuzhiyun	regulator-state-mem {
181*4882a593Smuzhiyun		regulator-on-in-suspend;
182*4882a593Smuzhiyun	};
183*4882a593Smuzhiyun};
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun&vcc_lan {
186*4882a593Smuzhiyun	regulator-state-mem {
187*4882a593Smuzhiyun		regulator-on-in-suspend;
188*4882a593Smuzhiyun	};
189*4882a593Smuzhiyun};
190