xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm64/rockchip/rk3328-rock64.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2017 PINE64
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/dts-v1/;
7*4882a593Smuzhiyun#include "rk3328.dtsi"
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun/ {
10*4882a593Smuzhiyun	model = "Pine64 Rock64";
11*4882a593Smuzhiyun	compatible = "pine64,rock64", "rockchip,rk3328";
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun	chosen {
14*4882a593Smuzhiyun		stdout-path = "serial2:1500000n8";
15*4882a593Smuzhiyun	};
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun	gmac_clkin: external-gmac-clock {
18*4882a593Smuzhiyun		compatible = "fixed-clock";
19*4882a593Smuzhiyun		clock-frequency = <125000000>;
20*4882a593Smuzhiyun		clock-output-names = "gmac_clkin";
21*4882a593Smuzhiyun		#clock-cells = <0>;
22*4882a593Smuzhiyun	};
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun	xin32k: xin32k {
25*4882a593Smuzhiyun		compatible = "fixed-clock";
26*4882a593Smuzhiyun		clock-frequency = <32768>;
27*4882a593Smuzhiyun		clock-output-names = "xin32k";
28*4882a593Smuzhiyun		#clock-cells = <0>;
29*4882a593Smuzhiyun	};
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun	vcc_sd: sdmmc-regulator {
32*4882a593Smuzhiyun		compatible = "regulator-fixed";
33*4882a593Smuzhiyun		gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
34*4882a593Smuzhiyun		pinctrl-names = "default";
35*4882a593Smuzhiyun		pinctrl-0 = <&sdmmc0m1_pin>;
36*4882a593Smuzhiyun		regulator-name = "vcc_sd";
37*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
38*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
39*4882a593Smuzhiyun		vin-supply = <&vcc_io>;
40*4882a593Smuzhiyun	};
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun	vcc_host_5v: vcc-host-5v-regulator {
43*4882a593Smuzhiyun		compatible = "regulator-fixed";
44*4882a593Smuzhiyun		gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
45*4882a593Smuzhiyun		pinctrl-names = "default";
46*4882a593Smuzhiyun		pinctrl-0 = <&usb20_host_drv>;
47*4882a593Smuzhiyun		regulator-name = "vcc_host_5v";
48*4882a593Smuzhiyun		regulator-always-on;
49*4882a593Smuzhiyun		regulator-boot-on;
50*4882a593Smuzhiyun		vin-supply = <&vcc_sys>;
51*4882a593Smuzhiyun	};
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun	vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator {
54*4882a593Smuzhiyun		compatible = "regulator-fixed";
55*4882a593Smuzhiyun		gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
56*4882a593Smuzhiyun		pinctrl-names = "default";
57*4882a593Smuzhiyun		pinctrl-0 = <&usb20_host_drv>;
58*4882a593Smuzhiyun		regulator-name = "vcc_host1_5v";
59*4882a593Smuzhiyun		regulator-always-on;
60*4882a593Smuzhiyun		regulator-boot-on;
61*4882a593Smuzhiyun		vin-supply = <&vcc_sys>;
62*4882a593Smuzhiyun	};
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun	vcc_sys: vcc-sys {
65*4882a593Smuzhiyun		compatible = "regulator-fixed";
66*4882a593Smuzhiyun		regulator-name = "vcc_sys";
67*4882a593Smuzhiyun		regulator-always-on;
68*4882a593Smuzhiyun		regulator-boot-on;
69*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
70*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
71*4882a593Smuzhiyun	};
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun	ir-receiver {
74*4882a593Smuzhiyun		compatible = "gpio-ir-receiver";
75*4882a593Smuzhiyun		gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
76*4882a593Smuzhiyun		pinctrl-0 = <&ir_int>;
77*4882a593Smuzhiyun		pinctrl-names = "default";
78*4882a593Smuzhiyun	};
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun	leds {
81*4882a593Smuzhiyun		compatible = "gpio-leds";
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun		power_led: led-0 {
84*4882a593Smuzhiyun			gpios = <&rk805 1 GPIO_ACTIVE_LOW>;
85*4882a593Smuzhiyun			linux,default-trigger = "mmc0";
86*4882a593Smuzhiyun		};
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun		standby_led: led-1 {
89*4882a593Smuzhiyun			gpios = <&rk805 0 GPIO_ACTIVE_LOW>;
90*4882a593Smuzhiyun			linux,default-trigger = "heartbeat";
91*4882a593Smuzhiyun		};
92*4882a593Smuzhiyun	};
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun	sound {
95*4882a593Smuzhiyun		compatible = "audio-graph-card";
96*4882a593Smuzhiyun		label = "rockchip,rk3328";
97*4882a593Smuzhiyun		dais = <&i2s1_p0
98*4882a593Smuzhiyun			&spdif_p0>;
99*4882a593Smuzhiyun	};
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun	spdif-dit {
102*4882a593Smuzhiyun		compatible = "linux,spdif-dit";
103*4882a593Smuzhiyun		#sound-dai-cells = <0>;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun		port {
106*4882a593Smuzhiyun			dit_p0_0: endpoint {
107*4882a593Smuzhiyun				remote-endpoint = <&spdif_p0_0>;
108*4882a593Smuzhiyun			};
109*4882a593Smuzhiyun		};
110*4882a593Smuzhiyun	};
111*4882a593Smuzhiyun};
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun&codec {
114*4882a593Smuzhiyun	mute-gpios = <&grf_gpio 0 GPIO_ACTIVE_LOW>;
115*4882a593Smuzhiyun	status = "okay";
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun	port@0 {
118*4882a593Smuzhiyun		codec_p0_0: endpoint {
119*4882a593Smuzhiyun			remote-endpoint = <&i2s1_p0_0>;
120*4882a593Smuzhiyun		};
121*4882a593Smuzhiyun	};
122*4882a593Smuzhiyun};
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun&cpu0 {
125*4882a593Smuzhiyun	cpu-supply = <&vdd_arm>;
126*4882a593Smuzhiyun};
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun&cpu1 {
129*4882a593Smuzhiyun	cpu-supply = <&vdd_arm>;
130*4882a593Smuzhiyun};
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun&cpu2 {
133*4882a593Smuzhiyun	cpu-supply = <&vdd_arm>;
134*4882a593Smuzhiyun};
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun&cpu3 {
137*4882a593Smuzhiyun	cpu-supply = <&vdd_arm>;
138*4882a593Smuzhiyun};
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun&emmc {
141*4882a593Smuzhiyun	bus-width = <8>;
142*4882a593Smuzhiyun	cap-mmc-highspeed;
143*4882a593Smuzhiyun	mmc-hs200-1_8v;
144*4882a593Smuzhiyun	non-removable;
145*4882a593Smuzhiyun	pinctrl-names = "default";
146*4882a593Smuzhiyun	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
147*4882a593Smuzhiyun	vmmc-supply = <&vcc_io>;
148*4882a593Smuzhiyun	vqmmc-supply = <&vcc18_emmc>;
149*4882a593Smuzhiyun	status = "okay";
150*4882a593Smuzhiyun};
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun&gmac2io {
153*4882a593Smuzhiyun	assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
154*4882a593Smuzhiyun	assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
155*4882a593Smuzhiyun	clock_in_out = "input";
156*4882a593Smuzhiyun	phy-supply = <&vcc_io>;
157*4882a593Smuzhiyun	phy-mode = "rgmii";
158*4882a593Smuzhiyun	pinctrl-names = "default";
159*4882a593Smuzhiyun	pinctrl-0 = <&rgmiim1_pins>;
160*4882a593Smuzhiyun	snps,force_thresh_dma_mode;
161*4882a593Smuzhiyun	snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
162*4882a593Smuzhiyun	snps,reset-active-low;
163*4882a593Smuzhiyun	snps,reset-delays-us = <0 10000 50000>;
164*4882a593Smuzhiyun	tx_delay = <0x24>;
165*4882a593Smuzhiyun	rx_delay = <0x18>;
166*4882a593Smuzhiyun	status = "okay";
167*4882a593Smuzhiyun};
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun&hdmi {
170*4882a593Smuzhiyun	status = "okay";
171*4882a593Smuzhiyun};
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun&hdmiphy {
174*4882a593Smuzhiyun	status = "okay";
175*4882a593Smuzhiyun};
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun&i2c1 {
178*4882a593Smuzhiyun	status = "okay";
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun	rk805: pmic@18 {
181*4882a593Smuzhiyun		compatible = "rockchip,rk805";
182*4882a593Smuzhiyun		reg = <0x18>;
183*4882a593Smuzhiyun		interrupt-parent = <&gpio2>;
184*4882a593Smuzhiyun		interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
185*4882a593Smuzhiyun		#clock-cells = <1>;
186*4882a593Smuzhiyun		clock-output-names = "rk805-clkout1", "rk805-clkout2";
187*4882a593Smuzhiyun		gpio-controller;
188*4882a593Smuzhiyun		#gpio-cells = <2>;
189*4882a593Smuzhiyun		pinctrl-names = "default";
190*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int_l>;
191*4882a593Smuzhiyun		rockchip,system-power-controller;
192*4882a593Smuzhiyun		wakeup-source;
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun		vcc1-supply = <&vcc_sys>;
195*4882a593Smuzhiyun		vcc2-supply = <&vcc_sys>;
196*4882a593Smuzhiyun		vcc3-supply = <&vcc_sys>;
197*4882a593Smuzhiyun		vcc4-supply = <&vcc_sys>;
198*4882a593Smuzhiyun		vcc5-supply = <&vcc_io>;
199*4882a593Smuzhiyun		vcc6-supply = <&vcc_sys>;
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun		regulators {
202*4882a593Smuzhiyun			vdd_logic: DCDC_REG1 {
203*4882a593Smuzhiyun				regulator-name = "vdd_logic";
204*4882a593Smuzhiyun				regulator-min-microvolt = <712500>;
205*4882a593Smuzhiyun				regulator-max-microvolt = <1450000>;
206*4882a593Smuzhiyun				regulator-ramp-delay = <12500>;
207*4882a593Smuzhiyun				regulator-always-on;
208*4882a593Smuzhiyun				regulator-boot-on;
209*4882a593Smuzhiyun				regulator-state-mem {
210*4882a593Smuzhiyun					regulator-on-in-suspend;
211*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
212*4882a593Smuzhiyun				};
213*4882a593Smuzhiyun			};
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun			vdd_arm: DCDC_REG2 {
216*4882a593Smuzhiyun				regulator-name = "vdd_arm";
217*4882a593Smuzhiyun				regulator-min-microvolt = <712500>;
218*4882a593Smuzhiyun				regulator-max-microvolt = <1450000>;
219*4882a593Smuzhiyun				regulator-ramp-delay = <12500>;
220*4882a593Smuzhiyun				regulator-always-on;
221*4882a593Smuzhiyun				regulator-boot-on;
222*4882a593Smuzhiyun				regulator-state-mem {
223*4882a593Smuzhiyun					regulator-on-in-suspend;
224*4882a593Smuzhiyun					regulator-suspend-microvolt = <950000>;
225*4882a593Smuzhiyun				};
226*4882a593Smuzhiyun			};
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
229*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
230*4882a593Smuzhiyun				regulator-always-on;
231*4882a593Smuzhiyun				regulator-boot-on;
232*4882a593Smuzhiyun				regulator-state-mem {
233*4882a593Smuzhiyun					regulator-on-in-suspend;
234*4882a593Smuzhiyun				};
235*4882a593Smuzhiyun			};
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun			vcc_io: DCDC_REG4 {
238*4882a593Smuzhiyun				regulator-name = "vcc_io";
239*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
240*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
241*4882a593Smuzhiyun				regulator-always-on;
242*4882a593Smuzhiyun				regulator-boot-on;
243*4882a593Smuzhiyun				regulator-state-mem {
244*4882a593Smuzhiyun					regulator-on-in-suspend;
245*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
246*4882a593Smuzhiyun				};
247*4882a593Smuzhiyun			};
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun			vcc_18: LDO_REG1 {
250*4882a593Smuzhiyun				regulator-name = "vcc_18";
251*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
252*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
253*4882a593Smuzhiyun				regulator-always-on;
254*4882a593Smuzhiyun				regulator-boot-on;
255*4882a593Smuzhiyun				regulator-state-mem {
256*4882a593Smuzhiyun					regulator-on-in-suspend;
257*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
258*4882a593Smuzhiyun				};
259*4882a593Smuzhiyun			};
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun			vcc18_emmc: LDO_REG2 {
262*4882a593Smuzhiyun				regulator-name = "vcc18_emmc";
263*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
264*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
265*4882a593Smuzhiyun				regulator-always-on;
266*4882a593Smuzhiyun				regulator-boot-on;
267*4882a593Smuzhiyun				regulator-state-mem {
268*4882a593Smuzhiyun					regulator-on-in-suspend;
269*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
270*4882a593Smuzhiyun				};
271*4882a593Smuzhiyun			};
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun			vdd_10: LDO_REG3 {
274*4882a593Smuzhiyun				regulator-name = "vdd_10";
275*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
276*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
277*4882a593Smuzhiyun				regulator-always-on;
278*4882a593Smuzhiyun				regulator-boot-on;
279*4882a593Smuzhiyun				regulator-state-mem {
280*4882a593Smuzhiyun					regulator-on-in-suspend;
281*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
282*4882a593Smuzhiyun				};
283*4882a593Smuzhiyun			};
284*4882a593Smuzhiyun		};
285*4882a593Smuzhiyun	};
286*4882a593Smuzhiyun};
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun&i2s1 {
289*4882a593Smuzhiyun	status = "okay";
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun	i2s1_p0: port {
292*4882a593Smuzhiyun		i2s1_p0_0: endpoint {
293*4882a593Smuzhiyun			dai-format = "i2s";
294*4882a593Smuzhiyun			mclk-fs = <256>;
295*4882a593Smuzhiyun			remote-endpoint = <&codec_p0_0>;
296*4882a593Smuzhiyun		};
297*4882a593Smuzhiyun	};
298*4882a593Smuzhiyun};
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun&io_domains {
301*4882a593Smuzhiyun	status = "okay";
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun	vccio1-supply = <&vcc_io>;
304*4882a593Smuzhiyun	vccio2-supply = <&vcc18_emmc>;
305*4882a593Smuzhiyun	vccio3-supply = <&vcc_io>;
306*4882a593Smuzhiyun	vccio4-supply = <&vcc_18>;
307*4882a593Smuzhiyun	vccio5-supply = <&vcc_io>;
308*4882a593Smuzhiyun	vccio6-supply = <&vcc_io>;
309*4882a593Smuzhiyun	pmuio-supply = <&vcc_io>;
310*4882a593Smuzhiyun};
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun&pinctrl {
313*4882a593Smuzhiyun	ir {
314*4882a593Smuzhiyun		ir_int: ir-int {
315*4882a593Smuzhiyun			rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
316*4882a593Smuzhiyun		};
317*4882a593Smuzhiyun	};
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun	pmic {
320*4882a593Smuzhiyun		pmic_int_l: pmic-int-l {
321*4882a593Smuzhiyun			rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
322*4882a593Smuzhiyun		};
323*4882a593Smuzhiyun	};
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun	usb2 {
326*4882a593Smuzhiyun		usb20_host_drv: usb20-host-drv {
327*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
328*4882a593Smuzhiyun		};
329*4882a593Smuzhiyun	};
330*4882a593Smuzhiyun};
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun&sdmmc {
333*4882a593Smuzhiyun	bus-width = <4>;
334*4882a593Smuzhiyun	cap-mmc-highspeed;
335*4882a593Smuzhiyun	cap-sd-highspeed;
336*4882a593Smuzhiyun	disable-wp;
337*4882a593Smuzhiyun	max-frequency = <150000000>;
338*4882a593Smuzhiyun	pinctrl-names = "default";
339*4882a593Smuzhiyun	pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
340*4882a593Smuzhiyun	vmmc-supply = <&vcc_sd>;
341*4882a593Smuzhiyun	status = "okay";
342*4882a593Smuzhiyun};
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun&spdif {
345*4882a593Smuzhiyun	pinctrl-0 = <&spdifm0_tx>;
346*4882a593Smuzhiyun	status = "okay";
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun	spdif_p0: port {
349*4882a593Smuzhiyun		spdif_p0_0: endpoint {
350*4882a593Smuzhiyun			remote-endpoint = <&dit_p0_0>;
351*4882a593Smuzhiyun		};
352*4882a593Smuzhiyun	};
353*4882a593Smuzhiyun};
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun&spi0 {
356*4882a593Smuzhiyun	status = "okay";
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun	spiflash@0 {
359*4882a593Smuzhiyun		compatible = "jedec,spi-nor";
360*4882a593Smuzhiyun		reg = <0>;
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun		/* maximum speed for Rockchip SPI */
363*4882a593Smuzhiyun		spi-max-frequency = <50000000>;
364*4882a593Smuzhiyun	};
365*4882a593Smuzhiyun};
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun&tsadc {
368*4882a593Smuzhiyun	rockchip,hw-tshut-mode = <0>;
369*4882a593Smuzhiyun	rockchip,hw-tshut-polarity = <0>;
370*4882a593Smuzhiyun	status = "okay";
371*4882a593Smuzhiyun};
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun&uart2 {
374*4882a593Smuzhiyun	status = "okay";
375*4882a593Smuzhiyun};
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun&u2phy {
378*4882a593Smuzhiyun	status = "okay";
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun	u2phy_host: host-port {
381*4882a593Smuzhiyun		status = "okay";
382*4882a593Smuzhiyun	};
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun	u2phy_otg: otg-port {
385*4882a593Smuzhiyun		status = "okay";
386*4882a593Smuzhiyun	};
387*4882a593Smuzhiyun};
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun&usb20_otg {
390*4882a593Smuzhiyun	dr_mode = "host";
391*4882a593Smuzhiyun	status = "okay";
392*4882a593Smuzhiyun};
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun&usbdrd3 {
395*4882a593Smuzhiyun	dr_mode = "host";
396*4882a593Smuzhiyun	status = "okay";
397*4882a593Smuzhiyun};
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun&usb_host0_ehci {
400*4882a593Smuzhiyun	status = "okay";
401*4882a593Smuzhiyun};
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun&usb_host0_ohci {
404*4882a593Smuzhiyun	status = "okay";
405*4882a593Smuzhiyun};
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun&vop {
408*4882a593Smuzhiyun	status = "okay";
409*4882a593Smuzhiyun};
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun&vop_mmu {
412*4882a593Smuzhiyun	status = "okay";
413*4882a593Smuzhiyun};
414