1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include "rk3328.dtsi" 8*4882a593Smuzhiyun#include "rk3328-android.dtsi" 9*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/ { 12*4882a593Smuzhiyun gmac_clkin: external-gmac-clock { 13*4882a593Smuzhiyun compatible = "fixed-clock"; 14*4882a593Smuzhiyun clock-frequency = <125000000>; 15*4882a593Smuzhiyun clock-output-names = "gmac_clkin"; 16*4882a593Smuzhiyun #clock-cells = <0>; 17*4882a593Smuzhiyun }; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 20*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 21*4882a593Smuzhiyun pinctrl-names = "default"; 22*4882a593Smuzhiyun pinctrl-0 = <&wifi_enable_h>; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun /* 25*4882a593Smuzhiyun * On the module itself this is one of these (depending 26*4882a593Smuzhiyun * on the actual card populated): 27*4882a593Smuzhiyun * - SDIO_RESET_L_WL_REG_ON 28*4882a593Smuzhiyun * - PDN (power down when low) 29*4882a593Smuzhiyun */ 30*4882a593Smuzhiyun reset-gpios = <&gpio1 18 GPIO_ACTIVE_LOW>; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun sound { 34*4882a593Smuzhiyun compatible = "simple-audio-card"; 35*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 36*4882a593Smuzhiyun simple-audio-card,mclk-fs = <256>; 37*4882a593Smuzhiyun simple-audio-card,name = "rockchip-rk3328"; 38*4882a593Smuzhiyun simple-audio-card,cpu { 39*4882a593Smuzhiyun sound-dai = <&i2s1>; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun simple-audio-card,codec { 42*4882a593Smuzhiyun sound-dai = <&codec>; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun hdmi-sound { 47*4882a593Smuzhiyun compatible = "simple-audio-card"; 48*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 49*4882a593Smuzhiyun simple-audio-card,mclk-fs = <128>; 50*4882a593Smuzhiyun simple-audio-card,name = "rockchip-hdmi"; 51*4882a593Smuzhiyun simple-audio-card,cpu { 52*4882a593Smuzhiyun sound-dai = <&i2s0>; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun simple-audio-card,codec { 55*4882a593Smuzhiyun sound-dai = <&hdmi>; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun spdif-sound { 60*4882a593Smuzhiyun compatible = "simple-audio-card"; 61*4882a593Smuzhiyun simple-audio-card,name = "rockchip-spdif"; 62*4882a593Smuzhiyun simple-audio-card,mclk-fs = <128>; 63*4882a593Smuzhiyun simple-audio-card,cpu { 64*4882a593Smuzhiyun sound-dai = <&spdif>; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun simple-audio-card,codec { 67*4882a593Smuzhiyun sound-dai = <&spdif_out>; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun spdif_out: spdif-out { 72*4882a593Smuzhiyun compatible = "linux,spdif-dit"; 73*4882a593Smuzhiyun #sound-dai-cells = <0>; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun vcc_host_vbus: host-vbus-regulator { 77*4882a593Smuzhiyun compatible = "regulator-fixed"; 78*4882a593Smuzhiyun gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; 79*4882a593Smuzhiyun pinctrl-names = "default"; 80*4882a593Smuzhiyun pinctrl-0 = <&host_vbus_drv>; 81*4882a593Smuzhiyun regulator-name = "vcc_host_vbus"; 82*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 83*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 84*4882a593Smuzhiyun enable-active-high; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun vcc_otg_vbus: otg-vbus-regulator { 88*4882a593Smuzhiyun compatible = "regulator-fixed"; 89*4882a593Smuzhiyun gpio = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>; 90*4882a593Smuzhiyun pinctrl-names = "default"; 91*4882a593Smuzhiyun pinctrl-0 = <&otg_vbus_drv>; 92*4882a593Smuzhiyun regulator-name = "vcc_otg_vbus"; 93*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 94*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 95*4882a593Smuzhiyun enable-active-high; 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun vcc_phy: vcc-phy-regulator { 99*4882a593Smuzhiyun compatible = "regulator-fixed"; 100*4882a593Smuzhiyun regulator-name = "vcc_phy"; 101*4882a593Smuzhiyun regulator-always-on; 102*4882a593Smuzhiyun regulator-boot-on; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun vcc_sd: sdmmc-regulator { 106*4882a593Smuzhiyun compatible = "regulator-fixed"; 107*4882a593Smuzhiyun gpio = <&gpio0 30 GPIO_ACTIVE_LOW>; 108*4882a593Smuzhiyun pinctrl-names = "default"; 109*4882a593Smuzhiyun pinctrl-0 = <&sdmmc0m1_gpio>; 110*4882a593Smuzhiyun regulator-name = "vcc_sd"; 111*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 112*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 113*4882a593Smuzhiyun vin-supply = <&vcc_io>; 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun vcc_sys: vcc-sys { 117*4882a593Smuzhiyun compatible = "regulator-fixed"; 118*4882a593Smuzhiyun regulator-name = "vcc_sys"; 119*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 120*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 121*4882a593Smuzhiyun regulator-always-on; 122*4882a593Smuzhiyun }; 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun xin32k: xin32k { 125*4882a593Smuzhiyun compatible = "fixed-clock"; 126*4882a593Smuzhiyun clock-frequency = <32768>; 127*4882a593Smuzhiyun clock-output-names = "xin32k"; 128*4882a593Smuzhiyun #clock-cells = <0>; 129*4882a593Smuzhiyun }; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun wireless-bluetooth { 132*4882a593Smuzhiyun compatible = "bluetooth-platdata"; 133*4882a593Smuzhiyun clocks = <&rk805 1>; 134*4882a593Smuzhiyun clock-names = "ext_clock"; 135*4882a593Smuzhiyun uart_rts_gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; 136*4882a593Smuzhiyun pinctrl-names = "default", "rts_gpio"; 137*4882a593Smuzhiyun pinctrl-0 = <&uart0_rts>; 138*4882a593Smuzhiyun pinctrl-1 = <&uart0_gpios>; 139*4882a593Smuzhiyun BT,power_gpio = <&gpio1 21 GPIO_ACTIVE_HIGH>; 140*4882a593Smuzhiyun BT,wake_host_irq = <&gpio1 26 GPIO_ACTIVE_HIGH>; 141*4882a593Smuzhiyun status = "okay"; 142*4882a593Smuzhiyun }; 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun wireless-wlan { 145*4882a593Smuzhiyun compatible = "wlan-platdata"; 146*4882a593Smuzhiyun rockchip,grf = <&grf>; 147*4882a593Smuzhiyun wifi_chip_type = "ap6354"; 148*4882a593Smuzhiyun sdio_vref = <1800>; 149*4882a593Smuzhiyun WIFI,host_wake_irq = <&gpio1 19 GPIO_ACTIVE_HIGH>; 150*4882a593Smuzhiyun status = "okay"; 151*4882a593Smuzhiyun }; 152*4882a593Smuzhiyun}; 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun&avsd { 155*4882a593Smuzhiyun status = "okay"; 156*4882a593Smuzhiyun}; 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun&codec { 159*4882a593Smuzhiyun #sound-dai-cells = <0>; 160*4882a593Smuzhiyun status = "okay"; 161*4882a593Smuzhiyun}; 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun&cpu0 { 164*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 165*4882a593Smuzhiyun}; 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun&dfi { 168*4882a593Smuzhiyun status = "okay"; 169*4882a593Smuzhiyun}; 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun&dmc { 172*4882a593Smuzhiyun center-supply = <&vdd_logic>; 173*4882a593Smuzhiyun status = "okay"; 174*4882a593Smuzhiyun}; 175*4882a593Smuzhiyun 176*4882a593Smuzhiyun&emmc { 177*4882a593Smuzhiyun bus-width = <8>; 178*4882a593Smuzhiyun cap-mmc-highspeed; 179*4882a593Smuzhiyun mmc-hs200-1_8v; 180*4882a593Smuzhiyun no-sdio; 181*4882a593Smuzhiyun no-sd; 182*4882a593Smuzhiyun disable-wp; 183*4882a593Smuzhiyun non-removable; 184*4882a593Smuzhiyun num-slots = <1>; 185*4882a593Smuzhiyun pinctrl-names = "default"; 186*4882a593Smuzhiyun pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; 187*4882a593Smuzhiyun rockchip,default-sample-phase = <90>; 188*4882a593Smuzhiyun status = "okay"; 189*4882a593Smuzhiyun}; 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun&gmac2io { 192*4882a593Smuzhiyun phy-supply = <&vcc_phy>; 193*4882a593Smuzhiyun phy-mode = "rgmii"; 194*4882a593Smuzhiyun clock_in_out = "input"; 195*4882a593Smuzhiyun snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; 196*4882a593Smuzhiyun snps,reset-active-low; 197*4882a593Smuzhiyun snps,reset-delays-us = <0 10000 50000>; 198*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; 199*4882a593Smuzhiyun assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; 200*4882a593Smuzhiyun pinctrl-names = "default"; 201*4882a593Smuzhiyun pinctrl-0 = <&rgmiim1_pins>; 202*4882a593Smuzhiyun tx_delay = <0x26>; 203*4882a593Smuzhiyun rx_delay = <0x11>; 204*4882a593Smuzhiyun status = "disabled"; 205*4882a593Smuzhiyun}; 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun&gmac2phy { 208*4882a593Smuzhiyun phy-supply = <&vcc_phy>; 209*4882a593Smuzhiyun clock_in_out = "output"; 210*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_MAC2PHY_SRC>; 211*4882a593Smuzhiyun assigned-clock-rate = <50000000>; 212*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_MAC2PHY>; 213*4882a593Smuzhiyun assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>; 214*4882a593Smuzhiyun status = "okay"; 215*4882a593Smuzhiyun}; 216*4882a593Smuzhiyun 217*4882a593Smuzhiyun&gpu { 218*4882a593Smuzhiyun status = "okay"; 219*4882a593Smuzhiyun mali-supply = <&vdd_logic>; 220*4882a593Smuzhiyun}; 221*4882a593Smuzhiyun 222*4882a593Smuzhiyun&hdmi { 223*4882a593Smuzhiyun #sound-dai-cells = <0>; 224*4882a593Smuzhiyun ddc-i2c-scl-high-time-ns = <9625>; 225*4882a593Smuzhiyun ddc-i2c-scl-low-time-ns = <10000>; 226*4882a593Smuzhiyun status = "okay"; 227*4882a593Smuzhiyun}; 228*4882a593Smuzhiyun 229*4882a593Smuzhiyun&hdmiphy { 230*4882a593Smuzhiyun rockchip,phy-table = 231*4882a593Smuzhiyun <165000000 0x07 0x0a 0x0a 0x0a 0x00 0x00 0x08 232*4882a593Smuzhiyun 0x08 0x08 0x00 0xac 0xcc 0xcc 0xcc>, 233*4882a593Smuzhiyun <340000000 0x0b 0x0d 0x0d 0x0d 0x07 0x15 0x08 234*4882a593Smuzhiyun 0x08 0x08 0x3f 0xac 0xcc 0xcd 0xdd>, 235*4882a593Smuzhiyun <594000000 0x10 0x1a 0x1a 0x1a 0x07 0x15 0x08 236*4882a593Smuzhiyun 0x08 0x08 0x00 0xac 0xcc 0xcc 0xcc>; 237*4882a593Smuzhiyun status = "okay"; 238*4882a593Smuzhiyun}; 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun&i2c1 { 241*4882a593Smuzhiyun status = "okay"; 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun rk805: rk805@18 { 244*4882a593Smuzhiyun compatible = "rockchip,rk805"; 245*4882a593Smuzhiyun status = "okay"; 246*4882a593Smuzhiyun reg = <0x18>; 247*4882a593Smuzhiyun interrupt-parent = <&gpio2>; 248*4882a593Smuzhiyun interrupts = <6 IRQ_TYPE_LEVEL_LOW>; 249*4882a593Smuzhiyun pinctrl-names = "default"; 250*4882a593Smuzhiyun pinctrl-0 = <&pmic_int_l>; 251*4882a593Smuzhiyun wakeup-source; 252*4882a593Smuzhiyun gpio-controller; 253*4882a593Smuzhiyun #gpio-cells = <2>; 254*4882a593Smuzhiyun #clock-cells = <1>; 255*4882a593Smuzhiyun clock-output-names = "rk805-clkout1", "rk805-clkout2"; 256*4882a593Smuzhiyun 257*4882a593Smuzhiyun vcc1-supply = <&vcc_sys>; 258*4882a593Smuzhiyun vcc2-supply = <&vcc_sys>; 259*4882a593Smuzhiyun vcc3-supply = <&vcc_sys>; 260*4882a593Smuzhiyun vcc4-supply = <&vcc_sys>; 261*4882a593Smuzhiyun vcc5-supply = <&vcc_io>; 262*4882a593Smuzhiyun vcc6-supply = <&vcc_io>; 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun rtc { 265*4882a593Smuzhiyun status = "okay"; 266*4882a593Smuzhiyun }; 267*4882a593Smuzhiyun 268*4882a593Smuzhiyun pwrkey { 269*4882a593Smuzhiyun status = "disabled"; 270*4882a593Smuzhiyun }; 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun gpio { 273*4882a593Smuzhiyun status = "okay"; 274*4882a593Smuzhiyun }; 275*4882a593Smuzhiyun 276*4882a593Smuzhiyun regulators { 277*4882a593Smuzhiyun vdd_logic: DCDC_REG1 { 278*4882a593Smuzhiyun regulator-name = "vdd_logic"; 279*4882a593Smuzhiyun regulator-min-microvolt = <712500>; 280*4882a593Smuzhiyun regulator-max-microvolt = <1450000>; 281*4882a593Smuzhiyun regulator-initial-mode = <0x1>; 282*4882a593Smuzhiyun regulator-ramp-delay = <12500>; 283*4882a593Smuzhiyun regulator-boot-on; 284*4882a593Smuzhiyun regulator-always-on; 285*4882a593Smuzhiyun regulator-state-mem { 286*4882a593Smuzhiyun regulator-mode = <0x2>; 287*4882a593Smuzhiyun regulator-on-in-suspend; 288*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 289*4882a593Smuzhiyun }; 290*4882a593Smuzhiyun }; 291*4882a593Smuzhiyun 292*4882a593Smuzhiyun vdd_arm: DCDC_REG2 { 293*4882a593Smuzhiyun regulator-name = "vdd_arm"; 294*4882a593Smuzhiyun regulator-init-microvolt = <1225000>; 295*4882a593Smuzhiyun regulator-min-microvolt = <712500>; 296*4882a593Smuzhiyun regulator-max-microvolt = <1450000>; 297*4882a593Smuzhiyun regulator-initial-mode = <0x1>; 298*4882a593Smuzhiyun regulator-ramp-delay = <12500>; 299*4882a593Smuzhiyun regulator-boot-on; 300*4882a593Smuzhiyun regulator-always-on; 301*4882a593Smuzhiyun regulator-state-mem { 302*4882a593Smuzhiyun regulator-mode = <0x2>; 303*4882a593Smuzhiyun regulator-on-in-suspend; 304*4882a593Smuzhiyun regulator-suspend-microvolt = <950000>; 305*4882a593Smuzhiyun }; 306*4882a593Smuzhiyun }; 307*4882a593Smuzhiyun 308*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 309*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 310*4882a593Smuzhiyun regulator-initial-mode = <0x1>; 311*4882a593Smuzhiyun regulator-boot-on; 312*4882a593Smuzhiyun regulator-always-on; 313*4882a593Smuzhiyun regulator-state-mem { 314*4882a593Smuzhiyun regulator-mode = <0x2>; 315*4882a593Smuzhiyun regulator-on-in-suspend; 316*4882a593Smuzhiyun }; 317*4882a593Smuzhiyun }; 318*4882a593Smuzhiyun 319*4882a593Smuzhiyun vcc_io: DCDC_REG4 { 320*4882a593Smuzhiyun regulator-name = "vcc_io"; 321*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 322*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 323*4882a593Smuzhiyun regulator-initial-mode = <0x1>; 324*4882a593Smuzhiyun regulator-boot-on; 325*4882a593Smuzhiyun regulator-always-on; 326*4882a593Smuzhiyun regulator-state-mem { 327*4882a593Smuzhiyun regulator-mode = <0x2>; 328*4882a593Smuzhiyun regulator-on-in-suspend; 329*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 330*4882a593Smuzhiyun }; 331*4882a593Smuzhiyun }; 332*4882a593Smuzhiyun 333*4882a593Smuzhiyun vdd_18: LDO_REG1 { 334*4882a593Smuzhiyun regulator-name = "vdd_18"; 335*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 336*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 337*4882a593Smuzhiyun regulator-boot-on; 338*4882a593Smuzhiyun regulator-always-on; 339*4882a593Smuzhiyun regulator-state-mem { 340*4882a593Smuzhiyun regulator-on-in-suspend; 341*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 342*4882a593Smuzhiyun }; 343*4882a593Smuzhiyun }; 344*4882a593Smuzhiyun 345*4882a593Smuzhiyun vcc_18emmc: LDO_REG2 { 346*4882a593Smuzhiyun regulator-name = "vcc_18emmc"; 347*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 348*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 349*4882a593Smuzhiyun regulator-boot-on; 350*4882a593Smuzhiyun regulator-always-on; 351*4882a593Smuzhiyun regulator-state-mem { 352*4882a593Smuzhiyun regulator-on-in-suspend; 353*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 354*4882a593Smuzhiyun }; 355*4882a593Smuzhiyun }; 356*4882a593Smuzhiyun 357*4882a593Smuzhiyun vdd_11: LDO_REG3 { 358*4882a593Smuzhiyun regulator-name = "vdd_11"; 359*4882a593Smuzhiyun regulator-min-microvolt = <1100000>; 360*4882a593Smuzhiyun regulator-max-microvolt = <1100000>; 361*4882a593Smuzhiyun regulator-boot-on; 362*4882a593Smuzhiyun regulator-always-on; 363*4882a593Smuzhiyun regulator-state-mem { 364*4882a593Smuzhiyun regulator-on-in-suspend; 365*4882a593Smuzhiyun regulator-suspend-microvolt = <1100000>; 366*4882a593Smuzhiyun }; 367*4882a593Smuzhiyun }; 368*4882a593Smuzhiyun }; 369*4882a593Smuzhiyun }; 370*4882a593Smuzhiyun}; 371*4882a593Smuzhiyun 372*4882a593Smuzhiyun&secure_memory { 373*4882a593Smuzhiyun /* 374*4882a593Smuzhiyun * enable like this: 375*4882a593Smuzhiyun * reg = <0x0 0x20000000 0x0 0x10000000>; 376*4882a593Smuzhiyun */ 377*4882a593Smuzhiyun reg = <0x0 0x20000000 0x0 0x0>; 378*4882a593Smuzhiyun}; 379*4882a593Smuzhiyun 380*4882a593Smuzhiyun&i2s0 { 381*4882a593Smuzhiyun #sound-dai-cells = <0>; 382*4882a593Smuzhiyun rockchip,bclk-fs = <128>; 383*4882a593Smuzhiyun status = "okay"; 384*4882a593Smuzhiyun}; 385*4882a593Smuzhiyun 386*4882a593Smuzhiyun&i2s1 { 387*4882a593Smuzhiyun #sound-dai-cells = <0>; 388*4882a593Smuzhiyun status = "okay"; 389*4882a593Smuzhiyun}; 390*4882a593Smuzhiyun 391*4882a593Smuzhiyun&iep { 392*4882a593Smuzhiyun status = "okay"; 393*4882a593Smuzhiyun}; 394*4882a593Smuzhiyun 395*4882a593Smuzhiyun&iep_mmu { 396*4882a593Smuzhiyun status = "okay"; 397*4882a593Smuzhiyun}; 398*4882a593Smuzhiyun 399*4882a593Smuzhiyun&io_domains { 400*4882a593Smuzhiyun status = "okay"; 401*4882a593Smuzhiyun 402*4882a593Smuzhiyun vccio1-supply = <&vcc_io>; 403*4882a593Smuzhiyun vccio2-supply = <&vcc_18emmc>; 404*4882a593Smuzhiyun vccio3-supply = <&vcc_io>; 405*4882a593Smuzhiyun vccio4-supply = <&vdd_18>; 406*4882a593Smuzhiyun vccio5-supply = <&vcc_io>; 407*4882a593Smuzhiyun vccio6-supply = <&vcc_io>; 408*4882a593Smuzhiyun pmuio-supply = <&vcc_io>; 409*4882a593Smuzhiyun}; 410*4882a593Smuzhiyun 411*4882a593Smuzhiyun&mpp_srv { 412*4882a593Smuzhiyun status = "okay"; 413*4882a593Smuzhiyun}; 414*4882a593Smuzhiyun 415*4882a593Smuzhiyun&pinctrl { 416*4882a593Smuzhiyun pmic { 417*4882a593Smuzhiyun pmic_int_l: pmic-int-l { 418*4882a593Smuzhiyun rockchip,pins = 419*4882a593Smuzhiyun <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; /* gpio2_a6 */ 420*4882a593Smuzhiyun }; 421*4882a593Smuzhiyun }; 422*4882a593Smuzhiyun 423*4882a593Smuzhiyun sdio-pwrseq { 424*4882a593Smuzhiyun wifi_enable_h: wifi-enable-h { 425*4882a593Smuzhiyun rockchip,pins = 426*4882a593Smuzhiyun <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 427*4882a593Smuzhiyun }; 428*4882a593Smuzhiyun }; 429*4882a593Smuzhiyun 430*4882a593Smuzhiyun usb { 431*4882a593Smuzhiyun host_vbus_drv: host-vbus-drv { 432*4882a593Smuzhiyun rockchip,pins = 433*4882a593Smuzhiyun <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; 434*4882a593Smuzhiyun }; 435*4882a593Smuzhiyun 436*4882a593Smuzhiyun otg_vbus_drv: otg-vbus-drv { 437*4882a593Smuzhiyun rockchip,pins = 438*4882a593Smuzhiyun <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; 439*4882a593Smuzhiyun }; 440*4882a593Smuzhiyun }; 441*4882a593Smuzhiyun 442*4882a593Smuzhiyun wireless-bluetooth { 443*4882a593Smuzhiyun uart0_gpios: uart0-gpios { 444*4882a593Smuzhiyun rockchip,pins = 445*4882a593Smuzhiyun <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 446*4882a593Smuzhiyun }; 447*4882a593Smuzhiyun }; 448*4882a593Smuzhiyun}; 449*4882a593Smuzhiyun 450*4882a593Smuzhiyun&pwm3 { 451*4882a593Smuzhiyun status = "okay"; 452*4882a593Smuzhiyun pinctrl-names = "default"; 453*4882a593Smuzhiyun pinctrl-0 = <&pwmir_pin>; 454*4882a593Smuzhiyun compatible = "rockchip,remotectl-pwm"; 455*4882a593Smuzhiyun remote_pwm_id = <3>; 456*4882a593Smuzhiyun handle_cpu_id = <1>; 457*4882a593Smuzhiyun remote_support_psci = <1>; 458*4882a593Smuzhiyun 459*4882a593Smuzhiyun ir_key1 { 460*4882a593Smuzhiyun rockchip,usercode = <0x4040>; 461*4882a593Smuzhiyun rockchip,key_table = 462*4882a593Smuzhiyun <0xf2 KEY_REPLY>, 463*4882a593Smuzhiyun <0xba KEY_BACK>, 464*4882a593Smuzhiyun <0xf4 KEY_UP>, 465*4882a593Smuzhiyun <0xf1 KEY_DOWN>, 466*4882a593Smuzhiyun <0xef KEY_LEFT>, 467*4882a593Smuzhiyun <0xee KEY_RIGHT>, 468*4882a593Smuzhiyun <0xbd KEY_HOME>, 469*4882a593Smuzhiyun <0xea KEY_VOLUMEUP>, 470*4882a593Smuzhiyun <0xe3 KEY_VOLUMEDOWN>, 471*4882a593Smuzhiyun <0xe2 KEY_SEARCH>, 472*4882a593Smuzhiyun <0xb2 KEY_POWER>, 473*4882a593Smuzhiyun <0xbc KEY_MUTE>, 474*4882a593Smuzhiyun <0xec KEY_MENU>, 475*4882a593Smuzhiyun <0xbf 0x190>, 476*4882a593Smuzhiyun <0xe0 0x191>, 477*4882a593Smuzhiyun <0xe1 0x192>, 478*4882a593Smuzhiyun <0xe9 183>, 479*4882a593Smuzhiyun <0xe6 248>, 480*4882a593Smuzhiyun <0xe8 185>, 481*4882a593Smuzhiyun <0xe7 186>, 482*4882a593Smuzhiyun <0xf0 388>, 483*4882a593Smuzhiyun <0xbe 0x175>; 484*4882a593Smuzhiyun }; 485*4882a593Smuzhiyun 486*4882a593Smuzhiyun ir_key2 { 487*4882a593Smuzhiyun rockchip,usercode = <0xff00>; 488*4882a593Smuzhiyun rockchip,key_table = 489*4882a593Smuzhiyun <0xf9 KEY_HOME>, 490*4882a593Smuzhiyun <0xbf KEY_BACK>, 491*4882a593Smuzhiyun <0xfb KEY_MENU>, 492*4882a593Smuzhiyun <0xaa KEY_REPLY>, 493*4882a593Smuzhiyun <0xb9 KEY_UP>, 494*4882a593Smuzhiyun <0xe9 KEY_DOWN>, 495*4882a593Smuzhiyun <0xb8 KEY_LEFT>, 496*4882a593Smuzhiyun <0xea KEY_RIGHT>, 497*4882a593Smuzhiyun <0xeb KEY_VOLUMEDOWN>, 498*4882a593Smuzhiyun <0xef KEY_VOLUMEUP>, 499*4882a593Smuzhiyun <0xf7 KEY_MUTE>, 500*4882a593Smuzhiyun <0xe7 KEY_POWER>, 501*4882a593Smuzhiyun <0xfc KEY_POWER>, 502*4882a593Smuzhiyun <0xa9 KEY_VOLUMEDOWN>, 503*4882a593Smuzhiyun <0xa8 KEY_PLAYPAUSE>, 504*4882a593Smuzhiyun <0xe0 KEY_VOLUMEDOWN>, 505*4882a593Smuzhiyun <0xa5 KEY_VOLUMEDOWN>, 506*4882a593Smuzhiyun <0xab 183>, 507*4882a593Smuzhiyun <0xb7 388>, 508*4882a593Smuzhiyun <0xe8 388>, 509*4882a593Smuzhiyun <0xf8 184>, 510*4882a593Smuzhiyun <0xaf 185>, 511*4882a593Smuzhiyun <0xed KEY_VOLUMEDOWN>, 512*4882a593Smuzhiyun <0xee 186>, 513*4882a593Smuzhiyun <0xb3 KEY_VOLUMEDOWN>, 514*4882a593Smuzhiyun <0xf1 KEY_VOLUMEDOWN>, 515*4882a593Smuzhiyun <0xf2 KEY_VOLUMEDOWN>, 516*4882a593Smuzhiyun <0xf3 KEY_SEARCH>, 517*4882a593Smuzhiyun <0xb4 KEY_VOLUMEDOWN>, 518*4882a593Smuzhiyun <0xa4 KEY_SETUP>, 519*4882a593Smuzhiyun <0xbe KEY_SEARCH>; 520*4882a593Smuzhiyun }; 521*4882a593Smuzhiyun 522*4882a593Smuzhiyun ir_key3 { 523*4882a593Smuzhiyun rockchip,usercode = <0x1dcc>; 524*4882a593Smuzhiyun rockchip,key_table = 525*4882a593Smuzhiyun <0xee KEY_REPLY>, 526*4882a593Smuzhiyun <0xf0 KEY_BACK>, 527*4882a593Smuzhiyun <0xf8 KEY_UP>, 528*4882a593Smuzhiyun <0xbb KEY_DOWN>, 529*4882a593Smuzhiyun <0xef KEY_LEFT>, 530*4882a593Smuzhiyun <0xed KEY_RIGHT>, 531*4882a593Smuzhiyun <0xfc KEY_HOME>, 532*4882a593Smuzhiyun <0xf1 KEY_VOLUMEUP>, 533*4882a593Smuzhiyun <0xfd KEY_VOLUMEDOWN>, 534*4882a593Smuzhiyun <0xb7 KEY_SEARCH>, 535*4882a593Smuzhiyun <0xff KEY_POWER>, 536*4882a593Smuzhiyun <0xf3 KEY_MUTE>, 537*4882a593Smuzhiyun <0xbf KEY_MENU>, 538*4882a593Smuzhiyun <0xf9 0x191>, 539*4882a593Smuzhiyun <0xf5 0x192>, 540*4882a593Smuzhiyun <0xb3 388>, 541*4882a593Smuzhiyun <0xbe KEY_1>, 542*4882a593Smuzhiyun <0xba KEY_2>, 543*4882a593Smuzhiyun <0xb2 KEY_3>, 544*4882a593Smuzhiyun <0xbd KEY_4>, 545*4882a593Smuzhiyun <0xf9 KEY_5>, 546*4882a593Smuzhiyun <0xb1 KEY_6>, 547*4882a593Smuzhiyun <0xfc KEY_7>, 548*4882a593Smuzhiyun <0xf8 KEY_8>, 549*4882a593Smuzhiyun <0xb0 KEY_9>, 550*4882a593Smuzhiyun <0xb6 KEY_0>, 551*4882a593Smuzhiyun <0xb5 KEY_BACKSPACE>; 552*4882a593Smuzhiyun }; 553*4882a593Smuzhiyun}; 554*4882a593Smuzhiyun 555*4882a593Smuzhiyun&rga { 556*4882a593Smuzhiyun status = "okay"; 557*4882a593Smuzhiyun}; 558*4882a593Smuzhiyun 559*4882a593Smuzhiyun&rkvdec { 560*4882a593Smuzhiyun status = "okay"; 561*4882a593Smuzhiyun vcodec-supply = <&vdd_logic>; 562*4882a593Smuzhiyun}; 563*4882a593Smuzhiyun 564*4882a593Smuzhiyun&rkvdec_mmu { 565*4882a593Smuzhiyun status = "okay"; 566*4882a593Smuzhiyun}; 567*4882a593Smuzhiyun 568*4882a593Smuzhiyun&rockchip_suspend { 569*4882a593Smuzhiyun status = "okay"; 570*4882a593Smuzhiyun rockchip,virtual-poweroff = <1>; 571*4882a593Smuzhiyun}; 572*4882a593Smuzhiyun 573*4882a593Smuzhiyun&uart0 { 574*4882a593Smuzhiyun pinctrl-names = "default"; 575*4882a593Smuzhiyun pinctrl-0 = <&uart0_xfer &uart0_cts>; 576*4882a593Smuzhiyun status = "okay"; 577*4882a593Smuzhiyun}; 578*4882a593Smuzhiyun 579*4882a593Smuzhiyun&sdio { 580*4882a593Smuzhiyun bus-width = <4>; 581*4882a593Smuzhiyun cap-sd-highspeed; 582*4882a593Smuzhiyun cap-sdio-irq; 583*4882a593Smuzhiyun disable-wp; 584*4882a593Smuzhiyun keep-power-in-suspend; 585*4882a593Smuzhiyun max-frequency = <125000000>; 586*4882a593Smuzhiyun mmc-pwrseq = <&sdio_pwrseq>; 587*4882a593Smuzhiyun non-removable; 588*4882a593Smuzhiyun num-slots = <1>; 589*4882a593Smuzhiyun pinctrl-names = "default"; 590*4882a593Smuzhiyun pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; 591*4882a593Smuzhiyun no-sd; 592*4882a593Smuzhiyun no-mmc; 593*4882a593Smuzhiyun sd-uhs-sdr104; 594*4882a593Smuzhiyun status = "okay"; 595*4882a593Smuzhiyun}; 596*4882a593Smuzhiyun 597*4882a593Smuzhiyun&sdmmc { 598*4882a593Smuzhiyun bus-width = <4>; 599*4882a593Smuzhiyun cap-mmc-highspeed; 600*4882a593Smuzhiyun cap-sd-highspeed; 601*4882a593Smuzhiyun disable-wp; 602*4882a593Smuzhiyun max-frequency = <150000000>; 603*4882a593Smuzhiyun num-slots = <1>; 604*4882a593Smuzhiyun pinctrl-names = "default"; 605*4882a593Smuzhiyun pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; 606*4882a593Smuzhiyun no-sdio; 607*4882a593Smuzhiyun no-mmc; 608*4882a593Smuzhiyun status = "okay"; 609*4882a593Smuzhiyun vmmc-supply = <&vcc_sd>; 610*4882a593Smuzhiyun}; 611*4882a593Smuzhiyun 612*4882a593Smuzhiyun&spdif { 613*4882a593Smuzhiyun #sound-dai-cells = <0>; 614*4882a593Smuzhiyun pinctrl-names = "default"; 615*4882a593Smuzhiyun pinctrl-0 = <&spdifm2_tx>; 616*4882a593Smuzhiyun status = "okay"; 617*4882a593Smuzhiyun}; 618*4882a593Smuzhiyun 619*4882a593Smuzhiyun&threshold { 620*4882a593Smuzhiyun temperature = <90000>; /* millicelsius */ 621*4882a593Smuzhiyun}; 622*4882a593Smuzhiyun 623*4882a593Smuzhiyun&target { 624*4882a593Smuzhiyun temperature = <105000>; /* millicelsius */ 625*4882a593Smuzhiyun}; 626*4882a593Smuzhiyun 627*4882a593Smuzhiyun&soc_crit { 628*4882a593Smuzhiyun temperature = <115000>; /* millicelsius */ 629*4882a593Smuzhiyun}; 630*4882a593Smuzhiyun 631*4882a593Smuzhiyun&tsadc { 632*4882a593Smuzhiyun rockchip,hw-tshut-temp = <120000>; 633*4882a593Smuzhiyun status = "okay"; 634*4882a593Smuzhiyun}; 635*4882a593Smuzhiyun 636*4882a593Smuzhiyun&tve { 637*4882a593Smuzhiyun status = "okay"; 638*4882a593Smuzhiyun}; 639*4882a593Smuzhiyun 640*4882a593Smuzhiyun&u2phy { 641*4882a593Smuzhiyun status = "okay"; 642*4882a593Smuzhiyun 643*4882a593Smuzhiyun u2phy_host: host-port { 644*4882a593Smuzhiyun status = "okay"; 645*4882a593Smuzhiyun }; 646*4882a593Smuzhiyun 647*4882a593Smuzhiyun u2phy_otg: otg-port { 648*4882a593Smuzhiyun vbus-supply = <&vcc_otg_vbus>; 649*4882a593Smuzhiyun status = "okay"; 650*4882a593Smuzhiyun }; 651*4882a593Smuzhiyun}; 652*4882a593Smuzhiyun 653*4882a593Smuzhiyun&u3phy { 654*4882a593Smuzhiyun vbus-supply = <&vcc_host_vbus>; 655*4882a593Smuzhiyun status = "okay"; 656*4882a593Smuzhiyun}; 657*4882a593Smuzhiyun 658*4882a593Smuzhiyun&u3phy_utmi { 659*4882a593Smuzhiyun status = "okay"; 660*4882a593Smuzhiyun}; 661*4882a593Smuzhiyun 662*4882a593Smuzhiyun&u3phy_pipe { 663*4882a593Smuzhiyun status = "okay"; 664*4882a593Smuzhiyun}; 665*4882a593Smuzhiyun 666*4882a593Smuzhiyun&usb20_otg { 667*4882a593Smuzhiyun status = "okay"; 668*4882a593Smuzhiyun}; 669*4882a593Smuzhiyun 670*4882a593Smuzhiyun&usb_host0_ehci { 671*4882a593Smuzhiyun status = "okay"; 672*4882a593Smuzhiyun}; 673*4882a593Smuzhiyun 674*4882a593Smuzhiyun&usb_host0_ohci { 675*4882a593Smuzhiyun status = "okay"; 676*4882a593Smuzhiyun}; 677*4882a593Smuzhiyun 678*4882a593Smuzhiyun&usbdrd3 { 679*4882a593Smuzhiyun status = "okay"; 680*4882a593Smuzhiyun}; 681*4882a593Smuzhiyun 682*4882a593Smuzhiyun&usbdrd_dwc3 { 683*4882a593Smuzhiyun status = "okay"; 684*4882a593Smuzhiyun}; 685*4882a593Smuzhiyun 686*4882a593Smuzhiyun&vdpu { 687*4882a593Smuzhiyun status = "okay"; 688*4882a593Smuzhiyun}; 689*4882a593Smuzhiyun 690*4882a593Smuzhiyun&vpu_mmu { 691*4882a593Smuzhiyun status = "okay"; 692*4882a593Smuzhiyun}; 693*4882a593Smuzhiyun 694*4882a593Smuzhiyun&vepu { 695*4882a593Smuzhiyun status = "okay"; 696*4882a593Smuzhiyun}; 697*4882a593Smuzhiyun 698*4882a593Smuzhiyun&vepu_mmu { 699*4882a593Smuzhiyun status = "okay"; 700*4882a593Smuzhiyun}; 701*4882a593Smuzhiyun 702*4882a593Smuzhiyun&vepu22 { 703*4882a593Smuzhiyun status = "okay"; 704*4882a593Smuzhiyun}; 705*4882a593Smuzhiyun 706*4882a593Smuzhiyun&vepu22_mmu { 707*4882a593Smuzhiyun status = "okay"; 708*4882a593Smuzhiyun}; 709*4882a593Smuzhiyun 710*4882a593Smuzhiyun&vop { 711*4882a593Smuzhiyun status = "okay"; 712*4882a593Smuzhiyun}; 713*4882a593Smuzhiyun 714*4882a593Smuzhiyun&vop_mmu { 715*4882a593Smuzhiyun status = "okay"; 716*4882a593Smuzhiyun}; 717