1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2019 Hardkernel Co., Ltd 4*4882a593Smuzhiyun * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/dts-v1/; 8*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 9*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 10*4882a593Smuzhiyun#include <dt-bindings/pinctrl/rockchip.h> 11*4882a593Smuzhiyun#include "rk3326.dtsi" 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun/ { 14*4882a593Smuzhiyun model = "ODROID-GO Advance"; 15*4882a593Smuzhiyun compatible = "hardkernel,rk3326-odroid-go2", "rockchip,rk3326"; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun chosen { 18*4882a593Smuzhiyun stdout-path = "serial2:115200n8"; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun backlight: backlight { 22*4882a593Smuzhiyun compatible = "pwm-backlight"; 23*4882a593Smuzhiyun power-supply = <&vcc_bl>; 24*4882a593Smuzhiyun pwms = <&pwm1 0 25000 0>; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun gpio-keys { 28*4882a593Smuzhiyun compatible = "gpio-keys"; 29*4882a593Smuzhiyun pinctrl-names = "default"; 30*4882a593Smuzhiyun pinctrl-0 = <&btn_pins>; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun /* 33*4882a593Smuzhiyun * *** ODROIDGO2-Advance Switch layout *** 34*4882a593Smuzhiyun * |------------------------------------------------| 35*4882a593Smuzhiyun * | sw15 sw16 | 36*4882a593Smuzhiyun * |------------------------------------------------| 37*4882a593Smuzhiyun * | sw1 |-------------------| sw8 | 38*4882a593Smuzhiyun * | sw3 sw4 | | sw7 sw5 | 39*4882a593Smuzhiyun * | sw2 | LCD Display | sw6 | 40*4882a593Smuzhiyun * | | | | 41*4882a593Smuzhiyun * | |-------------------| | 42*4882a593Smuzhiyun * | sw9 sw10 sw11 sw12 sw13 sw14 | 43*4882a593Smuzhiyun * |------------------------------------------------| 44*4882a593Smuzhiyun */ 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun sw1 { 47*4882a593Smuzhiyun gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_LOW>; 48*4882a593Smuzhiyun label = "DPAD-UP"; 49*4882a593Smuzhiyun linux,code = <BTN_DPAD_UP>; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun sw2 { 52*4882a593Smuzhiyun gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>; 53*4882a593Smuzhiyun label = "DPAD-DOWN"; 54*4882a593Smuzhiyun linux,code = <BTN_DPAD_DOWN>; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun sw3 { 57*4882a593Smuzhiyun gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>; 58*4882a593Smuzhiyun label = "DPAD-LEFT"; 59*4882a593Smuzhiyun linux,code = <BTN_DPAD_LEFT>; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun sw4 { 62*4882a593Smuzhiyun gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_LOW>; 63*4882a593Smuzhiyun label = "DPAD-RIGHT"; 64*4882a593Smuzhiyun linux,code = <BTN_DPAD_RIGHT>; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun sw5 { 67*4882a593Smuzhiyun gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>; 68*4882a593Smuzhiyun label = "BTN-A"; 69*4882a593Smuzhiyun linux,code = <BTN_EAST>; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun sw6 { 72*4882a593Smuzhiyun gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>; 73*4882a593Smuzhiyun label = "BTN-B"; 74*4882a593Smuzhiyun linux,code = <BTN_SOUTH>; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun sw7 { 77*4882a593Smuzhiyun gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>; 78*4882a593Smuzhiyun label = "BTN-Y"; 79*4882a593Smuzhiyun linux,code = <BTN_WEST>; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun sw8 { 82*4882a593Smuzhiyun gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>; 83*4882a593Smuzhiyun label = "BTN-X"; 84*4882a593Smuzhiyun linux,code = <BTN_NORTH>; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun sw9 { 87*4882a593Smuzhiyun gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>; 88*4882a593Smuzhiyun label = "F1"; 89*4882a593Smuzhiyun linux,code = <BTN_TRIGGER_HAPPY1>; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun sw10 { 92*4882a593Smuzhiyun gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>; 93*4882a593Smuzhiyun label = "F2"; 94*4882a593Smuzhiyun linux,code = <BTN_TRIGGER_HAPPY2>; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun sw11 { 97*4882a593Smuzhiyun gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; 98*4882a593Smuzhiyun label = "F3"; 99*4882a593Smuzhiyun linux,code = <BTN_TRIGGER_HAPPY3>; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun sw12 { 102*4882a593Smuzhiyun gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_LOW>; 103*4882a593Smuzhiyun label = "F4"; 104*4882a593Smuzhiyun linux,code = <BTN_TRIGGER_HAPPY4>; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun sw13 { 107*4882a593Smuzhiyun gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_LOW>; 108*4882a593Smuzhiyun label = "F5"; 109*4882a593Smuzhiyun linux,code = <BTN_TRIGGER_HAPPY5>; 110*4882a593Smuzhiyun }; 111*4882a593Smuzhiyun sw14 { 112*4882a593Smuzhiyun gpios = <&gpio2 RK_PA5 GPIO_ACTIVE_LOW>; 113*4882a593Smuzhiyun label = "F6"; 114*4882a593Smuzhiyun linux,code = <BTN_TRIGGER_HAPPY6>; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun sw15 { 117*4882a593Smuzhiyun gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>; 118*4882a593Smuzhiyun label = "TOP-LEFT"; 119*4882a593Smuzhiyun linux,code = <BTN_TL>; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun sw16 { 122*4882a593Smuzhiyun gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_LOW>; 123*4882a593Smuzhiyun label = "TOP-RIGHT"; 124*4882a593Smuzhiyun linux,code = <BTN_TR>; 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun leds: gpio-leds { 129*4882a593Smuzhiyun compatible = "gpio-leds"; 130*4882a593Smuzhiyun pinctrl-names = "default"; 131*4882a593Smuzhiyun pinctrl-0 = <&blue_led_pin>; 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun blue_led: led-0 { 134*4882a593Smuzhiyun label = "blue:heartbeat"; 135*4882a593Smuzhiyun gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; 136*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 137*4882a593Smuzhiyun }; 138*4882a593Smuzhiyun }; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun vccsys: vccsys { 141*4882a593Smuzhiyun compatible = "regulator-fixed"; 142*4882a593Smuzhiyun regulator-name = "vcc3v8_sys"; 143*4882a593Smuzhiyun regulator-always-on; 144*4882a593Smuzhiyun regulator-min-microvolt = <3800000>; 145*4882a593Smuzhiyun regulator-max-microvolt = <3800000>; 146*4882a593Smuzhiyun }; 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun vcc_host: vcc_host { 149*4882a593Smuzhiyun compatible = "regulator-fixed"; 150*4882a593Smuzhiyun regulator-name = "vcc_host"; 151*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 152*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; 155*4882a593Smuzhiyun enable-active-high; 156*4882a593Smuzhiyun regulator-always-on; 157*4882a593Smuzhiyun vin-supply = <&vccsys>; 158*4882a593Smuzhiyun }; 159*4882a593Smuzhiyun}; 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun&cpu0 { 162*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 163*4882a593Smuzhiyun}; 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun&cpu1 { 166*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 167*4882a593Smuzhiyun}; 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun&cpu2 { 170*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 171*4882a593Smuzhiyun}; 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun&cpu3 { 174*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 175*4882a593Smuzhiyun}; 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun&cru { 178*4882a593Smuzhiyun assigned-clocks = <&cru PLL_NPLL>, 179*4882a593Smuzhiyun <&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>, 180*4882a593Smuzhiyun <&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>, 181*4882a593Smuzhiyun <&cru PCLK_BUS_PRE>, <&cru SCLK_GPU>, 182*4882a593Smuzhiyun <&cru PLL_CPLL>; 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun assigned-clock-rates = <1188000000>, 185*4882a593Smuzhiyun <200000000>, <200000000>, 186*4882a593Smuzhiyun <150000000>, <150000000>, 187*4882a593Smuzhiyun <100000000>, <200000000>, 188*4882a593Smuzhiyun <17000000>; 189*4882a593Smuzhiyun}; 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun&display_subsystem { 192*4882a593Smuzhiyun status = "okay"; 193*4882a593Smuzhiyun}; 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun&dsi { 196*4882a593Smuzhiyun status = "okay"; 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun ports { 199*4882a593Smuzhiyun mipi_out: port@1 { 200*4882a593Smuzhiyun reg = <1>; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun mipi_out_panel: endpoint { 203*4882a593Smuzhiyun remote-endpoint = <&mipi_in_panel>; 204*4882a593Smuzhiyun }; 205*4882a593Smuzhiyun }; 206*4882a593Smuzhiyun }; 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun panel@0 { 209*4882a593Smuzhiyun compatible = "elida,kd35t133"; 210*4882a593Smuzhiyun reg = <0>; 211*4882a593Smuzhiyun backlight = <&backlight>; 212*4882a593Smuzhiyun iovcc-supply = <&vcc_lcd>; 213*4882a593Smuzhiyun reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; 214*4882a593Smuzhiyun vdd-supply = <&vcc_lcd>; 215*4882a593Smuzhiyun 216*4882a593Smuzhiyun port { 217*4882a593Smuzhiyun mipi_in_panel: endpoint { 218*4882a593Smuzhiyun remote-endpoint = <&mipi_out_panel>; 219*4882a593Smuzhiyun }; 220*4882a593Smuzhiyun }; 221*4882a593Smuzhiyun }; 222*4882a593Smuzhiyun}; 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun&dsi_dphy { 225*4882a593Smuzhiyun status = "okay"; 226*4882a593Smuzhiyun}; 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun&gpu { 229*4882a593Smuzhiyun mali-supply = <&vdd_logic>; 230*4882a593Smuzhiyun status = "okay"; 231*4882a593Smuzhiyun}; 232*4882a593Smuzhiyun 233*4882a593Smuzhiyun&i2c0 { 234*4882a593Smuzhiyun clock-frequency = <400000>; 235*4882a593Smuzhiyun i2c-scl-falling-time-ns = <16>; 236*4882a593Smuzhiyun i2c-scl-rising-time-ns = <280>; 237*4882a593Smuzhiyun status = "okay"; 238*4882a593Smuzhiyun 239*4882a593Smuzhiyun rk817: pmic@20 { 240*4882a593Smuzhiyun compatible = "rockchip,rk817"; 241*4882a593Smuzhiyun reg = <0x20>; 242*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 243*4882a593Smuzhiyun interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>; 244*4882a593Smuzhiyun pinctrl-names = "default"; 245*4882a593Smuzhiyun pinctrl-0 = <&pmic_int>; 246*4882a593Smuzhiyun wakeup-source; 247*4882a593Smuzhiyun #clock-cells = <1>; 248*4882a593Smuzhiyun clock-output-names = "rk808-clkout1", "xin32k"; 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun vcc1-supply = <&vccsys>; 251*4882a593Smuzhiyun vcc2-supply = <&vccsys>; 252*4882a593Smuzhiyun vcc3-supply = <&vccsys>; 253*4882a593Smuzhiyun vcc4-supply = <&vccsys>; 254*4882a593Smuzhiyun vcc5-supply = <&vccsys>; 255*4882a593Smuzhiyun vcc6-supply = <&vccsys>; 256*4882a593Smuzhiyun vcc7-supply = <&vccsys>; 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun regulators { 259*4882a593Smuzhiyun vdd_logic: DCDC_REG1 { 260*4882a593Smuzhiyun regulator-name = "vdd_logic"; 261*4882a593Smuzhiyun regulator-min-microvolt = <950000>; 262*4882a593Smuzhiyun regulator-max-microvolt = <1150000>; 263*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 264*4882a593Smuzhiyun regulator-always-on; 265*4882a593Smuzhiyun regulator-boot-on; 266*4882a593Smuzhiyun 267*4882a593Smuzhiyun regulator-state-mem { 268*4882a593Smuzhiyun regulator-on-in-suspend; 269*4882a593Smuzhiyun regulator-suspend-microvolt = <950000>; 270*4882a593Smuzhiyun }; 271*4882a593Smuzhiyun }; 272*4882a593Smuzhiyun 273*4882a593Smuzhiyun vdd_arm: DCDC_REG2 { 274*4882a593Smuzhiyun regulator-name = "vdd_arm"; 275*4882a593Smuzhiyun regulator-min-microvolt = <950000>; 276*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 277*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 278*4882a593Smuzhiyun regulator-always-on; 279*4882a593Smuzhiyun regulator-boot-on; 280*4882a593Smuzhiyun 281*4882a593Smuzhiyun regulator-state-mem { 282*4882a593Smuzhiyun regulator-off-in-suspend; 283*4882a593Smuzhiyun regulator-suspend-microvolt = <950000>; 284*4882a593Smuzhiyun }; 285*4882a593Smuzhiyun }; 286*4882a593Smuzhiyun 287*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 288*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 289*4882a593Smuzhiyun regulator-always-on; 290*4882a593Smuzhiyun regulator-boot-on; 291*4882a593Smuzhiyun 292*4882a593Smuzhiyun regulator-state-mem { 293*4882a593Smuzhiyun regulator-on-in-suspend; 294*4882a593Smuzhiyun }; 295*4882a593Smuzhiyun }; 296*4882a593Smuzhiyun 297*4882a593Smuzhiyun vcc_3v3: DCDC_REG4 { 298*4882a593Smuzhiyun regulator-name = "vcc_3v3"; 299*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 300*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 301*4882a593Smuzhiyun regulator-always-on; 302*4882a593Smuzhiyun regulator-boot-on; 303*4882a593Smuzhiyun 304*4882a593Smuzhiyun regulator-state-mem { 305*4882a593Smuzhiyun regulator-off-in-suspend; 306*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 307*4882a593Smuzhiyun }; 308*4882a593Smuzhiyun }; 309*4882a593Smuzhiyun 310*4882a593Smuzhiyun vcc_1v8: LDO_REG2 { 311*4882a593Smuzhiyun regulator-name = "vcc_1v8"; 312*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 313*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 314*4882a593Smuzhiyun regulator-always-on; 315*4882a593Smuzhiyun regulator-boot-on; 316*4882a593Smuzhiyun 317*4882a593Smuzhiyun regulator-state-mem { 318*4882a593Smuzhiyun regulator-on-in-suspend; 319*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 320*4882a593Smuzhiyun }; 321*4882a593Smuzhiyun }; 322*4882a593Smuzhiyun 323*4882a593Smuzhiyun vdd_1v0: LDO_REG3 { 324*4882a593Smuzhiyun regulator-name = "vdd_1v0"; 325*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 326*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 327*4882a593Smuzhiyun regulator-always-on; 328*4882a593Smuzhiyun regulator-boot-on; 329*4882a593Smuzhiyun 330*4882a593Smuzhiyun regulator-state-mem { 331*4882a593Smuzhiyun regulator-on-in-suspend; 332*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 333*4882a593Smuzhiyun }; 334*4882a593Smuzhiyun }; 335*4882a593Smuzhiyun 336*4882a593Smuzhiyun vcc3v3_pmu: LDO_REG4 { 337*4882a593Smuzhiyun regulator-name = "vcc3v3_pmu"; 338*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 339*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 340*4882a593Smuzhiyun regulator-always-on; 341*4882a593Smuzhiyun regulator-boot-on; 342*4882a593Smuzhiyun 343*4882a593Smuzhiyun regulator-state-mem { 344*4882a593Smuzhiyun regulator-on-in-suspend; 345*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 346*4882a593Smuzhiyun }; 347*4882a593Smuzhiyun }; 348*4882a593Smuzhiyun 349*4882a593Smuzhiyun vccio_sd: LDO_REG5 { 350*4882a593Smuzhiyun regulator-name = "vccio_sd"; 351*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 352*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 353*4882a593Smuzhiyun regulator-always-on; 354*4882a593Smuzhiyun regulator-boot-on; 355*4882a593Smuzhiyun 356*4882a593Smuzhiyun regulator-state-mem { 357*4882a593Smuzhiyun regulator-on-in-suspend; 358*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 359*4882a593Smuzhiyun }; 360*4882a593Smuzhiyun }; 361*4882a593Smuzhiyun 362*4882a593Smuzhiyun vcc_sd: LDO_REG6 { 363*4882a593Smuzhiyun regulator-name = "vcc_sd"; 364*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 365*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 366*4882a593Smuzhiyun regulator-boot-on; 367*4882a593Smuzhiyun 368*4882a593Smuzhiyun regulator-state-mem { 369*4882a593Smuzhiyun regulator-on-in-suspend; 370*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 371*4882a593Smuzhiyun }; 372*4882a593Smuzhiyun }; 373*4882a593Smuzhiyun 374*4882a593Smuzhiyun vcc_bl: LDO_REG7 { 375*4882a593Smuzhiyun regulator-name = "vcc_bl"; 376*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 377*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 378*4882a593Smuzhiyun 379*4882a593Smuzhiyun regulator-state-mem { 380*4882a593Smuzhiyun regulator-off-in-suspend; 381*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 382*4882a593Smuzhiyun }; 383*4882a593Smuzhiyun }; 384*4882a593Smuzhiyun 385*4882a593Smuzhiyun vcc_lcd: LDO_REG8 { 386*4882a593Smuzhiyun regulator-name = "vcc_lcd"; 387*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 388*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 389*4882a593Smuzhiyun 390*4882a593Smuzhiyun regulator-state-mem { 391*4882a593Smuzhiyun regulator-off-in-suspend; 392*4882a593Smuzhiyun regulator-suspend-microvolt = <2800000>; 393*4882a593Smuzhiyun }; 394*4882a593Smuzhiyun }; 395*4882a593Smuzhiyun 396*4882a593Smuzhiyun vcc_cam: LDO_REG9 { 397*4882a593Smuzhiyun regulator-name = "vcc_cam"; 398*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 399*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 400*4882a593Smuzhiyun 401*4882a593Smuzhiyun regulator-state-mem { 402*4882a593Smuzhiyun regulator-off-in-suspend; 403*4882a593Smuzhiyun regulator-suspend-microvolt = <3000000>; 404*4882a593Smuzhiyun }; 405*4882a593Smuzhiyun }; 406*4882a593Smuzhiyun }; 407*4882a593Smuzhiyun }; 408*4882a593Smuzhiyun}; 409*4882a593Smuzhiyun 410*4882a593Smuzhiyun/* EXT Header(P2): 7(SCL:GPIO0.C2), 8(SDA:GPIO0.C3) */ 411*4882a593Smuzhiyun&i2c1 { 412*4882a593Smuzhiyun clock-frequency = <400000>; 413*4882a593Smuzhiyun status = "okay"; 414*4882a593Smuzhiyun}; 415*4882a593Smuzhiyun 416*4882a593Smuzhiyun/* I2S 1 Channel Used */ 417*4882a593Smuzhiyun&i2s1_2ch { 418*4882a593Smuzhiyun status = "okay"; 419*4882a593Smuzhiyun}; 420*4882a593Smuzhiyun 421*4882a593Smuzhiyun&io_domains { 422*4882a593Smuzhiyun vccio1-supply = <&vcc_3v3>; 423*4882a593Smuzhiyun vccio2-supply = <&vccio_sd>; 424*4882a593Smuzhiyun vccio3-supply = <&vcc_3v3>; 425*4882a593Smuzhiyun vccio4-supply = <&vcc_3v3>; 426*4882a593Smuzhiyun vccio5-supply = <&vcc_3v3>; 427*4882a593Smuzhiyun vccio6-supply = <&vcc_3v3>; 428*4882a593Smuzhiyun status = "okay"; 429*4882a593Smuzhiyun}; 430*4882a593Smuzhiyun 431*4882a593Smuzhiyun&pmu_io_domains { 432*4882a593Smuzhiyun pmuio1-supply = <&vcc3v3_pmu>; 433*4882a593Smuzhiyun pmuio2-supply = <&vcc3v3_pmu>; 434*4882a593Smuzhiyun status = "okay"; 435*4882a593Smuzhiyun}; 436*4882a593Smuzhiyun 437*4882a593Smuzhiyun&pwm1 { 438*4882a593Smuzhiyun status = "okay"; 439*4882a593Smuzhiyun}; 440*4882a593Smuzhiyun 441*4882a593Smuzhiyun&saradc { 442*4882a593Smuzhiyun vref-supply = <&vcc_1v8>; 443*4882a593Smuzhiyun status = "okay"; 444*4882a593Smuzhiyun}; 445*4882a593Smuzhiyun 446*4882a593Smuzhiyun&sdmmc { 447*4882a593Smuzhiyun cap-sd-highspeed; 448*4882a593Smuzhiyun card-detect-delay = <200>; 449*4882a593Smuzhiyun cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>; /*[> CD GPIO <]*/ 450*4882a593Smuzhiyun sd-uhs-sdr12; 451*4882a593Smuzhiyun sd-uhs-sdr25; 452*4882a593Smuzhiyun sd-uhs-sdr50; 453*4882a593Smuzhiyun sd-uhs-sdr104; 454*4882a593Smuzhiyun vmmc-supply = <&vcc_sd>; 455*4882a593Smuzhiyun vqmmc-supply = <&vccio_sd>; 456*4882a593Smuzhiyun status = "okay"; 457*4882a593Smuzhiyun}; 458*4882a593Smuzhiyun 459*4882a593Smuzhiyun&tsadc { 460*4882a593Smuzhiyun status = "okay"; 461*4882a593Smuzhiyun}; 462*4882a593Smuzhiyun 463*4882a593Smuzhiyun&u2phy { 464*4882a593Smuzhiyun status = "okay"; 465*4882a593Smuzhiyun 466*4882a593Smuzhiyun u2phy_host: host-port { 467*4882a593Smuzhiyun status = "okay"; 468*4882a593Smuzhiyun }; 469*4882a593Smuzhiyun 470*4882a593Smuzhiyun u2phy_otg: otg-port { 471*4882a593Smuzhiyun status = "disabled"; 472*4882a593Smuzhiyun }; 473*4882a593Smuzhiyun}; 474*4882a593Smuzhiyun 475*4882a593Smuzhiyun&usb20_otg { 476*4882a593Smuzhiyun status = "okay"; 477*4882a593Smuzhiyun}; 478*4882a593Smuzhiyun 479*4882a593Smuzhiyun/* EXT Header(P2): 2(RXD:GPIO1.C0),3(TXD:.C1),4(CTS:.C2),5(RTS:.C3) */ 480*4882a593Smuzhiyun&uart1 { 481*4882a593Smuzhiyun pinctrl-names = "default"; 482*4882a593Smuzhiyun pinctrl-0 = <&uart1_xfer &uart1_cts>; 483*4882a593Smuzhiyun status = "okay"; 484*4882a593Smuzhiyun}; 485*4882a593Smuzhiyun 486*4882a593Smuzhiyun&uart2 { 487*4882a593Smuzhiyun pinctrl-names = "default"; 488*4882a593Smuzhiyun pinctrl-0 = <&uart2m1_xfer>; 489*4882a593Smuzhiyun status = "okay"; 490*4882a593Smuzhiyun}; 491*4882a593Smuzhiyun 492*4882a593Smuzhiyun&vopb { 493*4882a593Smuzhiyun status = "okay"; 494*4882a593Smuzhiyun}; 495*4882a593Smuzhiyun 496*4882a593Smuzhiyun&vopb_mmu { 497*4882a593Smuzhiyun status = "okay"; 498*4882a593Smuzhiyun}; 499*4882a593Smuzhiyun 500*4882a593Smuzhiyun&pinctrl { 501*4882a593Smuzhiyun btns { 502*4882a593Smuzhiyun btn_pins: btn-pins { 503*4882a593Smuzhiyun rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, 504*4882a593Smuzhiyun <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>, 505*4882a593Smuzhiyun <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, 506*4882a593Smuzhiyun <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>, 507*4882a593Smuzhiyun <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>, 508*4882a593Smuzhiyun <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>, 509*4882a593Smuzhiyun <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>, 510*4882a593Smuzhiyun <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>, 511*4882a593Smuzhiyun <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>, 512*4882a593Smuzhiyun <2 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>, 513*4882a593Smuzhiyun <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, 514*4882a593Smuzhiyun <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>, 515*4882a593Smuzhiyun <2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>, 516*4882a593Smuzhiyun <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>, 517*4882a593Smuzhiyun <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, 518*4882a593Smuzhiyun <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; 519*4882a593Smuzhiyun }; 520*4882a593Smuzhiyun }; 521*4882a593Smuzhiyun 522*4882a593Smuzhiyun headphone { 523*4882a593Smuzhiyun hp_det: hp-det { 524*4882a593Smuzhiyun rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>; 525*4882a593Smuzhiyun }; 526*4882a593Smuzhiyun }; 527*4882a593Smuzhiyun 528*4882a593Smuzhiyun leds { 529*4882a593Smuzhiyun blue_led_pin: blue-led-pin { 530*4882a593Smuzhiyun rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; 531*4882a593Smuzhiyun }; 532*4882a593Smuzhiyun }; 533*4882a593Smuzhiyun 534*4882a593Smuzhiyun pmic { 535*4882a593Smuzhiyun dc_det: dc-det { 536*4882a593Smuzhiyun rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 537*4882a593Smuzhiyun }; 538*4882a593Smuzhiyun 539*4882a593Smuzhiyun pmic_int: pmic-int { 540*4882a593Smuzhiyun rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; 541*4882a593Smuzhiyun }; 542*4882a593Smuzhiyun 543*4882a593Smuzhiyun soc_slppin_gpio: soc_slppin_gpio { 544*4882a593Smuzhiyun rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>; 545*4882a593Smuzhiyun }; 546*4882a593Smuzhiyun 547*4882a593Smuzhiyun soc_slppin_rst: soc_slppin_rst { 548*4882a593Smuzhiyun rockchip,pins = <0 RK_PA4 2 &pcfg_pull_none>; 549*4882a593Smuzhiyun }; 550*4882a593Smuzhiyun 551*4882a593Smuzhiyun soc_slppin_slp: soc_slppin_slp { 552*4882a593Smuzhiyun rockchip,pins = <0 RK_PA4 1 &pcfg_pull_none>; 553*4882a593Smuzhiyun }; 554*4882a593Smuzhiyun }; 555*4882a593Smuzhiyun}; 556