1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun/dts-v1/;
8*4882a593Smuzhiyun#include <dt-bindings/display/drm_mipi_dsi.h>
9*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
10*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
11*4882a593Smuzhiyun#include <dt-bindings/pinctrl/rockchip.h>
12*4882a593Smuzhiyun#include <dt-bindings/sensor-dev.h>
13*4882a593Smuzhiyun#include "rk3326.dtsi"
14*4882a593Smuzhiyun#include "rk3326-863-cif-sensor.dtsi"
15*4882a593Smuzhiyun#include "px30-android.dtsi"
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun/ {
18*4882a593Smuzhiyun	model = "Rockchip rk3326 ai voice assistant evb v11 i2s-dmic board";
19*4882a593Smuzhiyun	compatible = "rockchip,rk3326-evb-ai-va-v11-i2s-dmic", "rockchip,rk3326";
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun	adc-keys {
22*4882a593Smuzhiyun		compatible = "adc-keys";
23*4882a593Smuzhiyun		io-channels = <&saradc 2>;
24*4882a593Smuzhiyun		io-channel-names = "buttons";
25*4882a593Smuzhiyun		poll-interval = <100>;
26*4882a593Smuzhiyun		keyup-threshold-microvolt = <1800000>;
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun		mute-key {
29*4882a593Smuzhiyun			linux,code = <KEY_MUTE>;
30*4882a593Smuzhiyun			label = "mute";
31*4882a593Smuzhiyun			press-threshold-microvolt = <1119000>;
32*4882a593Smuzhiyun		};
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun		mode-key {
35*4882a593Smuzhiyun			linux,code = <KEY_MODE>;
36*4882a593Smuzhiyun			label = "mode";
37*4882a593Smuzhiyun			press-threshold-microvolt = <892000>;
38*4882a593Smuzhiyun		};
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun		media-key {
41*4882a593Smuzhiyun			linux,code = <KEY_MEDIA>;
42*4882a593Smuzhiyun			label = "media";
43*4882a593Smuzhiyun			press-threshold-microvolt = <616000>;
44*4882a593Smuzhiyun		};
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun		vol-down-key {
47*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEDOWN>;
48*4882a593Smuzhiyun			label = "volume down";
49*4882a593Smuzhiyun			press-threshold-microvolt = <300000>;
50*4882a593Smuzhiyun		};
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun		vol-up-key {
53*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEUP>;
54*4882a593Smuzhiyun			label = "volume up";
55*4882a593Smuzhiyun			press-threshold-microvolt = <15000>;
56*4882a593Smuzhiyun		};
57*4882a593Smuzhiyun	};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun	backlight: backlight {
60*4882a593Smuzhiyun		compatible = "pwm-backlight";
61*4882a593Smuzhiyun		pwms = <&pwm1 0 25000 0>;
62*4882a593Smuzhiyun		brightness-levels = <
63*4882a593Smuzhiyun			  0   1   2   3   4   5   6   7
64*4882a593Smuzhiyun			  8   9  10  11  12  13  14  15
65*4882a593Smuzhiyun			 16  17  18  19  20  21  22  23
66*4882a593Smuzhiyun			 24  25  26  27  28  29  30  31
67*4882a593Smuzhiyun			 32  33  34  35  36  37  38  39
68*4882a593Smuzhiyun			 40  41  42  43  44  45  46  47
69*4882a593Smuzhiyun			 48  49  50  51  52  53  54  55
70*4882a593Smuzhiyun			 56  57  58  59  60  61  62  63
71*4882a593Smuzhiyun			 64  65  66  67  68  69  70  71
72*4882a593Smuzhiyun			 72  73  74  75  76  77  78  79
73*4882a593Smuzhiyun			 80  81  82  83  84  85  86  87
74*4882a593Smuzhiyun			 88  89  90  91  92  93  94  95
75*4882a593Smuzhiyun			 96  97  98  99 100 101 102 103
76*4882a593Smuzhiyun			104 105 106 107 108 109 110 111
77*4882a593Smuzhiyun			112 113 114 115 116 117 118 119
78*4882a593Smuzhiyun			120 121 122 123 124 125 126 127
79*4882a593Smuzhiyun			128 129 130 131 132 133 134 135
80*4882a593Smuzhiyun			136 137 138 139 140 141 142 143
81*4882a593Smuzhiyun			144 145 146 147 148 149 150 151
82*4882a593Smuzhiyun			152 153 154 155 156 157 158 159
83*4882a593Smuzhiyun			160 161 162 163 164 165 166 167
84*4882a593Smuzhiyun			168 169 170 171 172 173 174 175
85*4882a593Smuzhiyun			176 177 178 179 180 181 182 183
86*4882a593Smuzhiyun			184 185 186 187 188 189 190 191
87*4882a593Smuzhiyun			192 193 194 195 196 197 198 199
88*4882a593Smuzhiyun			200 201 202 203 204 205 206 207
89*4882a593Smuzhiyun			208 209 210 211 212 213 214 215
90*4882a593Smuzhiyun			216 217 218 219 220 221 222 223
91*4882a593Smuzhiyun			224 225 226 227 228 229 230 231
92*4882a593Smuzhiyun			232 233 234 235 236 237 238 239
93*4882a593Smuzhiyun			240 241 242 243 244 245 246 247
94*4882a593Smuzhiyun			248 249 250 251 252 253 254 255>;
95*4882a593Smuzhiyun		default-brightness-level = <200>;
96*4882a593Smuzhiyun	};
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun	multi_dais: multi-dais {
99*4882a593Smuzhiyun			status = "okay";
100*4882a593Smuzhiyun			compatible = "rockchip,multi-dais";
101*4882a593Smuzhiyun			dais = <&pdm>, <&i2s0_8ch>;
102*4882a593Smuzhiyun			capture,channel-mapping = <2 6>;
103*4882a593Smuzhiyun			playback,channel-mapping = <0 0>;
104*4882a593Smuzhiyun			#sound-dai-cells = <0>;
105*4882a593Smuzhiyun	};
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun	rk809-sound {
108*4882a593Smuzhiyun		compatible = "simple-audio-card";
109*4882a593Smuzhiyun		simple-audio-card,name = "rockchip,rk809-codec";
110*4882a593Smuzhiyun		simple-audio-card,mclk-fs = <256>;
111*4882a593Smuzhiyun		simple-audio-card,widgets =
112*4882a593Smuzhiyun			"Microphone", "Mic Jack",
113*4882a593Smuzhiyun			"Headphone", "Headphone Jack";
114*4882a593Smuzhiyun		simple-audio-card,routing =
115*4882a593Smuzhiyun			"Mic Jack", "MICBIAS1",
116*4882a593Smuzhiyun			"IN1P", "Mic Jack",
117*4882a593Smuzhiyun			"Headphone Jack", "HPOL",
118*4882a593Smuzhiyun			"Headphone Jack", "HPOR";
119*4882a593Smuzhiyun		simple-audio-card,dai-link@0 {
120*4882a593Smuzhiyun			format = "i2s";
121*4882a593Smuzhiyun			cpu {
122*4882a593Smuzhiyun				sound-dai = <&i2s1_2ch>;
123*4882a593Smuzhiyun			};
124*4882a593Smuzhiyun			codec {
125*4882a593Smuzhiyun				sound-dai = <&rk809_codec 0>;
126*4882a593Smuzhiyun			};
127*4882a593Smuzhiyun		};
128*4882a593Smuzhiyun		simple-audio-card,dai-link@1 {
129*4882a593Smuzhiyun			format = "i2s";
130*4882a593Smuzhiyun			cpu {
131*4882a593Smuzhiyun				sound-dai = <&multi_dais>;
132*4882a593Smuzhiyun			};
133*4882a593Smuzhiyun			codec {
134*4882a593Smuzhiyun				sound-dai = <&rk809_codec 1>;
135*4882a593Smuzhiyun			};
136*4882a593Smuzhiyun		};
137*4882a593Smuzhiyun	};
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun	bt-sound {
140*4882a593Smuzhiyun		compatible = "simple-audio-card";
141*4882a593Smuzhiyun		status = "disabled";
142*4882a593Smuzhiyun		simple-audio-card,format = "dsp_a";
143*4882a593Smuzhiyun		simple-audio-card,bitclock-inversion = <1>;
144*4882a593Smuzhiyun		simple-audio-card,mclk-fs = <256>;
145*4882a593Smuzhiyun		simple-audio-card,name = "rockchip,bt";
146*4882a593Smuzhiyun		simple-audio-card,cpu {
147*4882a593Smuzhiyun			sound-dai = <&i2s2_2ch>;
148*4882a593Smuzhiyun		};
149*4882a593Smuzhiyun		simple-audio-card,codec {
150*4882a593Smuzhiyun			sound-dai = <&bt_sco>;
151*4882a593Smuzhiyun		};
152*4882a593Smuzhiyun	};
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun	bt_sco: bt-sco {
155*4882a593Smuzhiyun		compatible = "delta,dfbmcs320";
156*4882a593Smuzhiyun		#sound-dai-cells = <0>;
157*4882a593Smuzhiyun		status = "okay";
158*4882a593Smuzhiyun	};
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun	rk_headset: rk-headset {
161*4882a593Smuzhiyun		compatible = "rockchip_headset";
162*4882a593Smuzhiyun		headset_gpio = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
163*4882a593Smuzhiyun		pinctrl-names = "default";
164*4882a593Smuzhiyun		pinctrl-0 = <&hp_det>;
165*4882a593Smuzhiyun		io-channels = <&saradc 1>;
166*4882a593Smuzhiyun	};
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun	sdio_pwrseq: sdio-pwrseq {
169*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
170*4882a593Smuzhiyun		clocks = <&rk809 1>;
171*4882a593Smuzhiyun		clock-names = "ext_clock";
172*4882a593Smuzhiyun		pinctrl-names = "default";
173*4882a593Smuzhiyun		pinctrl-0 = <&wifi_enable_h>;
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun		/*
176*4882a593Smuzhiyun		 * On the module itself this is one of these (depending
177*4882a593Smuzhiyun		 * on the actual card populated):
178*4882a593Smuzhiyun		 * - SDIO_RESET_L_WL_REG_ON
179*4882a593Smuzhiyun		 * - PDN (power down when low)
180*4882a593Smuzhiyun		 */
181*4882a593Smuzhiyun		reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; /* GPIO3_A4 */
182*4882a593Smuzhiyun	};
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun	test-power {
185*4882a593Smuzhiyun		status = "okay";
186*4882a593Smuzhiyun	};
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun	vcc5v0_sys: vccsys {
189*4882a593Smuzhiyun		compatible = "regulator-fixed";
190*4882a593Smuzhiyun		regulator-name = "vcc5v0_sys";
191*4882a593Smuzhiyun		regulator-always-on;
192*4882a593Smuzhiyun		regulator-boot-on;
193*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
194*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
195*4882a593Smuzhiyun	};
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun	wireless-wlan {
198*4882a593Smuzhiyun		compatible = "wlan-platdata";
199*4882a593Smuzhiyun		wifi_chip_type = "AP6255";
200*4882a593Smuzhiyun		WIFI,host_wake_irq = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
201*4882a593Smuzhiyun		status = "okay";
202*4882a593Smuzhiyun	};
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun	wireless-bluetooth {
205*4882a593Smuzhiyun		compatible = "bluetooth-platdata";
206*4882a593Smuzhiyun		clocks = <&rk809 1>;
207*4882a593Smuzhiyun		clock-names = "ext_clock";
208*4882a593Smuzhiyun		uart_rts_gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_LOW>;
209*4882a593Smuzhiyun		pinctrl-names = "default","rts_gpio";
210*4882a593Smuzhiyun		pinctrl-0 = <&uart1_rts>;
211*4882a593Smuzhiyun		pinctrl-1 = <&uart1_rts_gpio>;
212*4882a593Smuzhiyun		BT,reset_gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
213*4882a593Smuzhiyun		BT,wake_gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
214*4882a593Smuzhiyun		BT,wake_host_irq = <&gpio0 RK_PA7 GPIO_ACTIVE_HIGH>;
215*4882a593Smuzhiyun		status = "okay";
216*4882a593Smuzhiyun	};
217*4882a593Smuzhiyun};
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun&bus_apll {
220*4882a593Smuzhiyun	bus-supply = <&vdd_logic>;
221*4882a593Smuzhiyun	status = "okay";
222*4882a593Smuzhiyun};
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun&cpu0 {
225*4882a593Smuzhiyun	cpu-supply = <&vdd_arm>;
226*4882a593Smuzhiyun};
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun&dfi {
229*4882a593Smuzhiyun	status = "okay";
230*4882a593Smuzhiyun};
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun&display_subsystem {
233*4882a593Smuzhiyun	status = "okay";
234*4882a593Smuzhiyun};
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun&dmc {
237*4882a593Smuzhiyun	center-supply = <&vdd_logic>;
238*4882a593Smuzhiyun	status = "okay";
239*4882a593Smuzhiyun};
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun&dsi {
242*4882a593Smuzhiyun	status = "okay";
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun	panel@0 {
245*4882a593Smuzhiyun		compatible = "sitronix,st7703", "simple-panel-dsi";
246*4882a593Smuzhiyun		reg = <0>;
247*4882a593Smuzhiyun		backlight = <&backlight>;
248*4882a593Smuzhiyun		enable-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
249*4882a593Smuzhiyun		prepare-delay-ms = <2>;
250*4882a593Smuzhiyun		reset-delay-ms = <1>;
251*4882a593Smuzhiyun		init-delay-ms = <20>;
252*4882a593Smuzhiyun		enable-delay-ms = <120>;
253*4882a593Smuzhiyun		disable-delay-ms = <50>;
254*4882a593Smuzhiyun		unprepare-delay-ms = <40>;
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun		width-mm = <68>;
257*4882a593Smuzhiyun		height-mm = <121>;
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
260*4882a593Smuzhiyun			      MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
261*4882a593Smuzhiyun		dsi,format = <MIPI_DSI_FMT_RGB888>;
262*4882a593Smuzhiyun		dsi,lanes = <4>;
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun		panel-init-sequence = [
265*4882a593Smuzhiyun			05 fa 01 11
266*4882a593Smuzhiyun			39 00 04 b9 f1 12 83
267*4882a593Smuzhiyun			39 00 1c ba 33 81 05 f9 0e 0e 00 00 00
268*4882a593Smuzhiyun				 00 00 00 00 00 44 25 00 91 0a
269*4882a593Smuzhiyun				 00 00 02 4f 01 00 00 37
270*4882a593Smuzhiyun			15 00 02 b8 25
271*4882a593Smuzhiyun			39 00 04 bf 02 11 00
272*4882a593Smuzhiyun			39 00 0b b3 0c 10 0a 50 03 ff 00 00 00
273*4882a593Smuzhiyun				 00
274*4882a593Smuzhiyun			39 00 0a c0 73 73 50 50 00 00 08 70 00
275*4882a593Smuzhiyun			15 00 02 bc 46
276*4882a593Smuzhiyun			15 00 02 cc 0b
277*4882a593Smuzhiyun			15 00 02 b4 80
278*4882a593Smuzhiyun			39 00 04 b2 c8 12 30
279*4882a593Smuzhiyun			39 00 0f e3 07 07 0b 0b 03 0b 00 00 00
280*4882a593Smuzhiyun				 00 ff 00 c0 10
281*4882a593Smuzhiyun			39 00 0d c1 53 00 1e 1e 77 e1 cc dd 67
282*4882a593Smuzhiyun				 77 33 33
283*4882a593Smuzhiyun			39 00 07 c6 00 00 ff ff 01 ff
284*4882a593Smuzhiyun			39 00 03 b5 09 09
285*4882a593Smuzhiyun			39 00 03 b6 87 95
286*4882a593Smuzhiyun			39 00 40 e9 c2 10 05 05 10 05 a0 12 31
287*4882a593Smuzhiyun				 23 3f 81 0a a0 37 18 00 80 01
288*4882a593Smuzhiyun				 00 00 00 00 80 01 00 00 00 48
289*4882a593Smuzhiyun				 f8 86 42 08 88 88 80 88 88 88
290*4882a593Smuzhiyun				 58 f8 87 53 18 88 88 81 88 88
291*4882a593Smuzhiyun				 88 00 00 00 01 00 00 00 00 00
292*4882a593Smuzhiyun				 00 00 00 00
293*4882a593Smuzhiyun			39 00 3e ea 00 1a 00 00 00 00 02 00 00
294*4882a593Smuzhiyun				 00 00 00 1f 88 81 35 78 88 88
295*4882a593Smuzhiyun				 85 88 88 88 0f 88 80 24 68 88
296*4882a593Smuzhiyun				 88 84 88 88 88 23 10 00 00 1c
297*4882a593Smuzhiyun				 00 00 00 00 00 00 00 00 00 00
298*4882a593Smuzhiyun				 00 00 00 00 00 30 05 a0 00 00
299*4882a593Smuzhiyun				 00 00
300*4882a593Smuzhiyun			39 00 23 e0 00 06 08 2a 31 3f 38 36 07
301*4882a593Smuzhiyun				 0c 0d 11 13 12 13 11 18 00 06
302*4882a593Smuzhiyun				 08 2a 31 3f 38 36 07 0c 0d 11
303*4882a593Smuzhiyun				 13 12 13 11 18
304*4882a593Smuzhiyun			05 32 01 29
305*4882a593Smuzhiyun		];
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun		panel-exit-sequence = [
308*4882a593Smuzhiyun			05 00 01 28
309*4882a593Smuzhiyun			05 00 01 10
310*4882a593Smuzhiyun		];
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun		display-timings {
313*4882a593Smuzhiyun			native-mode = <&timing0>;
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun			timing0: timing0 {
316*4882a593Smuzhiyun				clock-frequency = <66000000>;
317*4882a593Smuzhiyun				hactive = <720>;
318*4882a593Smuzhiyun				vactive = <1280>;
319*4882a593Smuzhiyun				hfront-porch = <40>;
320*4882a593Smuzhiyun				hsync-len = <10>;
321*4882a593Smuzhiyun				hback-porch = <40>;
322*4882a593Smuzhiyun				vfront-porch = <22>;
323*4882a593Smuzhiyun				vsync-len = <4>;
324*4882a593Smuzhiyun				vback-porch = <11>;
325*4882a593Smuzhiyun				hsync-active = <0>;
326*4882a593Smuzhiyun				vsync-active = <0>;
327*4882a593Smuzhiyun				de-active = <0>;
328*4882a593Smuzhiyun				pixelclk-active = <0>;
329*4882a593Smuzhiyun			};
330*4882a593Smuzhiyun		};
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun		ports {
333*4882a593Smuzhiyun			#address-cells = <1>;
334*4882a593Smuzhiyun			#size-cells = <0>;
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun			port@0 {
337*4882a593Smuzhiyun				reg = <0>;
338*4882a593Smuzhiyun				panel_in_dsi: endpoint {
339*4882a593Smuzhiyun					remote-endpoint = <&dsi_out_panel>;
340*4882a593Smuzhiyun				};
341*4882a593Smuzhiyun			};
342*4882a593Smuzhiyun		};
343*4882a593Smuzhiyun	};
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun	ports {
346*4882a593Smuzhiyun		#address-cells = <1>;
347*4882a593Smuzhiyun		#size-cells = <0>;
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun		port@1 {
350*4882a593Smuzhiyun			reg = <1>;
351*4882a593Smuzhiyun			dsi_out_panel: endpoint {
352*4882a593Smuzhiyun				remote-endpoint = <&panel_in_dsi>;
353*4882a593Smuzhiyun			};
354*4882a593Smuzhiyun		};
355*4882a593Smuzhiyun	};
356*4882a593Smuzhiyun};
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun&dsi_in_vopb {
359*4882a593Smuzhiyun	status = "okay";
360*4882a593Smuzhiyun};
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun&dsi_in_vopl {
363*4882a593Smuzhiyun	status = "disabled";
364*4882a593Smuzhiyun};
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun&route_dsi {
367*4882a593Smuzhiyun	connect = <&vopb_out_dsi>;
368*4882a593Smuzhiyun	status = "okay";
369*4882a593Smuzhiyun};
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun&emmc {
372*4882a593Smuzhiyun	bus-width = <8>;
373*4882a593Smuzhiyun	cap-mmc-highspeed;
374*4882a593Smuzhiyun	mmc-hs200-1_8v;
375*4882a593Smuzhiyun	no-sdio;
376*4882a593Smuzhiyun	no-sd;
377*4882a593Smuzhiyun	disable-wp;
378*4882a593Smuzhiyun	non-removable;
379*4882a593Smuzhiyun	num-slots = <1>;
380*4882a593Smuzhiyun	status = "okay";
381*4882a593Smuzhiyun};
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun&gpu {
384*4882a593Smuzhiyun	mali-supply = <&vdd_logic>;
385*4882a593Smuzhiyun	status = "okay";
386*4882a593Smuzhiyun};
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun&i2c0 {
389*4882a593Smuzhiyun	status = "okay";
390*4882a593Smuzhiyun	clock-frequency = <400000>;
391*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <280>;
392*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <16>;
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun	rk809: pmic@20 {
395*4882a593Smuzhiyun		compatible = "rockchip,rk809";
396*4882a593Smuzhiyun		reg = <0x20>;
397*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
398*4882a593Smuzhiyun		interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
399*4882a593Smuzhiyun		pinctrl-names = "default", "pmic-sleep",
400*4882a593Smuzhiyun				"pmic-power-off", "pmic-reset";
401*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int>;
402*4882a593Smuzhiyun		pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
403*4882a593Smuzhiyun		pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
404*4882a593Smuzhiyun		pinctrl-3 = <&soc_slppin_rst>, <&rk817_slppin_rst>;
405*4882a593Smuzhiyun		rockchip,system-power-controller;
406*4882a593Smuzhiyun		wakeup-source;
407*4882a593Smuzhiyun		#clock-cells = <1>;
408*4882a593Smuzhiyun		clock-output-names = "rk808-clkout1", "rk808-clkout2";
409*4882a593Smuzhiyun		//fb-inner-reg-idxs = <2>;
410*4882a593Smuzhiyun		/* 1: rst regs (default in codes), 0: rst the pmic */
411*4882a593Smuzhiyun		pmic-reset-func = <1>;
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun		vcc1-supply = <&vcc5v0_sys>;
414*4882a593Smuzhiyun		vcc2-supply = <&vcc5v0_sys>;
415*4882a593Smuzhiyun		vcc3-supply = <&vcc5v0_sys>;
416*4882a593Smuzhiyun		vcc4-supply = <&vcc5v0_sys>;
417*4882a593Smuzhiyun		vcc5-supply = <&vcc3v3_sys>;
418*4882a593Smuzhiyun		vcc6-supply = <&vcc3v3_sys>;
419*4882a593Smuzhiyun		vcc7-supply = <&vcc3v3_sys>;
420*4882a593Smuzhiyun		vcc8-supply = <&vcc3v3_sys>;
421*4882a593Smuzhiyun		vcc9-supply = <&vcc5v0_sys>;
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun		pwrkey {
424*4882a593Smuzhiyun			status = "okay";
425*4882a593Smuzhiyun		};
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun		pinctrl_rk8xx: pinctrl_rk8xx {
428*4882a593Smuzhiyun			gpio-controller;
429*4882a593Smuzhiyun			#gpio-cells = <2>;
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun			rk817_slppin_null: rk817_slppin_null {
432*4882a593Smuzhiyun				pins = "gpio_slp";
433*4882a593Smuzhiyun				function = "pin_fun0";
434*4882a593Smuzhiyun			};
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun			rk817_slppin_slp: rk817_slppin_slp {
437*4882a593Smuzhiyun				pins = "gpio_slp";
438*4882a593Smuzhiyun				function = "pin_fun1";
439*4882a593Smuzhiyun			};
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun			rk817_slppin_pwrdn: rk817_slppin_pwrdn {
442*4882a593Smuzhiyun				pins = "gpio_slp";
443*4882a593Smuzhiyun				function = "pin_fun2";
444*4882a593Smuzhiyun			};
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun			rk817_slppin_rst: rk817_slppin_rst {
447*4882a593Smuzhiyun				pins = "gpio_slp";
448*4882a593Smuzhiyun				function = "pin_fun3";
449*4882a593Smuzhiyun			};
450*4882a593Smuzhiyun		};
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun		regulators {
453*4882a593Smuzhiyun			vdd_logic: DCDC_REG1 {
454*4882a593Smuzhiyun				regulator-always-on;
455*4882a593Smuzhiyun				regulator-boot-on;
456*4882a593Smuzhiyun				regulator-min-microvolt = <850000>;
457*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
458*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
459*4882a593Smuzhiyun				regulator-initial-mode = <0x2>;
460*4882a593Smuzhiyun				regulator-name = "vdd_logic";
461*4882a593Smuzhiyun				regulator-state-mem {
462*4882a593Smuzhiyun					regulator-on-in-suspend;
463*4882a593Smuzhiyun					regulator-suspend-microvolt = <950000>;
464*4882a593Smuzhiyun				};
465*4882a593Smuzhiyun			};
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun			vdd_arm: DCDC_REG2 {
468*4882a593Smuzhiyun				regulator-always-on;
469*4882a593Smuzhiyun				regulator-boot-on;
470*4882a593Smuzhiyun				regulator-min-microvolt = <850000>;
471*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
472*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
473*4882a593Smuzhiyun				regulator-initial-mode = <0x2>;
474*4882a593Smuzhiyun				regulator-name = "vdd_arm";
475*4882a593Smuzhiyun				regulator-state-mem {
476*4882a593Smuzhiyun					regulator-off-in-suspend;
477*4882a593Smuzhiyun					regulator-suspend-microvolt = <950000>;
478*4882a593Smuzhiyun				};
479*4882a593Smuzhiyun			};
480*4882a593Smuzhiyun
481*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
482*4882a593Smuzhiyun				regulator-always-on;
483*4882a593Smuzhiyun				regulator-boot-on;
484*4882a593Smuzhiyun				regulator-initial-mode = <0x2>;
485*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
486*4882a593Smuzhiyun				regulator-state-mem {
487*4882a593Smuzhiyun					regulator-on-in-suspend;
488*4882a593Smuzhiyun				};
489*4882a593Smuzhiyun			};
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun			vcc_3v0: DCDC_REG4 {
492*4882a593Smuzhiyun				regulator-always-on;
493*4882a593Smuzhiyun				regulator-boot-on;
494*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
495*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
496*4882a593Smuzhiyun				regulator-initial-mode = <0x2>;
497*4882a593Smuzhiyun				regulator-name = "vcc_3v0";
498*4882a593Smuzhiyun				regulator-state-mem {
499*4882a593Smuzhiyun					regulator-off-in-suspend;
500*4882a593Smuzhiyun					regulator-suspend-microvolt = <3000000>;
501*4882a593Smuzhiyun				};
502*4882a593Smuzhiyun			};
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun			vcc_1v0: LDO_REG1 {
505*4882a593Smuzhiyun				regulator-always-on;
506*4882a593Smuzhiyun				regulator-boot-on;
507*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
508*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
509*4882a593Smuzhiyun				regulator-name = "vcc_1v0";
510*4882a593Smuzhiyun				regulator-state-mem {
511*4882a593Smuzhiyun					regulator-on-in-suspend;
512*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
513*4882a593Smuzhiyun				};
514*4882a593Smuzhiyun			};
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun			vcc1v8_soc: LDO_REG2 {
517*4882a593Smuzhiyun				regulator-always-on;
518*4882a593Smuzhiyun				regulator-boot-on;
519*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
520*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun				regulator-name = "vcc1v8_soc";
523*4882a593Smuzhiyun				regulator-state-mem {
524*4882a593Smuzhiyun					regulator-on-in-suspend;
525*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
526*4882a593Smuzhiyun				};
527*4882a593Smuzhiyun			};
528*4882a593Smuzhiyun
529*4882a593Smuzhiyun			vdd1v0_soc: LDO_REG3 {
530*4882a593Smuzhiyun				regulator-always-on;
531*4882a593Smuzhiyun				regulator-boot-on;
532*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
533*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun				regulator-name = "vcc1v0_soc";
536*4882a593Smuzhiyun				regulator-state-mem {
537*4882a593Smuzhiyun					regulator-on-in-suspend;
538*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
539*4882a593Smuzhiyun				};
540*4882a593Smuzhiyun			};
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun			vcc3v0_pmu: LDO_REG4 {
543*4882a593Smuzhiyun				regulator-always-on;
544*4882a593Smuzhiyun				regulator-boot-on;
545*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
546*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
547*4882a593Smuzhiyun
548*4882a593Smuzhiyun				regulator-name = "vcc3v0_pmu";
549*4882a593Smuzhiyun				regulator-state-mem {
550*4882a593Smuzhiyun					regulator-on-in-suspend;
551*4882a593Smuzhiyun					regulator-suspend-microvolt = <3000000>;
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun				};
554*4882a593Smuzhiyun			};
555*4882a593Smuzhiyun
556*4882a593Smuzhiyun			vccio_sd: LDO_REG5 {
557*4882a593Smuzhiyun				regulator-always-on;
558*4882a593Smuzhiyun				regulator-boot-on;
559*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
560*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun				regulator-name = "vccio_sd";
563*4882a593Smuzhiyun				regulator-state-mem {
564*4882a593Smuzhiyun					regulator-on-in-suspend;
565*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
566*4882a593Smuzhiyun				};
567*4882a593Smuzhiyun			};
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun			vcc_sd: LDO_REG6 {
570*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
571*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
572*4882a593Smuzhiyun
573*4882a593Smuzhiyun				regulator-name = "vcc_sd";
574*4882a593Smuzhiyun				regulator-state-mem {
575*4882a593Smuzhiyun					regulator-on-in-suspend;
576*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
577*4882a593Smuzhiyun
578*4882a593Smuzhiyun				};
579*4882a593Smuzhiyun			};
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun			vcc2v8_dvp: LDO_REG7 {
582*4882a593Smuzhiyun				regulator-always-on;
583*4882a593Smuzhiyun				regulator-boot-on;
584*4882a593Smuzhiyun				regulator-min-microvolt = <2800000>;
585*4882a593Smuzhiyun				regulator-max-microvolt = <2800000>;
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun				regulator-name = "vcc2v8_dvp";
588*4882a593Smuzhiyun				regulator-state-mem {
589*4882a593Smuzhiyun					regulator-off-in-suspend;
590*4882a593Smuzhiyun					regulator-suspend-microvolt = <2800000>;
591*4882a593Smuzhiyun				};
592*4882a593Smuzhiyun			};
593*4882a593Smuzhiyun
594*4882a593Smuzhiyun			vcc1v8_dvp: LDO_REG8 {
595*4882a593Smuzhiyun				regulator-always-on;
596*4882a593Smuzhiyun				regulator-boot-on;
597*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
598*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
599*4882a593Smuzhiyun
600*4882a593Smuzhiyun				regulator-name = "vcc1v8_dvp";
601*4882a593Smuzhiyun				regulator-state-mem {
602*4882a593Smuzhiyun					regulator-on-in-suspend;
603*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
604*4882a593Smuzhiyun				};
605*4882a593Smuzhiyun			};
606*4882a593Smuzhiyun
607*4882a593Smuzhiyun			vdd1v5_dvp: LDO_REG9 {
608*4882a593Smuzhiyun				regulator-always-on;
609*4882a593Smuzhiyun				regulator-boot-on;
610*4882a593Smuzhiyun				regulator-min-microvolt = <1500000>;
611*4882a593Smuzhiyun				regulator-max-microvolt = <1500000>;
612*4882a593Smuzhiyun
613*4882a593Smuzhiyun				regulator-name = "vdd1v5_dvp";
614*4882a593Smuzhiyun				regulator-state-mem {
615*4882a593Smuzhiyun					regulator-off-in-suspend;
616*4882a593Smuzhiyun					regulator-suspend-microvolt = <1500000>;
617*4882a593Smuzhiyun				};
618*4882a593Smuzhiyun			};
619*4882a593Smuzhiyun
620*4882a593Smuzhiyun			vcc3v3_sys: DCDC_REG5 {
621*4882a593Smuzhiyun				regulator-always-on;
622*4882a593Smuzhiyun				regulator-boot-on;
623*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
624*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
625*4882a593Smuzhiyun				regulator-name = "vcc3v3_sys";
626*4882a593Smuzhiyun				regulator-state-mem {
627*4882a593Smuzhiyun					regulator-on-in-suspend;
628*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
629*4882a593Smuzhiyun				};
630*4882a593Smuzhiyun			};
631*4882a593Smuzhiyun
632*4882a593Smuzhiyun			vcc5v0_host: SWITCH_REG1 {
633*4882a593Smuzhiyun				regulator-name = "vcc5v0_host";
634*4882a593Smuzhiyun			};
635*4882a593Smuzhiyun
636*4882a593Smuzhiyun			vcc3v3_lcd: SWITCH_REG2 {
637*4882a593Smuzhiyun				regulator-boot-on;
638*4882a593Smuzhiyun				regulator-name = "vcc3v3_lcd";
639*4882a593Smuzhiyun			};
640*4882a593Smuzhiyun		};
641*4882a593Smuzhiyun
642*4882a593Smuzhiyun		rk809_codec: codec {
643*4882a593Smuzhiyun			#sound-dai-cells = <1>;
644*4882a593Smuzhiyun			compatible = "rockchip,rk809-codec", "rockchip,rk817-codec";
645*4882a593Smuzhiyun			clocks = <&cru SCLK_I2S1_OUT>;
646*4882a593Smuzhiyun			clock-names = "mclk";
647*4882a593Smuzhiyun			pinctrl-names = "default";
648*4882a593Smuzhiyun			pinctrl-0 = <&i2s1_2ch_mclk>;
649*4882a593Smuzhiyun			pdmdata-out-enable;
650*4882a593Smuzhiyun			use-ext-amplifier;
651*4882a593Smuzhiyun			adc-for-loopback;
652*4882a593Smuzhiyun			spk-ctl-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;
653*4882a593Smuzhiyun			hp-volume = <20>;
654*4882a593Smuzhiyun			spk-volume = <20>;
655*4882a593Smuzhiyun		};
656*4882a593Smuzhiyun	};
657*4882a593Smuzhiyun};
658*4882a593Smuzhiyun
659*4882a593Smuzhiyun&i2c1 {
660*4882a593Smuzhiyun	status = "okay";
661*4882a593Smuzhiyun	clock-frequency = <400000>;
662*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <275>;
663*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <16>;
664*4882a593Smuzhiyun
665*4882a593Smuzhiyun	gt1x: gt1x@14 {
666*4882a593Smuzhiyun	      compatible = "goodix,gt1x";
667*4882a593Smuzhiyun	      reg = <0x14>;
668*4882a593Smuzhiyun	      goodix,rst-gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
669*4882a593Smuzhiyun	      goodix,irq-gpio = <&gpio0 RK_PB3 IRQ_TYPE_LEVEL_LOW>;
670*4882a593Smuzhiyun	};
671*4882a593Smuzhiyun
672*4882a593Smuzhiyun	is31fl3236: led-controller@3c {
673*4882a593Smuzhiyun		compatible = "issi,is31fl3236";
674*4882a593Smuzhiyun		reg = <0x3c>;
675*4882a593Smuzhiyun		#address-cells = <1>;
676*4882a593Smuzhiyun		#size-cells = <0>;
677*4882a593Smuzhiyun		reset-gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
678*4882a593Smuzhiyun		status = "okay";
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun		led1: led@1 {
681*4882a593Smuzhiyun			label = "led1";
682*4882a593Smuzhiyun			reg = <1>;
683*4882a593Smuzhiyun			led-max-microamp = <10000>;
684*4882a593Smuzhiyun			linux,default-trigger = "timer";
685*4882a593Smuzhiyun			linux,default-trigger-delay-ms = <0>;
686*4882a593Smuzhiyun			linux,blink-delay-on-ms = <100>;
687*4882a593Smuzhiyun			linux,blink-delay-off-ms = <1200>;
688*4882a593Smuzhiyun		};
689*4882a593Smuzhiyun
690*4882a593Smuzhiyun		led2: led@2 {
691*4882a593Smuzhiyun			label = "led2";
692*4882a593Smuzhiyun			reg = <2>;
693*4882a593Smuzhiyun			led-max-microamp = <10000>;
694*4882a593Smuzhiyun			linux,default-trigger = "timer";
695*4882a593Smuzhiyun			linux,default-trigger-delay-ms = <0>;
696*4882a593Smuzhiyun			linux,blink-delay-on-ms = <100>;
697*4882a593Smuzhiyun			linux,blink-delay-off-ms = <1200>;
698*4882a593Smuzhiyun		};
699*4882a593Smuzhiyun
700*4882a593Smuzhiyun		led3: led@3 {
701*4882a593Smuzhiyun			label = "led3";
702*4882a593Smuzhiyun			reg = <3>;
703*4882a593Smuzhiyun			led-max-microamp = <10000>;
704*4882a593Smuzhiyun			linux,default-trigger = "default-on";
705*4882a593Smuzhiyun		};
706*4882a593Smuzhiyun
707*4882a593Smuzhiyun		led4: led@4 {
708*4882a593Smuzhiyun			label = "led4";
709*4882a593Smuzhiyun			reg = <4>;
710*4882a593Smuzhiyun			led-max-microamp = <10000>;
711*4882a593Smuzhiyun			linux,default-trigger = "timer";
712*4882a593Smuzhiyun			linux,default-trigger-delay-ms = <100>;
713*4882a593Smuzhiyun			linux,blink-delay-on-ms = <100>;
714*4882a593Smuzhiyun			linux,blink-delay-off-ms = <1200>;
715*4882a593Smuzhiyun		};
716*4882a593Smuzhiyun
717*4882a593Smuzhiyun		led5: led@5 {
718*4882a593Smuzhiyun			label = "led5";
719*4882a593Smuzhiyun			reg = <5>;
720*4882a593Smuzhiyun			led-max-microamp = <10000>;
721*4882a593Smuzhiyun			linux,default-trigger = "timer";
722*4882a593Smuzhiyun			linux,default-trigger-delay-ms = <100>;
723*4882a593Smuzhiyun			linux,blink-delay-on-ms = <100>;
724*4882a593Smuzhiyun			linux,blink-delay-off-ms = <1200>;
725*4882a593Smuzhiyun		};
726*4882a593Smuzhiyun
727*4882a593Smuzhiyun		led6: led@6 {
728*4882a593Smuzhiyun			label = "led6";
729*4882a593Smuzhiyun			reg = <6>;
730*4882a593Smuzhiyun			led-max-microamp = <10000>;
731*4882a593Smuzhiyun			linux,default-trigger = "default-on";
732*4882a593Smuzhiyun		};
733*4882a593Smuzhiyun
734*4882a593Smuzhiyun		led7: led@7 {
735*4882a593Smuzhiyun			label = "led7";
736*4882a593Smuzhiyun			reg = <7>;
737*4882a593Smuzhiyun			led-max-microamp = <10000>;
738*4882a593Smuzhiyun			linux,default-trigger = "timer";
739*4882a593Smuzhiyun			linux,default-trigger-delay-ms = <200>;
740*4882a593Smuzhiyun			linux,blink-delay-on-ms = <100>;
741*4882a593Smuzhiyun			linux,blink-delay-off-ms = <1200>;
742*4882a593Smuzhiyun		};
743*4882a593Smuzhiyun
744*4882a593Smuzhiyun		led8: led@8 {
745*4882a593Smuzhiyun			label = "led8";
746*4882a593Smuzhiyun			reg = <8>;
747*4882a593Smuzhiyun			led-max-microamp = <10000>;
748*4882a593Smuzhiyun			linux,default-trigger = "timer";
749*4882a593Smuzhiyun			linux,default-trigger-delay-ms = <200>;
750*4882a593Smuzhiyun			linux,blink-delay-on-ms = <100>;
751*4882a593Smuzhiyun			linux,blink-delay-off-ms = <1200>;
752*4882a593Smuzhiyun		};
753*4882a593Smuzhiyun
754*4882a593Smuzhiyun		led9: led@9 {
755*4882a593Smuzhiyun			label = "led9";
756*4882a593Smuzhiyun			reg = <9>;
757*4882a593Smuzhiyun			led-max-microamp = <10000>;
758*4882a593Smuzhiyun			linux,default-trigger = "default-on";
759*4882a593Smuzhiyun		};
760*4882a593Smuzhiyun
761*4882a593Smuzhiyun		led10: led@10 {
762*4882a593Smuzhiyun			label = "led10";
763*4882a593Smuzhiyun			reg = <10>;
764*4882a593Smuzhiyun			led-max-microamp = <10000>;
765*4882a593Smuzhiyun			linux,default-trigger = "timer";
766*4882a593Smuzhiyun			linux,default-trigger-delay-ms = <300>;
767*4882a593Smuzhiyun			linux,blink-delay-on-ms = <100>;
768*4882a593Smuzhiyun			linux,blink-delay-off-ms = <1200>;
769*4882a593Smuzhiyun		};
770*4882a593Smuzhiyun
771*4882a593Smuzhiyun		led11: led@11 {
772*4882a593Smuzhiyun			label = "led11";
773*4882a593Smuzhiyun			reg = <11>;
774*4882a593Smuzhiyun			led-max-microamp = <10000>;
775*4882a593Smuzhiyun			linux,default-trigger = "timer";
776*4882a593Smuzhiyun			linux,default-trigger-delay-ms = <300>;
777*4882a593Smuzhiyun			linux,blink-delay-on-ms = <100>;
778*4882a593Smuzhiyun			linux,blink-delay-off-ms = <1200>;
779*4882a593Smuzhiyun		};
780*4882a593Smuzhiyun
781*4882a593Smuzhiyun		led12: led@12 {
782*4882a593Smuzhiyun			label = "led12";
783*4882a593Smuzhiyun			reg = <12>;
784*4882a593Smuzhiyun			led-max-microamp = <10000>;
785*4882a593Smuzhiyun			linux,default-trigger = "default-on";
786*4882a593Smuzhiyun		};
787*4882a593Smuzhiyun
788*4882a593Smuzhiyun		led13: led@13 {
789*4882a593Smuzhiyun			label = "led13";
790*4882a593Smuzhiyun			reg = <13>;
791*4882a593Smuzhiyun			led-max-microamp = <10000>;
792*4882a593Smuzhiyun			linux,default-trigger = "timer";
793*4882a593Smuzhiyun			linux,default-trigger-delay-ms = <400>;
794*4882a593Smuzhiyun			linux,blink-delay-on-ms = <100>;
795*4882a593Smuzhiyun			linux,blink-delay-off-ms = <1200>;
796*4882a593Smuzhiyun		};
797*4882a593Smuzhiyun
798*4882a593Smuzhiyun		led14: led@14 {
799*4882a593Smuzhiyun			label = "led14";
800*4882a593Smuzhiyun			reg = <14>;
801*4882a593Smuzhiyun			led-max-microamp = <10000>;
802*4882a593Smuzhiyun			linux,default-trigger = "timer";
803*4882a593Smuzhiyun			linux,default-trigger-delay-ms = <400>;
804*4882a593Smuzhiyun			linux,blink-delay-on-ms = <100>;
805*4882a593Smuzhiyun			linux,blink-delay-off-ms = <1200>;
806*4882a593Smuzhiyun		};
807*4882a593Smuzhiyun
808*4882a593Smuzhiyun		led15: led@15 {
809*4882a593Smuzhiyun			label = "led15";
810*4882a593Smuzhiyun			reg = <15>;
811*4882a593Smuzhiyun			led-max-microamp = <10000>;
812*4882a593Smuzhiyun			linux,default-trigger = "default-on";
813*4882a593Smuzhiyun		};
814*4882a593Smuzhiyun
815*4882a593Smuzhiyun		led16: led@16 {
816*4882a593Smuzhiyun			label = "led16";
817*4882a593Smuzhiyun			reg = <16>;
818*4882a593Smuzhiyun			led-max-microamp = <10000>;
819*4882a593Smuzhiyun			linux,default-trigger = "timer";
820*4882a593Smuzhiyun			linux,default-trigger-delay-ms = <500>;
821*4882a593Smuzhiyun			linux,blink-delay-on-ms = <100>;
822*4882a593Smuzhiyun			linux,blink-delay-off-ms = <1200>;
823*4882a593Smuzhiyun		};
824*4882a593Smuzhiyun
825*4882a593Smuzhiyun		led17: led@17 {
826*4882a593Smuzhiyun			label = "led17";
827*4882a593Smuzhiyun			reg = <17>;
828*4882a593Smuzhiyun			led-max-microamp = <10000>;
829*4882a593Smuzhiyun			linux,default-trigger = "timer";
830*4882a593Smuzhiyun			linux,default-trigger-delay-ms = <500>;
831*4882a593Smuzhiyun			linux,blink-delay-on-ms = <100>;
832*4882a593Smuzhiyun			linux,blink-delay-off-ms = <1200>;
833*4882a593Smuzhiyun		};
834*4882a593Smuzhiyun
835*4882a593Smuzhiyun		led18: led@18 {
836*4882a593Smuzhiyun			label = "led18";
837*4882a593Smuzhiyun			reg = <18>;
838*4882a593Smuzhiyun			led-max-microamp = <10000>;
839*4882a593Smuzhiyun			linux,default-trigger = "default-on";
840*4882a593Smuzhiyun		};
841*4882a593Smuzhiyun
842*4882a593Smuzhiyun		led19: led@19 {
843*4882a593Smuzhiyun			label = "led19";
844*4882a593Smuzhiyun			reg = <19>;
845*4882a593Smuzhiyun			led-max-microamp = <10000>;
846*4882a593Smuzhiyun			linux,default-trigger = "timer";
847*4882a593Smuzhiyun			linux,default-trigger-delay-ms = <600>;
848*4882a593Smuzhiyun			linux,blink-delay-on-ms = <100>;
849*4882a593Smuzhiyun			linux,blink-delay-off-ms = <1200>;
850*4882a593Smuzhiyun		};
851*4882a593Smuzhiyun
852*4882a593Smuzhiyun		led20: led@20 {
853*4882a593Smuzhiyun			label = "led20";
854*4882a593Smuzhiyun			reg = <20>;
855*4882a593Smuzhiyun			led-max-microamp = <10000>;
856*4882a593Smuzhiyun			linux,default-trigger = "timer";
857*4882a593Smuzhiyun			linux,default-trigger-delay-ms = <600>;
858*4882a593Smuzhiyun			linux,blink-delay-on-ms = <100>;
859*4882a593Smuzhiyun			linux,blink-delay-off-ms = <1200>;
860*4882a593Smuzhiyun		};
861*4882a593Smuzhiyun
862*4882a593Smuzhiyun		led21: led@21 {
863*4882a593Smuzhiyun			label = "led21";
864*4882a593Smuzhiyun			reg = <21>;
865*4882a593Smuzhiyun			led-max-microamp = <10000>;
866*4882a593Smuzhiyun			linux,default-trigger = "default-on";
867*4882a593Smuzhiyun		};
868*4882a593Smuzhiyun
869*4882a593Smuzhiyun		led22: led@22 {
870*4882a593Smuzhiyun			label = "led22";
871*4882a593Smuzhiyun			reg = <22>;
872*4882a593Smuzhiyun			led-max-microamp = <10000>;
873*4882a593Smuzhiyun			linux,default-trigger = "timer";
874*4882a593Smuzhiyun			linux,default-trigger-delay-ms = <700>;
875*4882a593Smuzhiyun			linux,blink-delay-on-ms = <100>;
876*4882a593Smuzhiyun			linux,blink-delay-off-ms = <1200>;
877*4882a593Smuzhiyun		};
878*4882a593Smuzhiyun
879*4882a593Smuzhiyun		led23: led@23 {
880*4882a593Smuzhiyun			label = "led23";
881*4882a593Smuzhiyun			reg = <23>;
882*4882a593Smuzhiyun			led-max-microamp = <10000>;
883*4882a593Smuzhiyun			linux,default-trigger = "timer";
884*4882a593Smuzhiyun			linux,default-trigger-delay-ms = <700>;
885*4882a593Smuzhiyun			linux,blink-delay-on-ms = <100>;
886*4882a593Smuzhiyun			linux,blink-delay-off-ms = <1200>;
887*4882a593Smuzhiyun		};
888*4882a593Smuzhiyun
889*4882a593Smuzhiyun		led124: led@24 {
890*4882a593Smuzhiyun			label = "led24";
891*4882a593Smuzhiyun			reg = <24>;
892*4882a593Smuzhiyun			led-max-microamp = <10000>;
893*4882a593Smuzhiyun			linux,default-trigger = "default-on";
894*4882a593Smuzhiyun		};
895*4882a593Smuzhiyun
896*4882a593Smuzhiyun		led25: led@25 {
897*4882a593Smuzhiyun			label = "led25";
898*4882a593Smuzhiyun			reg = <25>;
899*4882a593Smuzhiyun			led-max-microamp = <10000>;
900*4882a593Smuzhiyun			linux,default-trigger = "timer";
901*4882a593Smuzhiyun			linux,default-trigger-delay-ms = <800>;
902*4882a593Smuzhiyun			linux,blink-delay-on-ms = <100>;
903*4882a593Smuzhiyun			linux,blink-delay-off-ms = <1200>;
904*4882a593Smuzhiyun		};
905*4882a593Smuzhiyun
906*4882a593Smuzhiyun		led26: led@26 {
907*4882a593Smuzhiyun			label = "led26";
908*4882a593Smuzhiyun			reg = <26>;
909*4882a593Smuzhiyun			led-max-microamp = <10000>;
910*4882a593Smuzhiyun			linux,default-trigger = "timer";
911*4882a593Smuzhiyun			linux,default-trigger-delay-ms = <800>;
912*4882a593Smuzhiyun			linux,blink-delay-on-ms = <100>;
913*4882a593Smuzhiyun			linux,blink-delay-off-ms = <1200>;
914*4882a593Smuzhiyun		};
915*4882a593Smuzhiyun
916*4882a593Smuzhiyun		led27: led@27 {
917*4882a593Smuzhiyun			label = "led27";
918*4882a593Smuzhiyun			reg = <27>;
919*4882a593Smuzhiyun			led-max-microamp = <10000>;
920*4882a593Smuzhiyun			linux,default-trigger = "default-on";
921*4882a593Smuzhiyun		};
922*4882a593Smuzhiyun
923*4882a593Smuzhiyun		led28: led@28 {
924*4882a593Smuzhiyun			label = "led28";
925*4882a593Smuzhiyun			reg = <28>;
926*4882a593Smuzhiyun			led-max-microamp = <10000>;
927*4882a593Smuzhiyun			linux,default-trigger = "timer";
928*4882a593Smuzhiyun			linux,default-trigger-delay-ms = <900>;
929*4882a593Smuzhiyun			linux,blink-delay-on-ms = <100>;
930*4882a593Smuzhiyun			linux,blink-delay-off-ms = <1200>;
931*4882a593Smuzhiyun		};
932*4882a593Smuzhiyun
933*4882a593Smuzhiyun		led29: led@29 {
934*4882a593Smuzhiyun			label = "led29";
935*4882a593Smuzhiyun			reg = <29>;
936*4882a593Smuzhiyun			led-max-microamp = <10000>;
937*4882a593Smuzhiyun			linux,default-trigger = "timer";
938*4882a593Smuzhiyun			linux,default-trigger-delay-ms = <900>;
939*4882a593Smuzhiyun			linux,blink-delay-on-ms = <100>;
940*4882a593Smuzhiyun			linux,blink-delay-off-ms = <1200>;
941*4882a593Smuzhiyun		};
942*4882a593Smuzhiyun
943*4882a593Smuzhiyun		led30: led@30 {
944*4882a593Smuzhiyun			label = "led30";
945*4882a593Smuzhiyun			reg = <30>;
946*4882a593Smuzhiyun			led-max-microamp = <10000>;
947*4882a593Smuzhiyun			linux,default-trigger = "default-on";
948*4882a593Smuzhiyun		};
949*4882a593Smuzhiyun
950*4882a593Smuzhiyun		led31: led@31 {
951*4882a593Smuzhiyun			label = "led31";
952*4882a593Smuzhiyun			reg = <31>;
953*4882a593Smuzhiyun			led-max-microamp = <10000>;
954*4882a593Smuzhiyun			linux,default-trigger = "timer";
955*4882a593Smuzhiyun			linux,default-trigger-delay-ms = <1000>;
956*4882a593Smuzhiyun			linux,blink-delay-on-ms = <100>;
957*4882a593Smuzhiyun			linux,blink-delay-off-ms = <1200>;
958*4882a593Smuzhiyun		};
959*4882a593Smuzhiyun
960*4882a593Smuzhiyun		led32: led@32 {
961*4882a593Smuzhiyun			label = "led32";
962*4882a593Smuzhiyun			reg = <32>;
963*4882a593Smuzhiyun			led-max-microamp = <10000>;
964*4882a593Smuzhiyun			linux,default-trigger = "timer";
965*4882a593Smuzhiyun			linux,default-trigger-delay-ms = <1000>;
966*4882a593Smuzhiyun			linux,blink-delay-on-ms = <100>;
967*4882a593Smuzhiyun			linux,blink-delay-off-ms = <1200>;
968*4882a593Smuzhiyun		};
969*4882a593Smuzhiyun
970*4882a593Smuzhiyun		led33: led@33 {
971*4882a593Smuzhiyun			label = "led33";
972*4882a593Smuzhiyun			reg = <33>;
973*4882a593Smuzhiyun			led-max-microamp = <10000>;
974*4882a593Smuzhiyun			linux,default-trigger = "default-on";
975*4882a593Smuzhiyun		};
976*4882a593Smuzhiyun
977*4882a593Smuzhiyun		led34: led@34 {
978*4882a593Smuzhiyun			label = "led34";
979*4882a593Smuzhiyun			reg = <34>;
980*4882a593Smuzhiyun			led-max-microamp = <10000>;
981*4882a593Smuzhiyun			linux,default-trigger = "timer";
982*4882a593Smuzhiyun			linux,default-trigger-delay-ms = <1100>;
983*4882a593Smuzhiyun			linux,blink-delay-on-ms = <100>;
984*4882a593Smuzhiyun			linux,blink-delay-off-ms = <1200>;
985*4882a593Smuzhiyun		};
986*4882a593Smuzhiyun
987*4882a593Smuzhiyun		led35: led@35 {
988*4882a593Smuzhiyun			label = "led35";
989*4882a593Smuzhiyun			reg = <35>;
990*4882a593Smuzhiyun			led-max-microamp = <10000>;
991*4882a593Smuzhiyun			linux,default-trigger = "timer";
992*4882a593Smuzhiyun			linux,default-trigger-delay-ms = <1100>;
993*4882a593Smuzhiyun			linux,blink-delay-on-ms = <100>;
994*4882a593Smuzhiyun			linux,blink-delay-off-ms = <1200>;
995*4882a593Smuzhiyun		};
996*4882a593Smuzhiyun
997*4882a593Smuzhiyun		led36: led@36 {
998*4882a593Smuzhiyun			label = "led36";
999*4882a593Smuzhiyun			reg = <36>;
1000*4882a593Smuzhiyun			led-max-microamp = <10000>;
1001*4882a593Smuzhiyun			linux,default-trigger = "default-on";
1002*4882a593Smuzhiyun		};
1003*4882a593Smuzhiyun	};
1004*4882a593Smuzhiyun
1005*4882a593Smuzhiyun	ls_stk3410: light@48 {
1006*4882a593Smuzhiyun		compatible = "ls_stk3410";
1007*4882a593Smuzhiyun		status = "okay";
1008*4882a593Smuzhiyun		reg = <0x48>;
1009*4882a593Smuzhiyun		type = <SENSOR_TYPE_LIGHT>;
1010*4882a593Smuzhiyun		irq_enable = <0>;
1011*4882a593Smuzhiyun		als_threshold_high = <100>;
1012*4882a593Smuzhiyun		als_threshold_low = <10>;
1013*4882a593Smuzhiyun		als_ctrl_gain = <2>; /* 0:x1 1:x4 2:x16 3:x64 */
1014*4882a593Smuzhiyun		poll_delay_ms = <100>;
1015*4882a593Smuzhiyun	};
1016*4882a593Smuzhiyun
1017*4882a593Smuzhiyun	ps_stk3410: proximity@48 {
1018*4882a593Smuzhiyun		compatible = "ps_stk3410";
1019*4882a593Smuzhiyun		status = "okay";
1020*4882a593Smuzhiyun		reg = <0x48>;
1021*4882a593Smuzhiyun		type = <SENSOR_TYPE_PROXIMITY>;
1022*4882a593Smuzhiyun		//pinctrl-names = "default";
1023*4882a593Smuzhiyun		//pinctrl-0 = <&gpio2_c3>;
1024*4882a593Smuzhiyun		//irq-gpio = <&gpio0 RK_PB7 IRQ_TYPE_LEVEL_LOW>;
1025*4882a593Smuzhiyun		//irq_enable = <1>;
1026*4882a593Smuzhiyun		ps_threshold_high = <0x200>;
1027*4882a593Smuzhiyun		ps_threshold_low = <0x100>;
1028*4882a593Smuzhiyun		ps_ctrl_gain = <3>; /* 0:x1 1:x4 2:x16 3:x64 */
1029*4882a593Smuzhiyun		ps_led_current = <3>; /* 0:12.5mA 1:25mA 2:50mA 3:100mA */
1030*4882a593Smuzhiyun		poll_delay_ms = <100>;
1031*4882a593Smuzhiyun	};
1032*4882a593Smuzhiyun
1033*4882a593Smuzhiyun};
1034*4882a593Smuzhiyun
1035*4882a593Smuzhiyun&i2c2 {
1036*4882a593Smuzhiyun	status = "okay";
1037*4882a593Smuzhiyun
1038*4882a593Smuzhiyun	clock-frequency = <100000>;
1039*4882a593Smuzhiyun
1040*4882a593Smuzhiyun	/* These are relatively safe rise/fall times; TODO: measure */
1041*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <50>;
1042*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <300>;
1043*4882a593Smuzhiyun
1044*4882a593Smuzhiyun	ov5695: ov5695@36 {
1045*4882a593Smuzhiyun		compatible = "ovti,ov5695";
1046*4882a593Smuzhiyun		reg = <0x36>;
1047*4882a593Smuzhiyun		clocks = <&cru SCLK_CIF_OUT>;
1048*4882a593Smuzhiyun		clock-names = "xvclk";
1049*4882a593Smuzhiyun		/*reset-gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>;*/
1050*4882a593Smuzhiyun		pwdn-gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>;
1051*4882a593Smuzhiyun		//pinctrl-names = "default";
1052*4882a593Smuzhiyun		//pinctrl-0 = <&cif_clkout_m0>;
1053*4882a593Smuzhiyun		rockchip,camera-module-index = <0>;
1054*4882a593Smuzhiyun		rockchip,camera-module-facing = "back";
1055*4882a593Smuzhiyun		rockchip,camera-module-name = "TongJu";
1056*4882a593Smuzhiyun		rockchip,camera-module-lens-name = "CHT842-MD";
1057*4882a593Smuzhiyun		port {
1058*4882a593Smuzhiyun			ov5695_out: endpoint {
1059*4882a593Smuzhiyun				remote-endpoint = <&mipi_in>;
1060*4882a593Smuzhiyun				data-lanes = <1 2>;
1061*4882a593Smuzhiyun			};
1062*4882a593Smuzhiyun		};
1063*4882a593Smuzhiyun	};
1064*4882a593Smuzhiyun};
1065*4882a593Smuzhiyun
1066*4882a593Smuzhiyun&i2s0_8ch {
1067*4882a593Smuzhiyun	status = "okay";
1068*4882a593Smuzhiyun	#sound-dai-cells = <0>;
1069*4882a593Smuzhiyun	rockchip,no-dmaengine;
1070*4882a593Smuzhiyun};
1071*4882a593Smuzhiyun
1072*4882a593Smuzhiyun&i2s1_2ch {
1073*4882a593Smuzhiyun	status = "okay";
1074*4882a593Smuzhiyun	#sound-dai-cells = <0>;
1075*4882a593Smuzhiyun	pinctrl-0 = <&i2s1_2ch_sclk
1076*4882a593Smuzhiyun		     &i2s1_2ch_lrck
1077*4882a593Smuzhiyun		     &i2s1_2ch_sdo>;
1078*4882a593Smuzhiyun};
1079*4882a593Smuzhiyun
1080*4882a593Smuzhiyun&i2s2_2ch {
1081*4882a593Smuzhiyun	status = "okay";
1082*4882a593Smuzhiyun	rockchip,bclk-fs = <64>;
1083*4882a593Smuzhiyun	#sound-dai-cells = <0>;
1084*4882a593Smuzhiyun};
1085*4882a593Smuzhiyun
1086*4882a593Smuzhiyun&io_domains {
1087*4882a593Smuzhiyun	status = "okay";
1088*4882a593Smuzhiyun
1089*4882a593Smuzhiyun	vccio1-supply = <&vcc1v8_soc>;
1090*4882a593Smuzhiyun	vccio2-supply = <&vccio_sd>;
1091*4882a593Smuzhiyun	vccio3-supply = <&vcc1v8_dvp>;
1092*4882a593Smuzhiyun	vccio4-supply = <&vcc1v8_soc>;
1093*4882a593Smuzhiyun	vccio5-supply = <&vcc_3v0>;
1094*4882a593Smuzhiyun};
1095*4882a593Smuzhiyun
1096*4882a593Smuzhiyun&isp_mmu {
1097*4882a593Smuzhiyun	status = "okay";
1098*4882a593Smuzhiyun};
1099*4882a593Smuzhiyun
1100*4882a593Smuzhiyun&nandc0 {
1101*4882a593Smuzhiyun	status = "okay";
1102*4882a593Smuzhiyun};
1103*4882a593Smuzhiyun
1104*4882a593Smuzhiyun&pdm {
1105*4882a593Smuzhiyun	status = "okay";
1106*4882a593Smuzhiyun	#sound-dai-cells = <0>;
1107*4882a593Smuzhiyun	rockchip,no-dmaengine;
1108*4882a593Smuzhiyun	pinctrl-names = "default";
1109*4882a593Smuzhiyun	pinctrl-0 = <&pdm_clk0m1
1110*4882a593Smuzhiyun		&pdm_sdi0m1>;
1111*4882a593Smuzhiyun};
1112*4882a593Smuzhiyun
1113*4882a593Smuzhiyun&pinctrl {
1114*4882a593Smuzhiyun	pinctrl-names = "default";
1115*4882a593Smuzhiyun	pinctrl-0 = <&tp_int>;
1116*4882a593Smuzhiyun
1117*4882a593Smuzhiyun	headphone {
1118*4882a593Smuzhiyun		hp_det: hp-det {
1119*4882a593Smuzhiyun			rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
1120*4882a593Smuzhiyun		};
1121*4882a593Smuzhiyun	};
1122*4882a593Smuzhiyun
1123*4882a593Smuzhiyun	pmic {
1124*4882a593Smuzhiyun		pmic_int: pmic_int {
1125*4882a593Smuzhiyun			rockchip,pins =
1126*4882a593Smuzhiyun				<0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
1127*4882a593Smuzhiyun		};
1128*4882a593Smuzhiyun
1129*4882a593Smuzhiyun		soc_slppin_gpio: soc_slppin_gpio {
1130*4882a593Smuzhiyun			rockchip,pins =
1131*4882a593Smuzhiyun				<0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
1132*4882a593Smuzhiyun		};
1133*4882a593Smuzhiyun
1134*4882a593Smuzhiyun		soc_slppin_slp: soc_slppin_slp {
1135*4882a593Smuzhiyun			rockchip,pins =
1136*4882a593Smuzhiyun				<0 RK_PA4 1 &pcfg_pull_none>;
1137*4882a593Smuzhiyun		};
1138*4882a593Smuzhiyun
1139*4882a593Smuzhiyun		soc_slppin_rst: soc_slppin_rst {
1140*4882a593Smuzhiyun			rockchip,pins =
1141*4882a593Smuzhiyun				<0 RK_PA4 2 &pcfg_pull_none>;
1142*4882a593Smuzhiyun		};
1143*4882a593Smuzhiyun	};
1144*4882a593Smuzhiyun
1145*4882a593Smuzhiyun	sdio-pwrseq {
1146*4882a593Smuzhiyun		wifi_enable_h: wifi-enable-h {
1147*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
1148*4882a593Smuzhiyun		};
1149*4882a593Smuzhiyun	};
1150*4882a593Smuzhiyun
1151*4882a593Smuzhiyun	touchscreen-int {
1152*4882a593Smuzhiyun		tp_int: tp-int {
1153*4882a593Smuzhiyun			rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
1154*4882a593Smuzhiyun		};
1155*4882a593Smuzhiyun	};
1156*4882a593Smuzhiyun};
1157*4882a593Smuzhiyun
1158*4882a593Smuzhiyun&pmu_io_domains {
1159*4882a593Smuzhiyun	status = "okay";
1160*4882a593Smuzhiyun
1161*4882a593Smuzhiyun	pmuio1-supply = <&vcc3v0_pmu>;
1162*4882a593Smuzhiyun	pmuio2-supply = <&vcc3v0_pmu>;
1163*4882a593Smuzhiyun};
1164*4882a593Smuzhiyun
1165*4882a593Smuzhiyun&pwm1 {
1166*4882a593Smuzhiyun	status = "okay";
1167*4882a593Smuzhiyun};
1168*4882a593Smuzhiyun
1169*4882a593Smuzhiyun&rk_rga {
1170*4882a593Smuzhiyun	status = "okay";
1171*4882a593Smuzhiyun};
1172*4882a593Smuzhiyun
1173*4882a593Smuzhiyun&rockchip_suspend {
1174*4882a593Smuzhiyun	status = "okay";
1175*4882a593Smuzhiyun	rockchip,sleep-debug-en = <1>;
1176*4882a593Smuzhiyun};
1177*4882a593Smuzhiyun
1178*4882a593Smuzhiyun&saradc {
1179*4882a593Smuzhiyun	status = "okay";
1180*4882a593Smuzhiyun	vref-supply = <&vcc1v8_soc>;
1181*4882a593Smuzhiyun};
1182*4882a593Smuzhiyun
1183*4882a593Smuzhiyun&sdmmc {
1184*4882a593Smuzhiyun	bus-width = <4>;
1185*4882a593Smuzhiyun	cap-mmc-highspeed;
1186*4882a593Smuzhiyun	cap-sd-highspeed;
1187*4882a593Smuzhiyun	no-sdio;
1188*4882a593Smuzhiyun	no-mmc;
1189*4882a593Smuzhiyun	card-detect-delay = <800>;
1190*4882a593Smuzhiyun	ignore-pm-notify;
1191*4882a593Smuzhiyun	/*cd-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>; [> CD GPIO <]*/
1192*4882a593Smuzhiyun	sd-uhs-sdr12;
1193*4882a593Smuzhiyun	sd-uhs-sdr25;
1194*4882a593Smuzhiyun	sd-uhs-sdr50;
1195*4882a593Smuzhiyun	sd-uhs-sdr104;
1196*4882a593Smuzhiyun	vqmmc-supply = <&vccio_sd>;
1197*4882a593Smuzhiyun	vmmc-supply = <&vcc_sd>;
1198*4882a593Smuzhiyun	status = "okay";
1199*4882a593Smuzhiyun};
1200*4882a593Smuzhiyun
1201*4882a593Smuzhiyun&sdio {
1202*4882a593Smuzhiyun	bus-width = <4>;
1203*4882a593Smuzhiyun	cap-sd-highspeed;
1204*4882a593Smuzhiyun	no-sd;
1205*4882a593Smuzhiyun	no-mmc;
1206*4882a593Smuzhiyun	ignore-pm-notify;
1207*4882a593Smuzhiyun	keep-power-in-suspend;
1208*4882a593Smuzhiyun	non-removable;
1209*4882a593Smuzhiyun	mmc-pwrseq = <&sdio_pwrseq>;
1210*4882a593Smuzhiyun	sd-uhs-sdr104;
1211*4882a593Smuzhiyun	status = "okay";
1212*4882a593Smuzhiyun};
1213*4882a593Smuzhiyun
1214*4882a593Smuzhiyun&tsadc {
1215*4882a593Smuzhiyun	pinctrl-names = "gpio", "otpout";
1216*4882a593Smuzhiyun	pinctrl-0 = <&tsadc_otp_gpio>;
1217*4882a593Smuzhiyun	pinctrl-1 = <&tsadc_otp_out>;
1218*4882a593Smuzhiyun	status = "okay";
1219*4882a593Smuzhiyun};
1220*4882a593Smuzhiyun
1221*4882a593Smuzhiyun&u2phy {
1222*4882a593Smuzhiyun	status = "okay";
1223*4882a593Smuzhiyun
1224*4882a593Smuzhiyun	u2phy_host: host-port {
1225*4882a593Smuzhiyun		status = "okay";
1226*4882a593Smuzhiyun	};
1227*4882a593Smuzhiyun
1228*4882a593Smuzhiyun	u2phy_otg: otg-port {
1229*4882a593Smuzhiyun		vbus-supply = <&vcc5v0_host>;
1230*4882a593Smuzhiyun		status = "okay";
1231*4882a593Smuzhiyun	};
1232*4882a593Smuzhiyun};
1233*4882a593Smuzhiyun
1234*4882a593Smuzhiyun&usb20_otg {
1235*4882a593Smuzhiyun	status = "okay";
1236*4882a593Smuzhiyun};
1237*4882a593Smuzhiyun
1238*4882a593Smuzhiyun&uart1 {
1239*4882a593Smuzhiyun	pinctrl-names = "default";
1240*4882a593Smuzhiyun	pinctrl-0 = <&uart1_xfer &uart1_cts>;
1241*4882a593Smuzhiyun	status = "okay";
1242*4882a593Smuzhiyun};
1243*4882a593Smuzhiyun
1244*4882a593Smuzhiyun&vopb {
1245*4882a593Smuzhiyun	status = "okay";
1246*4882a593Smuzhiyun};
1247*4882a593Smuzhiyun
1248*4882a593Smuzhiyun&vopb_mmu {
1249*4882a593Smuzhiyun	status = "okay";
1250*4882a593Smuzhiyun};
1251*4882a593Smuzhiyun
1252*4882a593Smuzhiyun&vopl {
1253*4882a593Smuzhiyun	status = "okay";
1254*4882a593Smuzhiyun};
1255*4882a593Smuzhiyun
1256*4882a593Smuzhiyun&vopl_mmu {
1257*4882a593Smuzhiyun	status = "okay";
1258*4882a593Smuzhiyun};
1259*4882a593Smuzhiyun
1260*4882a593Smuzhiyun&mpp_srv {
1261*4882a593Smuzhiyun	status = "okay";
1262*4882a593Smuzhiyun};
1263*4882a593Smuzhiyun
1264*4882a593Smuzhiyun&vdpu {
1265*4882a593Smuzhiyun	status = "okay";
1266*4882a593Smuzhiyun};
1267*4882a593Smuzhiyun
1268*4882a593Smuzhiyun&vepu {
1269*4882a593Smuzhiyun	status = "okay";
1270*4882a593Smuzhiyun};
1271*4882a593Smuzhiyun
1272*4882a593Smuzhiyun&vpu_mmu {
1273*4882a593Smuzhiyun	status = "okay";
1274*4882a593Smuzhiyun};
1275*4882a593Smuzhiyun
1276*4882a593Smuzhiyun&hevc {
1277*4882a593Smuzhiyun	status = "okay";
1278*4882a593Smuzhiyun};
1279*4882a593Smuzhiyun
1280*4882a593Smuzhiyun&hevc_mmu {
1281*4882a593Smuzhiyun	status = "okay";
1282*4882a593Smuzhiyun};
1283*4882a593Smuzhiyun
1284*4882a593Smuzhiyun&mipi_dphy_rx0 {
1285*4882a593Smuzhiyun	status = "okay";
1286*4882a593Smuzhiyun
1287*4882a593Smuzhiyun	ports {
1288*4882a593Smuzhiyun		#address-cells = <1>;
1289*4882a593Smuzhiyun		#size-cells = <0>;
1290*4882a593Smuzhiyun
1291*4882a593Smuzhiyun		port@0 {
1292*4882a593Smuzhiyun			reg = <0>;
1293*4882a593Smuzhiyun			#address-cells = <1>;
1294*4882a593Smuzhiyun			#size-cells = <0>;
1295*4882a593Smuzhiyun
1296*4882a593Smuzhiyun			mipi_in: endpoint@1 {
1297*4882a593Smuzhiyun				reg = <1>;
1298*4882a593Smuzhiyun				remote-endpoint = <&ov5695_out>;
1299*4882a593Smuzhiyun				data-lanes = <1 2>;
1300*4882a593Smuzhiyun			};
1301*4882a593Smuzhiyun		};
1302*4882a593Smuzhiyun
1303*4882a593Smuzhiyun		port@1 {
1304*4882a593Smuzhiyun			reg = <1>;
1305*4882a593Smuzhiyun			#address-cells = <1>;
1306*4882a593Smuzhiyun			#size-cells = <0>;
1307*4882a593Smuzhiyun
1308*4882a593Smuzhiyun			dphy_rx_out: endpoint@0 {
1309*4882a593Smuzhiyun				reg = <0>;
1310*4882a593Smuzhiyun				remote-endpoint = <&isp_mipi_in>;
1311*4882a593Smuzhiyun			};
1312*4882a593Smuzhiyun		};
1313*4882a593Smuzhiyun	};
1314*4882a593Smuzhiyun};
1315*4882a593Smuzhiyun
1316*4882a593Smuzhiyun&rkisp1 {
1317*4882a593Smuzhiyun	status = "okay";
1318*4882a593Smuzhiyun	pinctrl-names = "default";
1319*4882a593Smuzhiyun	pinctrl-0 = <&cif_clkout_m0 &dvp_d0d1_m0 &dvp_d2d9_m0>;
1320*4882a593Smuzhiyun	port {
1321*4882a593Smuzhiyun		#address-cells = <1>;
1322*4882a593Smuzhiyun		#size-cells = <0>;
1323*4882a593Smuzhiyun
1324*4882a593Smuzhiyun		isp_mipi_in: endpoint@0 {
1325*4882a593Smuzhiyun			reg = <0>;
1326*4882a593Smuzhiyun			remote-endpoint = <&dphy_rx_out>;
1327*4882a593Smuzhiyun		};
1328*4882a593Smuzhiyun
1329*4882a593Smuzhiyun	};
1330*4882a593Smuzhiyun};
1331