1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun/dts-v1/; 4*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 5*4882a593Smuzhiyun#include "rk3328.dtsi" 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/ { 8*4882a593Smuzhiyun model = "A95X Z2"; 9*4882a593Smuzhiyun compatible = "zkmagic,a95x-z2", "rockchip,rk3318"; 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun chosen { 12*4882a593Smuzhiyun stdout-path = "serial2:1500000n8"; 13*4882a593Smuzhiyun }; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun adc-keys { 16*4882a593Smuzhiyun compatible = "adc-keys"; 17*4882a593Smuzhiyun io-channels = <&saradc 0>; 18*4882a593Smuzhiyun io-channel-names = "buttons"; 19*4882a593Smuzhiyun keyup-threshold-microvolt = <1800000>; 20*4882a593Smuzhiyun poll-interval = <100>; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun recovery { 23*4882a593Smuzhiyun label = "recovery"; 24*4882a593Smuzhiyun linux,code = <KEY_VENDOR>; 25*4882a593Smuzhiyun press-threshold-microvolt = <17000>; 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun ir-receiver { 30*4882a593Smuzhiyun compatible = "gpio-ir-receiver"; 31*4882a593Smuzhiyun gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; 32*4882a593Smuzhiyun pinctrl-0 = <&ir_int>; 33*4882a593Smuzhiyun pinctrl-names = "default"; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun leds { 37*4882a593Smuzhiyun compatible = "gpio-leds"; 38*4882a593Smuzhiyun pinctrl-0 = <&cyx_led_pin>; 39*4882a593Smuzhiyun pinctrl-names = "default"; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun cyx_led: led-0 { 42*4882a593Smuzhiyun default-state = "on"; 43*4882a593Smuzhiyun gpios = <&gpio2 RK_PC7 GPIO_ACTIVE_LOW>; 44*4882a593Smuzhiyun label = "CYX_LED"; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 49*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 50*4882a593Smuzhiyun pinctrl-0 = <&wifi_enable_h>; 51*4882a593Smuzhiyun pinctrl-names = "default"; 52*4882a593Smuzhiyun reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun spdif-sound { 56*4882a593Smuzhiyun compatible = "simple-audio-card"; 57*4882a593Smuzhiyun simple-audio-card,name = "SPDIF"; 58*4882a593Smuzhiyun simple-audio-card,mclk-fs = <128>; 59*4882a593Smuzhiyun simple-audio-card,cpu { 60*4882a593Smuzhiyun sound-dai = <&spdif>; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun simple-audio-card,codec { 64*4882a593Smuzhiyun sound-dai = <&spdif_out>; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun spdif_out: spdif-out { 69*4882a593Smuzhiyun compatible = "linux,spdif-dit"; 70*4882a593Smuzhiyun #sound-dai-cells = <0>; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun /* Power tree */ 74*4882a593Smuzhiyun vccio_1v8: vccio-1v8-regulator { 75*4882a593Smuzhiyun compatible = "regulator-fixed"; 76*4882a593Smuzhiyun regulator-name = "vccio_1v8"; 77*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 78*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 79*4882a593Smuzhiyun regulator-always-on; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun vccio_3v3: vccio-3v3-regulator { 83*4882a593Smuzhiyun compatible = "regulator-fixed"; 84*4882a593Smuzhiyun regulator-name = "vccio_3v3"; 85*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 86*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 87*4882a593Smuzhiyun regulator-always-on; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun vcc_otg_vbus: otg-vbus-regulator { 91*4882a593Smuzhiyun compatible = "regulator-fixed"; 92*4882a593Smuzhiyun gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; 93*4882a593Smuzhiyun pinctrl-0 = <&otg_vbus_drv>; 94*4882a593Smuzhiyun pinctrl-names = "default"; 95*4882a593Smuzhiyun regulator-name = "vcc_otg_vbus"; 96*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 97*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 98*4882a593Smuzhiyun enable-active-high; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun vcc_sd: sdmmc-regulator { 102*4882a593Smuzhiyun compatible = "regulator-fixed"; 103*4882a593Smuzhiyun gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; 104*4882a593Smuzhiyun pinctrl-0 = <&sdmmc0m1_pin>; 105*4882a593Smuzhiyun pinctrl-names = "default"; 106*4882a593Smuzhiyun regulator-name = "vcc_sd"; 107*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 108*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 109*4882a593Smuzhiyun vin-supply = <&vccio_3v3>; 110*4882a593Smuzhiyun }; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun vdd_arm: vdd-arm { 113*4882a593Smuzhiyun compatible = "pwm-regulator"; 114*4882a593Smuzhiyun pwms = <&pwm0 0 5000 1>; 115*4882a593Smuzhiyun regulator-name = "vdd_arm"; 116*4882a593Smuzhiyun regulator-min-microvolt = <950000>; 117*4882a593Smuzhiyun regulator-max-microvolt = <1400000>; 118*4882a593Smuzhiyun regulator-settling-time-up-us = <250>; 119*4882a593Smuzhiyun regulator-always-on; 120*4882a593Smuzhiyun regulator-boot-on; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun vdd_log: vdd-log { 124*4882a593Smuzhiyun compatible = "pwm-regulator"; 125*4882a593Smuzhiyun pwms = <&pwm1 0 5000 1>; 126*4882a593Smuzhiyun regulator-name = "vdd_log"; 127*4882a593Smuzhiyun regulator-min-microvolt = <900000>; 128*4882a593Smuzhiyun regulator-max-microvolt = <1300000>; 129*4882a593Smuzhiyun regulator-settling-time-up-us = <250>; 130*4882a593Smuzhiyun regulator-always-on; 131*4882a593Smuzhiyun regulator-boot-on; 132*4882a593Smuzhiyun }; 133*4882a593Smuzhiyun}; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun&analog_sound { 136*4882a593Smuzhiyun status = "okay"; 137*4882a593Smuzhiyun}; 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun&codec { 140*4882a593Smuzhiyun status = "okay"; 141*4882a593Smuzhiyun}; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun&cpu0 { 144*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 145*4882a593Smuzhiyun}; 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun&cpu1 { 148*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 149*4882a593Smuzhiyun}; 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun&cpu2 { 152*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 153*4882a593Smuzhiyun}; 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun&cpu3 { 156*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 157*4882a593Smuzhiyun}; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun&cpu0_opp_table { 160*4882a593Smuzhiyun opp-1200000000 { 161*4882a593Smuzhiyun status = "disabled"; 162*4882a593Smuzhiyun }; 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun opp-1296000000 { 165*4882a593Smuzhiyun status = "disabled"; 166*4882a593Smuzhiyun }; 167*4882a593Smuzhiyun}; 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun&emmc { 170*4882a593Smuzhiyun bus-width = <8>; 171*4882a593Smuzhiyun cap-mmc-highspeed; 172*4882a593Smuzhiyun non-removable; 173*4882a593Smuzhiyun pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; 174*4882a593Smuzhiyun pinctrl-names = "default"; 175*4882a593Smuzhiyun status = "okay"; 176*4882a593Smuzhiyun}; 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun&gmac2phy { 179*4882a593Smuzhiyun assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>; 180*4882a593Smuzhiyun assigned-clock-rate = <50000000>; 181*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_MAC2PHY>; 182*4882a593Smuzhiyun clock_in_out = "output"; 183*4882a593Smuzhiyun status = "okay"; 184*4882a593Smuzhiyun}; 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun&gpu { 187*4882a593Smuzhiyun mali-supply = <&vdd_log>; 188*4882a593Smuzhiyun}; 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun&hdmi { 191*4882a593Smuzhiyun ddc-i2c-scl-high-time-ns = <9625>; 192*4882a593Smuzhiyun ddc-i2c-scl-low-time-ns = <10000>; 193*4882a593Smuzhiyun status = "okay"; 194*4882a593Smuzhiyun}; 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun&hdmiphy { 197*4882a593Smuzhiyun status = "okay"; 198*4882a593Smuzhiyun}; 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun&hdmi_sound { 201*4882a593Smuzhiyun status = "okay"; 202*4882a593Smuzhiyun}; 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun&i2s0 { 205*4882a593Smuzhiyun status = "okay"; 206*4882a593Smuzhiyun}; 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun&i2s1 { 209*4882a593Smuzhiyun status = "okay"; 210*4882a593Smuzhiyun}; 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun&io_domains { 213*4882a593Smuzhiyun pmuio-supply = <&vccio_3v3>; 214*4882a593Smuzhiyun vccio1-supply = <&vccio_3v3>; 215*4882a593Smuzhiyun vccio2-supply = <&vccio_1v8>; 216*4882a593Smuzhiyun vccio3-supply = <&vccio_3v3>; 217*4882a593Smuzhiyun vccio4-supply = <&vccio_1v8>; 218*4882a593Smuzhiyun vccio5-supply = <&vccio_3v3>; 219*4882a593Smuzhiyun vccio6-supply = <&vccio_3v3>; 220*4882a593Smuzhiyun status = "okay"; 221*4882a593Smuzhiyun}; 222*4882a593Smuzhiyun 223*4882a593Smuzhiyun&pinctrl { 224*4882a593Smuzhiyun ir { 225*4882a593Smuzhiyun ir_int: ir-int { 226*4882a593Smuzhiyun rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 227*4882a593Smuzhiyun }; 228*4882a593Smuzhiyun }; 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun leds { 231*4882a593Smuzhiyun cyx_led_pin: cyx-led-pin { 232*4882a593Smuzhiyun rockchip,pins = <2 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; 233*4882a593Smuzhiyun }; 234*4882a593Smuzhiyun }; 235*4882a593Smuzhiyun 236*4882a593Smuzhiyun pwm0 { 237*4882a593Smuzhiyun pwm0_pin_pull_up: pwm0-pin-pull-up { 238*4882a593Smuzhiyun rockchip,pins = <2 RK_PA4 1 &pcfg_pull_up>; 239*4882a593Smuzhiyun }; 240*4882a593Smuzhiyun }; 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun pwm1 { 243*4882a593Smuzhiyun pwm1_pin_pull_up: pwm1-pin-pull-up { 244*4882a593Smuzhiyun rockchip,pins = <2 RK_PA5 1 &pcfg_pull_up>; 245*4882a593Smuzhiyun }; 246*4882a593Smuzhiyun }; 247*4882a593Smuzhiyun 248*4882a593Smuzhiyun sdio-pwrseq { 249*4882a593Smuzhiyun wifi_enable_h: wifi-enable-h { 250*4882a593Smuzhiyun rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 251*4882a593Smuzhiyun }; 252*4882a593Smuzhiyun }; 253*4882a593Smuzhiyun 254*4882a593Smuzhiyun sdmmc1 { 255*4882a593Smuzhiyun clk_32k_out: clk-32k-out { 256*4882a593Smuzhiyun rockchip,pins = <1 RK_PD4 1 &pcfg_pull_none>; 257*4882a593Smuzhiyun }; 258*4882a593Smuzhiyun }; 259*4882a593Smuzhiyun 260*4882a593Smuzhiyun usb { 261*4882a593Smuzhiyun host_vbus_drv: host-vbus-drv { 262*4882a593Smuzhiyun rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; 263*4882a593Smuzhiyun }; 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun otg_vbus_drv: otg-vbus-drv { 266*4882a593Smuzhiyun rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 267*4882a593Smuzhiyun }; 268*4882a593Smuzhiyun }; 269*4882a593Smuzhiyun}; 270*4882a593Smuzhiyun 271*4882a593Smuzhiyun&pwm0 { 272*4882a593Smuzhiyun pinctrl-0 = <&pwm0_pin_pull_up>; 273*4882a593Smuzhiyun pinctrl-names = "active"; 274*4882a593Smuzhiyun status = "okay"; 275*4882a593Smuzhiyun}; 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun&pwm1 { 278*4882a593Smuzhiyun pinctrl-0 = <&pwm1_pin_pull_up>; 279*4882a593Smuzhiyun pinctrl-names = "active"; 280*4882a593Smuzhiyun status = "okay"; 281*4882a593Smuzhiyun}; 282*4882a593Smuzhiyun 283*4882a593Smuzhiyun&saradc { 284*4882a593Smuzhiyun vref-supply = <&vccio_1v8>; 285*4882a593Smuzhiyun status = "okay"; 286*4882a593Smuzhiyun}; 287*4882a593Smuzhiyun 288*4882a593Smuzhiyun&sdio { 289*4882a593Smuzhiyun bus-width = <4>; 290*4882a593Smuzhiyun cap-sd-highspeed; 291*4882a593Smuzhiyun cap-sdio-irq; 292*4882a593Smuzhiyun keep-power-in-suspend; 293*4882a593Smuzhiyun max-frequency = <125000000>; 294*4882a593Smuzhiyun mmc-pwrseq = <&sdio_pwrseq>; 295*4882a593Smuzhiyun non-removable; 296*4882a593Smuzhiyun pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk &clk_32k_out>; 297*4882a593Smuzhiyun pinctrl-names = "default"; 298*4882a593Smuzhiyun sd-uhs-sdr104; 299*4882a593Smuzhiyun status = "okay"; 300*4882a593Smuzhiyun}; 301*4882a593Smuzhiyun 302*4882a593Smuzhiyun&sdmmc { 303*4882a593Smuzhiyun bus-width = <4>; 304*4882a593Smuzhiyun cap-sd-highspeed; 305*4882a593Smuzhiyun pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; 306*4882a593Smuzhiyun pinctrl-names = "default"; 307*4882a593Smuzhiyun vmmc-supply = <&vcc_sd>; 308*4882a593Smuzhiyun status = "okay"; 309*4882a593Smuzhiyun}; 310*4882a593Smuzhiyun 311*4882a593Smuzhiyun&spdif { 312*4882a593Smuzhiyun pinctrl-0 = <&spdifm0_tx>; 313*4882a593Smuzhiyun status = "okay"; 314*4882a593Smuzhiyun}; 315*4882a593Smuzhiyun 316*4882a593Smuzhiyun&soc_crit { 317*4882a593Smuzhiyun temperature = <115000>; /* millicelsius */ 318*4882a593Smuzhiyun}; 319*4882a593Smuzhiyun 320*4882a593Smuzhiyun&target { 321*4882a593Smuzhiyun temperature = <105000>; /* millicelsius */ 322*4882a593Smuzhiyun}; 323*4882a593Smuzhiyun 324*4882a593Smuzhiyun&threshold { 325*4882a593Smuzhiyun temperature = <90000>; /* millicelsius */ 326*4882a593Smuzhiyun}; 327*4882a593Smuzhiyun 328*4882a593Smuzhiyun&tsadc { 329*4882a593Smuzhiyun rockchip,hw-tshut-temp = <120000>; 330*4882a593Smuzhiyun status = "okay"; 331*4882a593Smuzhiyun}; 332*4882a593Smuzhiyun 333*4882a593Smuzhiyun&u2phy { 334*4882a593Smuzhiyun status = "okay"; 335*4882a593Smuzhiyun}; 336*4882a593Smuzhiyun 337*4882a593Smuzhiyun&u2phy_host { 338*4882a593Smuzhiyun status = "okay"; 339*4882a593Smuzhiyun}; 340*4882a593Smuzhiyun 341*4882a593Smuzhiyun&u2phy_otg { 342*4882a593Smuzhiyun phy-supply = <&vcc_otg_vbus>; 343*4882a593Smuzhiyun status = "okay"; 344*4882a593Smuzhiyun}; 345*4882a593Smuzhiyun 346*4882a593Smuzhiyun&uart0 { 347*4882a593Smuzhiyun pinctrl-0 = <&uart0_xfer &uart0_cts>; 348*4882a593Smuzhiyun status = "okay"; 349*4882a593Smuzhiyun}; 350*4882a593Smuzhiyun 351*4882a593Smuzhiyun&uart2 { 352*4882a593Smuzhiyun status = "okay"; 353*4882a593Smuzhiyun}; 354*4882a593Smuzhiyun 355*4882a593Smuzhiyun&usb20_otg { 356*4882a593Smuzhiyun dr_mode = "host"; 357*4882a593Smuzhiyun status = "okay"; 358*4882a593Smuzhiyun}; 359*4882a593Smuzhiyun 360*4882a593Smuzhiyun&usb_host0_ehci { 361*4882a593Smuzhiyun status = "okay"; 362*4882a593Smuzhiyun}; 363*4882a593Smuzhiyun 364*4882a593Smuzhiyun&usb_host0_ohci { 365*4882a593Smuzhiyun status = "okay"; 366*4882a593Smuzhiyun}; 367*4882a593Smuzhiyun 368*4882a593Smuzhiyun&vop { 369*4882a593Smuzhiyun status = "okay"; 370*4882a593Smuzhiyun}; 371*4882a593Smuzhiyun 372*4882a593Smuzhiyun&vop_mmu { 373*4882a593Smuzhiyun status = "okay"; 374*4882a593Smuzhiyun}; 375