xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm64/rockchip/rk1808-evb-v10.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
 */

/dts-v1/;
#include <dt-bindings/display/drm_mipi_dsi.h>
#include "rk1808-evb.dtsi"

/ {
	model = "Rockchip RK1808 EVB V10 Board";
	compatible = "rockchip,rk1808-evb-v10", "rockchip,rk1808";

	chosen {
		bootargs = "earlycon=uart8250,mmio32,0xff550000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=ext4 rootwait kpti=0 snd_aloop.index=7";
	};

	vad-sound {
		status = "okay";
		compatible = "rockchip,multicodecs-card";
		rockchip,card-name = "rockchip,rk1808-vad";
		rockchip,cpu = <&i2s0>;
		rockchip,codec = <&vad>;
	};
};

&adc_key {
	vol-down-key {
		linux,code = <KEY_VOLUMEDOWN>;
		label = "volume down";
		press-threshold-microvolt = <300000>;
	};

	vol-up-key {
		linux,code = <KEY_VOLUMEUP>;
		label = "volume up";
		press-threshold-microvolt = <18000>;
	};
};

&display_subsystem {
	status = "okay";
};

&dsi {
	status = "okay";

	panel@0 {
		compatible = "sitronix,st7703", "simple-panel-dsi";
		reg = <0>;
		backlight = <&backlight>;
		enable-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
		power-supply = <&vcc5v0_sys>;
		prepare-delay-ms = <2>;
		reset-delay-ms = <1>;
		init-delay-ms = <20>;
		enable-delay-ms = <120>;
		disable-delay-ms = <50>;
		unprepare-delay-ms = <20>;

		width-mm = <68>;
		height-mm = <121>;

		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
			      MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
		dsi,format = <MIPI_DSI_FMT_RGB888>;
		dsi,lanes = <4>;

		panel-init-sequence = [
			05 fa 01 11
			39 00 04 b9 f1 12 83
			39 00 1c ba 33 81 05 f9 0e 0e 00 00 00
				 00 00 00 00 00 44 25 00 91 0a
				 00 00 02 4f 01 00 00 37
			15 00 02 b8 25
			39 00 04 bf 02 11 00
			39 00 0b b3 0c 10 0a 50 03 ff 00 00 00
				 00
			39 00 0a c0 73 73 50 50 00 00 08 70 00
			15 00 02 bc 46
			15 00 02 cc 0b
			15 00 02 b4 80
			39 00 04 b2 c8 12 30
			39 00 0f e3 07 07 0b 0b 03 0b 00 00 00
				 00 ff 00 c0 10
			39 00 0d c1 53 00 1e 1e 77 e1 cc dd 67
				 77 33 33
			39 00 07 c6 00 00 ff ff 01 ff
			39 00 03 b5 09 09
			39 00 03 b6 87 95
			39 00 40 e9 c2 10 05 05 10 05 a0 12 31
				 23 3f 81 0a a0 37 18 00 80 01
				 00 00 00 00 80 01 00 00 00 48
				 f8 86 42 08 88 88 80 88 88 88
				 58 f8 87 53 18 88 88 81 88 88
				 88 00 00 00 01 00 00 00 00 00
				 00 00 00 00
			39 00 3e ea 00 1a 00 00 00 00 02 00 00
				 00 00 00 1f 88 81 35 78 88 88
				 85 88 88 88 0f 88 80 24 68 88
				 88 84 88 88 88 23 10 00 00 1c
				 00 00 00 00 00 00 00 00 00 00
				 00 00 00 00 00 30 05 a0 00 00
				 00 00
			39 00 23 e0 00 06 08 2a 31 3f 38 36 07
				 0c 0d 11 13 12 13 11 18 00 06
				 08 2a 31 3f 38 36 07 0c 0d 11
				 13 12 13 11 18
			05 32 01 29
		];

		panel-exit-sequence = [
			05 00 01 28
			05 00 01 10
		];

		display-timings {
			native-mode = <&timing0>;

			timing0: timing0 {
				clock-frequency = <64000000>;
				hactive = <720>;
				vactive = <1280>;
				hfront-porch = <40>;
				hsync-len = <10>;
				hback-porch = <40>;
				vfront-porch = <22>;
				vsync-len = <4>;
				vback-porch = <11>;
				hsync-active = <0>;
				vsync-active = <0>;
				de-active = <0>;
				pixelclk-active = <0>;
			};
		};

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				panel_in_dsi: endpoint {
					remote-endpoint = <&dsi_out_panel>;
				};
			};
		};
	};

	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		port@1 {
			reg = <1>;
			dsi_out_panel: endpoint {
				remote-endpoint = <&panel_in_dsi>;
			};
		};
	};
};

&i2c3 {
	status = "okay";

	clock-frequency = <100000>;

	ov5695: ov5695@36 {
		compatible = "ovti,ov5695";
		reg = <0x36>;
		clocks = <&cru SCLK_CIF_OUT>;
		clock-names = "xvclk";
		avdd-supply = <&vcc2v8_dvp>;
		dovdd-supply = <&vdd1v5_dvp>;
		dvdd-supply = <&vcc1v8_dvp>;
		pwdn-gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&cif_clkout_m0>;
		port {
			ucam_out: endpoint {
				remote-endpoint = <&mipi_in_ucam>;
				data-lanes = <1 2>;
			};
		};
	};
};

&i2s0 {
	status = "okay";
	#sound-dai-cells = <0>;
};

&i2s1 {
	status = "okay";
	#sound-dai-cells = <0>;
};

&isp_mmu {
	status = "okay";
};

&mipi_dphy {
	status = "okay";
};

&mipi_dphy_rx {
	status = "okay";

	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		port@0 {
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <0>;

			mipi_in_ucam: endpoint@1 {
				reg = <1>;
				remote-endpoint = <&ucam_out>;
				data-lanes = <1 2>;
			};
		};

		port@1 {
			reg = <1>;
			#address-cells = <1>;
			#size-cells = <0>;

			dphy_rx0_out: endpoint@0 {
				reg = <0>;
				remote-endpoint = <&isp0_mipi_in>;
			};
		};
	};
};

&rk_rga {
	status =  "okay";
};

&rk809_sound {
	status = "okay";
};

&rkisp1 {
	status = "okay";

	port {
		#address-cells = <1>;
		#size-cells = <0>;

		isp0_mipi_in: endpoint@0 {
			reg = <0>;
			remote-endpoint = <&dphy_rx0_out>;
		};
	};
};

&rng {
	status = "okay";
};

&rockchip_suspend {
	status = "okay";
	rockchip,sleep-debug-en = <1>;
};

&route_dsi {
	status = "disabled";
};

&tsadc {
	rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
	rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
	pinctrl-names = "gpio", "otpout";
	pinctrl-0 = <&tsadc_otp_gpio>;
	pinctrl-1 = <&tsadc_otp_out>;
	status = "okay";
};

&vad {
	status = "okay";
	rockchip,audio-src = <&i2s0>;
	rockchip,buffer-time-ms = <200>;
	rockchip,det-channel = <0>;
	rockchip,mode = <1>;
	#sound-dai-cells = <0>;
};

&vop_lite {
	status = "okay";
};

&vopl_mmu {
	status = "okay";
};

&vpu_mmu {
	status = "okay";
};

&vpu_service {
	status = "okay";
};