1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Device Tree Source for the Advantech idk-1110wr LVDS panel connected
4*4882a593Smuzhiyun * to RZ/G2 boards
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 2019 Renesas Electronics Corp.
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun/ {
10*4882a593Smuzhiyun	panel-lvds {
11*4882a593Smuzhiyun		compatible = "advantech,idk-1110wr", "panel-lvds";
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun		width-mm = <223>;
14*4882a593Smuzhiyun		height-mm = <125>;
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun		data-mapping = "jeida-24";
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun		panel-timing {
19*4882a593Smuzhiyun			/* 1024x600 @60Hz */
20*4882a593Smuzhiyun			clock-frequency = <51200000>;
21*4882a593Smuzhiyun			hactive = <1024>;
22*4882a593Smuzhiyun			vactive = <600>;
23*4882a593Smuzhiyun			hsync-len = <240>;
24*4882a593Smuzhiyun			hfront-porch = <40>;
25*4882a593Smuzhiyun			hback-porch = <40>;
26*4882a593Smuzhiyun			vfront-porch = <15>;
27*4882a593Smuzhiyun			vback-porch = <10>;
28*4882a593Smuzhiyun			vsync-len = <10>;
29*4882a593Smuzhiyun		};
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun		port {
32*4882a593Smuzhiyun			panel_in: endpoint {
33*4882a593Smuzhiyun				remote-endpoint = <&lvds_connector>;
34*4882a593Smuzhiyun			};
35*4882a593Smuzhiyun		};
36*4882a593Smuzhiyun	};
37*4882a593Smuzhiyun};
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun&lvds_connector {
40*4882a593Smuzhiyun	remote-endpoint = <&panel_in>;
41*4882a593Smuzhiyun};
42