xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm64/renesas/r8a77951-salvator-xs.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Device Tree Source for the Salvator-X 2nd version board with R-Car H3 ES2.0+
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2015-2017 Renesas Electronics Corp.
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun#include "r8a77951.dtsi"
10*4882a593Smuzhiyun#include "salvator-xs.dtsi"
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	model = "Renesas Salvator-X 2nd version board based on r8a77951";
14*4882a593Smuzhiyun	compatible = "renesas,salvator-xs", "renesas,r8a7795";
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun	memory@48000000 {
17*4882a593Smuzhiyun		device_type = "memory";
18*4882a593Smuzhiyun		/* first 128MB is reserved for secure area. */
19*4882a593Smuzhiyun		reg = <0x0 0x48000000 0x0 0x38000000>;
20*4882a593Smuzhiyun	};
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun	memory@500000000 {
23*4882a593Smuzhiyun		device_type = "memory";
24*4882a593Smuzhiyun		reg = <0x5 0x00000000 0x0 0x40000000>;
25*4882a593Smuzhiyun	};
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun	memory@600000000 {
28*4882a593Smuzhiyun		device_type = "memory";
29*4882a593Smuzhiyun		reg = <0x6 0x00000000 0x0 0x40000000>;
30*4882a593Smuzhiyun	};
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun	memory@700000000 {
33*4882a593Smuzhiyun		device_type = "memory";
34*4882a593Smuzhiyun		reg = <0x7 0x00000000 0x0 0x40000000>;
35*4882a593Smuzhiyun	};
36*4882a593Smuzhiyun};
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun&du {
39*4882a593Smuzhiyun	clocks = <&cpg CPG_MOD 724>,
40*4882a593Smuzhiyun		 <&cpg CPG_MOD 723>,
41*4882a593Smuzhiyun		 <&cpg CPG_MOD 722>,
42*4882a593Smuzhiyun		 <&cpg CPG_MOD 721>,
43*4882a593Smuzhiyun		 <&versaclock6 1>,
44*4882a593Smuzhiyun		 <&x21_clk>,
45*4882a593Smuzhiyun		 <&x22_clk>,
46*4882a593Smuzhiyun		 <&versaclock6 2>;
47*4882a593Smuzhiyun	clock-names = "du.0", "du.1", "du.2", "du.3",
48*4882a593Smuzhiyun		      "dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";
49*4882a593Smuzhiyun};
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun&ehci2 {
52*4882a593Smuzhiyun	status = "okay";
53*4882a593Smuzhiyun};
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun&ehci3 {
56*4882a593Smuzhiyun	dr_mode = "otg";
57*4882a593Smuzhiyun	status = "okay";
58*4882a593Smuzhiyun};
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun&hdmi0 {
61*4882a593Smuzhiyun	status = "okay";
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun	ports {
64*4882a593Smuzhiyun		port@1 {
65*4882a593Smuzhiyun			reg = <1>;
66*4882a593Smuzhiyun			rcar_dw_hdmi0_out: endpoint {
67*4882a593Smuzhiyun				remote-endpoint = <&hdmi0_con>;
68*4882a593Smuzhiyun			};
69*4882a593Smuzhiyun		};
70*4882a593Smuzhiyun		port@2 {
71*4882a593Smuzhiyun			reg = <2>;
72*4882a593Smuzhiyun			dw_hdmi0_snd_in: endpoint {
73*4882a593Smuzhiyun				remote-endpoint = <&rsnd_endpoint1>;
74*4882a593Smuzhiyun			};
75*4882a593Smuzhiyun		};
76*4882a593Smuzhiyun	};
77*4882a593Smuzhiyun};
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun&hdmi0_con {
80*4882a593Smuzhiyun	remote-endpoint = <&rcar_dw_hdmi0_out>;
81*4882a593Smuzhiyun};
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun&hdmi1 {
84*4882a593Smuzhiyun	status = "okay";
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun	ports {
87*4882a593Smuzhiyun		port@1 {
88*4882a593Smuzhiyun			reg = <1>;
89*4882a593Smuzhiyun			rcar_dw_hdmi1_out: endpoint {
90*4882a593Smuzhiyun				remote-endpoint = <&hdmi1_con>;
91*4882a593Smuzhiyun			};
92*4882a593Smuzhiyun		};
93*4882a593Smuzhiyun		port@2 {
94*4882a593Smuzhiyun			reg = <2>;
95*4882a593Smuzhiyun			dw_hdmi1_snd_in: endpoint {
96*4882a593Smuzhiyun				remote-endpoint = <&rsnd_endpoint2>;
97*4882a593Smuzhiyun			};
98*4882a593Smuzhiyun		};
99*4882a593Smuzhiyun	};
100*4882a593Smuzhiyun};
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun&hdmi1_con {
103*4882a593Smuzhiyun	remote-endpoint = <&rcar_dw_hdmi1_out>;
104*4882a593Smuzhiyun};
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun&hsusb3 {
107*4882a593Smuzhiyun	dr_mode = "otg";
108*4882a593Smuzhiyun	status = "okay";
109*4882a593Smuzhiyun};
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun&ohci2 {
112*4882a593Smuzhiyun	status = "okay";
113*4882a593Smuzhiyun};
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun&ohci3 {
116*4882a593Smuzhiyun	dr_mode = "otg";
117*4882a593Smuzhiyun	status = "okay";
118*4882a593Smuzhiyun};
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun&pca9654 {
121*4882a593Smuzhiyun	pcie_sata_switch {
122*4882a593Smuzhiyun		gpio-hog;
123*4882a593Smuzhiyun		gpios = <7 GPIO_ACTIVE_HIGH>;
124*4882a593Smuzhiyun		output-low; /* enable SATA by default */
125*4882a593Smuzhiyun		line-name = "PCIE/SATA switch";
126*4882a593Smuzhiyun	};
127*4882a593Smuzhiyun};
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun&pfc {
130*4882a593Smuzhiyun	usb2_pins: usb2 {
131*4882a593Smuzhiyun		groups = "usb2";
132*4882a593Smuzhiyun		function = "usb2";
133*4882a593Smuzhiyun	};
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun	/*
136*4882a593Smuzhiyun	 * - On Salvator-X[S], GP6_3[01] are connected to ADV7482 as irq pins
137*4882a593Smuzhiyun	 *   (when SW31 is the default setting on Salvator-XS).
138*4882a593Smuzhiyun	 * - If SW31 is the default setting, you cannot use USB2.0 ch3 on
139*4882a593Smuzhiyun	 *   r8a77951 with Salvator-XS.
140*4882a593Smuzhiyun	 *   Hence the SW31 setting must be changed like 2) below.
141*4882a593Smuzhiyun	 *   1) Default setting of SW31: ON-ON-OFF-OFF-OFF-OFF:
142*4882a593Smuzhiyun	 *	- Connect GP6_3[01] to ADV7842.
143*4882a593Smuzhiyun	 *   2) Changed setting of SW31: OFF-OFF-ON-ON-ON-ON:
144*4882a593Smuzhiyun	 *	- Connect GP6_3[01] to BD082065 (USB2.0 ch3's host power).
145*4882a593Smuzhiyun	 *	- Connect GP6_{04,21} to ADV7842.
146*4882a593Smuzhiyun	 */
147*4882a593Smuzhiyun	usb2_ch3_pins: usb2_ch3 {
148*4882a593Smuzhiyun		groups = "usb2_ch3";
149*4882a593Smuzhiyun		function = "usb2_ch3";
150*4882a593Smuzhiyun	};
151*4882a593Smuzhiyun};
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun&rcar_sound {
154*4882a593Smuzhiyun	ports {
155*4882a593Smuzhiyun		/* rsnd_port0 is on salvator-common */
156*4882a593Smuzhiyun		rsnd_port1: port@1 {
157*4882a593Smuzhiyun			reg = <1>;
158*4882a593Smuzhiyun			rsnd_endpoint1: endpoint {
159*4882a593Smuzhiyun				remote-endpoint = <&dw_hdmi0_snd_in>;
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun				dai-format = "i2s";
162*4882a593Smuzhiyun				bitclock-master = <&rsnd_endpoint1>;
163*4882a593Smuzhiyun				frame-master = <&rsnd_endpoint1>;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun				playback = <&ssi2>;
166*4882a593Smuzhiyun			};
167*4882a593Smuzhiyun		};
168*4882a593Smuzhiyun		rsnd_port2: port@2 {
169*4882a593Smuzhiyun			reg = <2>;
170*4882a593Smuzhiyun			rsnd_endpoint2: endpoint {
171*4882a593Smuzhiyun				remote-endpoint = <&dw_hdmi1_snd_in>;
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun				dai-format = "i2s";
174*4882a593Smuzhiyun				bitclock-master = <&rsnd_endpoint2>;
175*4882a593Smuzhiyun				frame-master = <&rsnd_endpoint2>;
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun				playback = <&ssi3>;
178*4882a593Smuzhiyun			};
179*4882a593Smuzhiyun		};
180*4882a593Smuzhiyun	};
181*4882a593Smuzhiyun};
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun/* SW12-7 must be set 'Off' (MD12 set to 1) which is not the default! */
184*4882a593Smuzhiyun&sata {
185*4882a593Smuzhiyun	status = "okay";
186*4882a593Smuzhiyun};
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun&sound_card {
189*4882a593Smuzhiyun	dais = <&rsnd_port0	/* ak4613 */
190*4882a593Smuzhiyun		&rsnd_port1	/* HDMI0  */
191*4882a593Smuzhiyun		&rsnd_port2>;	/* HDMI1  */
192*4882a593Smuzhiyun};
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun&usb2_phy2 {
195*4882a593Smuzhiyun	pinctrl-0 = <&usb2_pins>;
196*4882a593Smuzhiyun	pinctrl-names = "default";
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun	status = "okay";
199*4882a593Smuzhiyun};
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun&usb2_phy3 {
202*4882a593Smuzhiyun	pinctrl-0 = <&usb2_ch3_pins>;
203*4882a593Smuzhiyun	pinctrl-names = "default";
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun	status = "okay";
206*4882a593Smuzhiyun};
207