1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device Tree Source for the Silicon Linux RZ/G2E 96board platform (CAT874) 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2019 Renesas Electronics Corp. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/dts-v1/; 9*4882a593Smuzhiyun#include "r8a774c0.dtsi" 10*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 11*4882a593Smuzhiyun#include <dt-bindings/display/tda998x.h> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun/ { 14*4882a593Smuzhiyun model = "Silicon Linux RZ/G2E 96board platform (CAT874)"; 15*4882a593Smuzhiyun compatible = "si-linux,cat874", "renesas,r8a774c0"; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun aliases { 18*4882a593Smuzhiyun serial0 = &scif2; 19*4882a593Smuzhiyun serial1 = &hscif2; 20*4882a593Smuzhiyun mmc0 = &sdhi0; 21*4882a593Smuzhiyun mmc1 = &sdhi3; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun chosen { 25*4882a593Smuzhiyun bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; 26*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun hdmi-out { 30*4882a593Smuzhiyun compatible = "hdmi-connector"; 31*4882a593Smuzhiyun type = "a"; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun port { 34*4882a593Smuzhiyun hdmi_con_out: endpoint { 35*4882a593Smuzhiyun remote-endpoint = <&tda19988_out>; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun leds { 41*4882a593Smuzhiyun compatible = "gpio-leds"; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun led0 { 44*4882a593Smuzhiyun gpios = <&gpio5 19 GPIO_ACTIVE_HIGH>; 45*4882a593Smuzhiyun label = "LED0"; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun led1 { 49*4882a593Smuzhiyun gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; 50*4882a593Smuzhiyun label = "LED1"; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun led2 { 54*4882a593Smuzhiyun gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; 55*4882a593Smuzhiyun label = "LED2"; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun led3 { 59*4882a593Smuzhiyun gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>; 60*4882a593Smuzhiyun label = "LED3"; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun memory@48000000 { 65*4882a593Smuzhiyun device_type = "memory"; 66*4882a593Smuzhiyun /* first 128MB is reserved for secure area. */ 67*4882a593Smuzhiyun reg = <0x0 0x48000000 0x0 0x78000000>; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun reg_12p0v: regulator-12p0v { 71*4882a593Smuzhiyun compatible = "regulator-fixed"; 72*4882a593Smuzhiyun regulator-name = "D12.0V"; 73*4882a593Smuzhiyun regulator-min-microvolt = <12000000>; 74*4882a593Smuzhiyun regulator-max-microvolt = <12000000>; 75*4882a593Smuzhiyun regulator-boot-on; 76*4882a593Smuzhiyun regulator-always-on; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun sound: sound { 80*4882a593Smuzhiyun compatible = "simple-audio-card"; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun simple-audio-card,name = "CAT874 HDMI sound"; 83*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 84*4882a593Smuzhiyun simple-audio-card,bitclock-master = <&sndcpu>; 85*4882a593Smuzhiyun simple-audio-card,frame-master = <&sndcpu>; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun sndcodec: simple-audio-card,codec { 88*4882a593Smuzhiyun sound-dai = <&tda19988>; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun sndcpu: simple-audio-card,cpu { 92*4882a593Smuzhiyun sound-dai = <&rcar_sound>; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun }; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun vcc_sdhi0: regulator-vcc-sdhi0 { 97*4882a593Smuzhiyun compatible = "regulator-fixed"; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun regulator-name = "SDHI0 Vcc"; 100*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 101*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 102*4882a593Smuzhiyun regulator-always-on; 103*4882a593Smuzhiyun regulator-boot-on; 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun vccq_sdhi0: regulator-vccq-sdhi0 { 107*4882a593Smuzhiyun compatible = "regulator-gpio"; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun regulator-name = "SDHI0 VccQ"; 110*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 111*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; 114*4882a593Smuzhiyun gpios-states = <1>; 115*4882a593Smuzhiyun states = <3300000 1>, <1800000 0>; 116*4882a593Smuzhiyun }; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun wlan_en_reg: fixedregulator { 119*4882a593Smuzhiyun compatible = "regulator-fixed"; 120*4882a593Smuzhiyun regulator-name = "wlan-en-regulator"; 121*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 122*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 123*4882a593Smuzhiyun startup-delay-us = <70000>; 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>; 126*4882a593Smuzhiyun enable-active-high; 127*4882a593Smuzhiyun }; 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun x13_clk: x13 { 130*4882a593Smuzhiyun compatible = "fixed-clock"; 131*4882a593Smuzhiyun #clock-cells = <0>; 132*4882a593Smuzhiyun clock-frequency = <74250000>; 133*4882a593Smuzhiyun }; 134*4882a593Smuzhiyun}; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun&audio_clk_a { 137*4882a593Smuzhiyun clock-frequency = <22579200>; 138*4882a593Smuzhiyun}; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun&du { 141*4882a593Smuzhiyun pinctrl-0 = <&du_pins>; 142*4882a593Smuzhiyun pinctrl-names = "default"; 143*4882a593Smuzhiyun status = "okay"; 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 724>, 146*4882a593Smuzhiyun <&cpg CPG_MOD 723>, 147*4882a593Smuzhiyun <&x13_clk>; 148*4882a593Smuzhiyun clock-names = "du.0", "du.1", "dclkin.0"; 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun ports { 151*4882a593Smuzhiyun port@0 { 152*4882a593Smuzhiyun endpoint { 153*4882a593Smuzhiyun remote-endpoint = <&tda19988_in>; 154*4882a593Smuzhiyun }; 155*4882a593Smuzhiyun }; 156*4882a593Smuzhiyun }; 157*4882a593Smuzhiyun}; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun&ehci0 { 160*4882a593Smuzhiyun dr_mode = "host"; 161*4882a593Smuzhiyun status = "okay"; 162*4882a593Smuzhiyun}; 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun&extal_clk { 165*4882a593Smuzhiyun clock-frequency = <48000000>; 166*4882a593Smuzhiyun}; 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun&hscif2 { 169*4882a593Smuzhiyun pinctrl-0 = <&hscif2_pins>; 170*4882a593Smuzhiyun pinctrl-names = "default"; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun uart-has-rtscts; 173*4882a593Smuzhiyun status = "okay"; 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun bluetooth { 176*4882a593Smuzhiyun compatible = "ti,wl1837-st"; 177*4882a593Smuzhiyun enable-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; 178*4882a593Smuzhiyun }; 179*4882a593Smuzhiyun}; 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun&i2c0 { 182*4882a593Smuzhiyun status = "okay"; 183*4882a593Smuzhiyun clock-frequency = <100000>; 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun hd3ss3220@47 { 186*4882a593Smuzhiyun compatible = "ti,hd3ss3220"; 187*4882a593Smuzhiyun reg = <0x47>; 188*4882a593Smuzhiyun interrupt-parent = <&gpio6>; 189*4882a593Smuzhiyun interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun connector { 192*4882a593Smuzhiyun compatible = "usb-c-connector"; 193*4882a593Smuzhiyun label = "USB-C"; 194*4882a593Smuzhiyun data-role = "dual"; 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun ports { 197*4882a593Smuzhiyun #address-cells = <1>; 198*4882a593Smuzhiyun #size-cells = <0>; 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun port@1 { 201*4882a593Smuzhiyun reg = <1>; 202*4882a593Smuzhiyun hd3ss3220_ep: endpoint { 203*4882a593Smuzhiyun remote-endpoint = <&usb3_role_switch>; 204*4882a593Smuzhiyun }; 205*4882a593Smuzhiyun }; 206*4882a593Smuzhiyun }; 207*4882a593Smuzhiyun }; 208*4882a593Smuzhiyun }; 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun tda19988: tda19988@70 { 211*4882a593Smuzhiyun compatible = "nxp,tda998x"; 212*4882a593Smuzhiyun reg = <0x70>; 213*4882a593Smuzhiyun interrupt-parent = <&gpio1>; 214*4882a593Smuzhiyun interrupts = <1 IRQ_TYPE_LEVEL_LOW>; 215*4882a593Smuzhiyun 216*4882a593Smuzhiyun video-ports = <0x234501>; 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun #sound-dai-cells = <0>; 219*4882a593Smuzhiyun audio-ports = <TDA998x_I2S 0x03>; 220*4882a593Smuzhiyun clocks = <&rcar_sound 1>; 221*4882a593Smuzhiyun 222*4882a593Smuzhiyun ports { 223*4882a593Smuzhiyun #address-cells = <1>; 224*4882a593Smuzhiyun #size-cells = <0>; 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun port@0 { 227*4882a593Smuzhiyun reg = <0>; 228*4882a593Smuzhiyun tda19988_in: endpoint { 229*4882a593Smuzhiyun remote-endpoint = <&du_out_rgb>; 230*4882a593Smuzhiyun }; 231*4882a593Smuzhiyun }; 232*4882a593Smuzhiyun 233*4882a593Smuzhiyun port@1 { 234*4882a593Smuzhiyun reg = <1>; 235*4882a593Smuzhiyun tda19988_out: endpoint { 236*4882a593Smuzhiyun remote-endpoint = <&hdmi_con_out>; 237*4882a593Smuzhiyun }; 238*4882a593Smuzhiyun }; 239*4882a593Smuzhiyun }; 240*4882a593Smuzhiyun }; 241*4882a593Smuzhiyun}; 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun&i2c1 { 244*4882a593Smuzhiyun pinctrl-0 = <&i2c1_pins>; 245*4882a593Smuzhiyun pinctrl-names = "default"; 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun status = "okay"; 248*4882a593Smuzhiyun clock-frequency = <400000>; 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun rtc@32 { 251*4882a593Smuzhiyun compatible = "epson,rx8571"; 252*4882a593Smuzhiyun reg = <0x32>; 253*4882a593Smuzhiyun }; 254*4882a593Smuzhiyun}; 255*4882a593Smuzhiyun 256*4882a593Smuzhiyun&lvds0 { 257*4882a593Smuzhiyun status = "okay"; 258*4882a593Smuzhiyun 259*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 727>, <&x13_clk>, <&extal_clk>; 260*4882a593Smuzhiyun clock-names = "fck", "dclkin.0", "extal"; 261*4882a593Smuzhiyun}; 262*4882a593Smuzhiyun 263*4882a593Smuzhiyun&ohci0 { 264*4882a593Smuzhiyun dr_mode = "host"; 265*4882a593Smuzhiyun status = "okay"; 266*4882a593Smuzhiyun}; 267*4882a593Smuzhiyun 268*4882a593Smuzhiyun&pcie_bus_clk { 269*4882a593Smuzhiyun clock-frequency = <100000000>; 270*4882a593Smuzhiyun}; 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun&pciec0 { 273*4882a593Smuzhiyun /* Map all possible DDR as inbound ranges */ 274*4882a593Smuzhiyun dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 275*4882a593Smuzhiyun}; 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun&pfc { 278*4882a593Smuzhiyun du_pins: du { 279*4882a593Smuzhiyun groups = "du_rgb888", "du_clk_out_0", "du_sync", "du_disp", 280*4882a593Smuzhiyun "du_clk_in_0"; 281*4882a593Smuzhiyun function = "du"; 282*4882a593Smuzhiyun }; 283*4882a593Smuzhiyun 284*4882a593Smuzhiyun hscif2_pins: hscif2 { 285*4882a593Smuzhiyun groups = "hscif2_data_a", "hscif2_ctrl_a"; 286*4882a593Smuzhiyun function = "hscif2"; 287*4882a593Smuzhiyun }; 288*4882a593Smuzhiyun 289*4882a593Smuzhiyun i2c1_pins: i2c1 { 290*4882a593Smuzhiyun groups = "i2c1_b"; 291*4882a593Smuzhiyun function = "i2c1"; 292*4882a593Smuzhiyun }; 293*4882a593Smuzhiyun 294*4882a593Smuzhiyun scif2_pins: scif2 { 295*4882a593Smuzhiyun groups = "scif2_data_a"; 296*4882a593Smuzhiyun function = "scif2"; 297*4882a593Smuzhiyun }; 298*4882a593Smuzhiyun 299*4882a593Smuzhiyun sdhi0_pins: sd0 { 300*4882a593Smuzhiyun groups = "sdhi0_data4", "sdhi0_ctrl"; 301*4882a593Smuzhiyun function = "sdhi0"; 302*4882a593Smuzhiyun power-source = <3300>; 303*4882a593Smuzhiyun }; 304*4882a593Smuzhiyun 305*4882a593Smuzhiyun sdhi0_pins_uhs: sd0_uhs { 306*4882a593Smuzhiyun groups = "sdhi0_data4", "sdhi0_ctrl"; 307*4882a593Smuzhiyun function = "sdhi0"; 308*4882a593Smuzhiyun power-source = <1800>; 309*4882a593Smuzhiyun }; 310*4882a593Smuzhiyun 311*4882a593Smuzhiyun sdhi3_pins: sd3 { 312*4882a593Smuzhiyun groups = "sdhi3_data4", "sdhi3_ctrl"; 313*4882a593Smuzhiyun function = "sdhi3"; 314*4882a593Smuzhiyun power-source = <1800>; 315*4882a593Smuzhiyun }; 316*4882a593Smuzhiyun 317*4882a593Smuzhiyun sound_clk_pins: sound_clk { 318*4882a593Smuzhiyun groups = "audio_clkout1_a"; 319*4882a593Smuzhiyun function = "audio_clk"; 320*4882a593Smuzhiyun }; 321*4882a593Smuzhiyun 322*4882a593Smuzhiyun sound_pins: sound { 323*4882a593Smuzhiyun groups = "ssi01239_ctrl", "ssi0_data"; 324*4882a593Smuzhiyun function = "ssi"; 325*4882a593Smuzhiyun }; 326*4882a593Smuzhiyun 327*4882a593Smuzhiyun usb30_pins: usb30 { 328*4882a593Smuzhiyun groups = "usb30", "usb30_id"; 329*4882a593Smuzhiyun function = "usb30"; 330*4882a593Smuzhiyun }; 331*4882a593Smuzhiyun}; 332*4882a593Smuzhiyun 333*4882a593Smuzhiyun&rcar_sound { 334*4882a593Smuzhiyun pinctrl-0 = <&sound_pins &sound_clk_pins>; 335*4882a593Smuzhiyun pinctrl-names = "default"; 336*4882a593Smuzhiyun 337*4882a593Smuzhiyun /* Single DAI */ 338*4882a593Smuzhiyun #sound-dai-cells = <0>; 339*4882a593Smuzhiyun 340*4882a593Smuzhiyun /* audio_clkout0/1/2/3 */ 341*4882a593Smuzhiyun #clock-cells = <1>; 342*4882a593Smuzhiyun clock-frequency = <11289600>; 343*4882a593Smuzhiyun 344*4882a593Smuzhiyun status = "okay"; 345*4882a593Smuzhiyun 346*4882a593Smuzhiyun rcar_sound,dai { 347*4882a593Smuzhiyun dai0 { 348*4882a593Smuzhiyun playback = <&ssi0 &src0 &dvc0>; 349*4882a593Smuzhiyun }; 350*4882a593Smuzhiyun }; 351*4882a593Smuzhiyun}; 352*4882a593Smuzhiyun 353*4882a593Smuzhiyun&rwdt { 354*4882a593Smuzhiyun timeout-sec = <60>; 355*4882a593Smuzhiyun status = "okay"; 356*4882a593Smuzhiyun}; 357*4882a593Smuzhiyun 358*4882a593Smuzhiyun&scif2 { 359*4882a593Smuzhiyun pinctrl-0 = <&scif2_pins>; 360*4882a593Smuzhiyun pinctrl-names = "default"; 361*4882a593Smuzhiyun 362*4882a593Smuzhiyun status = "okay"; 363*4882a593Smuzhiyun}; 364*4882a593Smuzhiyun 365*4882a593Smuzhiyun&sdhi0 { 366*4882a593Smuzhiyun pinctrl-0 = <&sdhi0_pins>; 367*4882a593Smuzhiyun pinctrl-1 = <&sdhi0_pins_uhs>; 368*4882a593Smuzhiyun pinctrl-names = "default", "state_uhs"; 369*4882a593Smuzhiyun 370*4882a593Smuzhiyun vmmc-supply = <&vcc_sdhi0>; 371*4882a593Smuzhiyun vqmmc-supply = <&vccq_sdhi0>; 372*4882a593Smuzhiyun cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; 373*4882a593Smuzhiyun bus-width = <4>; 374*4882a593Smuzhiyun sd-uhs-sdr50; 375*4882a593Smuzhiyun sd-uhs-sdr104; 376*4882a593Smuzhiyun status = "okay"; 377*4882a593Smuzhiyun}; 378*4882a593Smuzhiyun 379*4882a593Smuzhiyun&sdhi3 { 380*4882a593Smuzhiyun status = "okay"; 381*4882a593Smuzhiyun pinctrl-0 = <&sdhi3_pins>; 382*4882a593Smuzhiyun pinctrl-names = "default"; 383*4882a593Smuzhiyun 384*4882a593Smuzhiyun vmmc-supply = <&wlan_en_reg>; 385*4882a593Smuzhiyun bus-width = <4>; 386*4882a593Smuzhiyun non-removable; 387*4882a593Smuzhiyun cap-power-off-card; 388*4882a593Smuzhiyun keep-power-in-suspend; 389*4882a593Smuzhiyun 390*4882a593Smuzhiyun #address-cells = <1>; 391*4882a593Smuzhiyun #size-cells = <0>; 392*4882a593Smuzhiyun wlcore: wlcore@2 { 393*4882a593Smuzhiyun compatible = "ti,wl1837"; 394*4882a593Smuzhiyun reg = <2>; 395*4882a593Smuzhiyun interrupt-parent = <&gpio1>; 396*4882a593Smuzhiyun interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; 397*4882a593Smuzhiyun }; 398*4882a593Smuzhiyun}; 399*4882a593Smuzhiyun 400*4882a593Smuzhiyun&usb2_phy0 { 401*4882a593Smuzhiyun renesas,no-otg-pins; 402*4882a593Smuzhiyun status = "okay"; 403*4882a593Smuzhiyun}; 404*4882a593Smuzhiyun 405*4882a593Smuzhiyun&usb3_peri0 { 406*4882a593Smuzhiyun companion = <&xhci0>; 407*4882a593Smuzhiyun status = "okay"; 408*4882a593Smuzhiyun usb-role-switch; 409*4882a593Smuzhiyun 410*4882a593Smuzhiyun port { 411*4882a593Smuzhiyun usb3_role_switch: endpoint { 412*4882a593Smuzhiyun remote-endpoint = <&hd3ss3220_ep>; 413*4882a593Smuzhiyun }; 414*4882a593Smuzhiyun }; 415*4882a593Smuzhiyun}; 416*4882a593Smuzhiyun 417*4882a593Smuzhiyun&xhci0 { 418*4882a593Smuzhiyun pinctrl-0 = <&usb30_pins>; 419*4882a593Smuzhiyun pinctrl-names = "default"; 420*4882a593Smuzhiyun 421*4882a593Smuzhiyun status = "okay"; 422*4882a593Smuzhiyun}; 423