1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device Tree Source for the RZ/G2[MN] HiHope sub board LVDS common parts 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2020 Renesas Electronics Corp. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/ { 9*4882a593Smuzhiyun backlight { 10*4882a593Smuzhiyun compatible = "pwm-backlight"; 11*4882a593Smuzhiyun pwms = <&pwm0 0 50000>; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun brightness-levels = <0 2 8 16 32 64 128 255>; 14*4882a593Smuzhiyun default-brightness-level = <6>; 15*4882a593Smuzhiyun }; 16*4882a593Smuzhiyun}; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun&gpio1 { 19*4882a593Smuzhiyun /* 20*4882a593Smuzhiyun * When GP1_20 is LOW LVDS0 is connected to the LVDS connector 21*4882a593Smuzhiyun * When GP1_20 is HIGH LVDS0 is connected to the LT8918L 22*4882a593Smuzhiyun */ 23*4882a593Smuzhiyun lvds-connector-en-gpio { 24*4882a593Smuzhiyun gpio-hog; 25*4882a593Smuzhiyun gpios = <20 GPIO_ACTIVE_HIGH>; 26*4882a593Smuzhiyun output-low; 27*4882a593Smuzhiyun line-name = "lvds-connector-en-gpio"; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun}; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun&lvds0 { 32*4882a593Smuzhiyun ports { 33*4882a593Smuzhiyun port@1 { 34*4882a593Smuzhiyun lvds_connector: endpoint { 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun}; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun&pfc { 41*4882a593Smuzhiyun pwm0_pins: pwm0 { 42*4882a593Smuzhiyun groups = "pwm0"; 43*4882a593Smuzhiyun function = "pwm0"; 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun}; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun&pwm0 { 48*4882a593Smuzhiyun pinctrl-0 = <&pwm0_pins>; 49*4882a593Smuzhiyun pinctrl-names = "default"; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun status = "okay"; 52*4882a593Smuzhiyun}; 53