1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Google Cheza board device tree source 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright 2018 Google LLC. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/dts-v1/; 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun#include "sdm845-cheza.dtsi" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun model = "Google Cheza (rev1)"; 14*4882a593Smuzhiyun compatible = "google,cheza-rev1", "qcom,sdm845"; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun /* 17*4882a593Smuzhiyun * FIXED REGULATORS (not in sdm845-cheza.dtsi) - parents above children 18*4882a593Smuzhiyun */ 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun /* 21*4882a593Smuzhiyun * NOTE: Technically pp3500_a is not the exact same signal as 22*4882a593Smuzhiyun * pp3500_a_vbob (there's a load switch between them and the EC can 23*4882a593Smuzhiyun * control pp3500_a via "en_pp3300_a"), but from the AP's point of 24*4882a593Smuzhiyun * view they are the same. 25*4882a593Smuzhiyun */ 26*4882a593Smuzhiyun pp3500_a: 27*4882a593Smuzhiyun pp3500_a_vbob: pp3500-a-vbob-regulator { 28*4882a593Smuzhiyun compatible = "regulator-fixed"; 29*4882a593Smuzhiyun regulator-name = "vreg_bob"; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun /* 32*4882a593Smuzhiyun * Comes on automatically when pp5000_ldo comes on, which 33*4882a593Smuzhiyun * comes on automatically when ppvar_sys comes on 34*4882a593Smuzhiyun */ 35*4882a593Smuzhiyun regulator-always-on; 36*4882a593Smuzhiyun regulator-boot-on; 37*4882a593Smuzhiyun regulator-min-microvolt = <3500000>; 38*4882a593Smuzhiyun regulator-max-microvolt = <3500000>; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun vin-supply = <&ppvar_sys>; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun pp3300_dx_edp: pp3300-dx-edp-regulator { 44*4882a593Smuzhiyun /* Yes, it's really 3.5 despite the name of the signal */ 45*4882a593Smuzhiyun regulator-min-microvolt = <3500000>; 46*4882a593Smuzhiyun regulator-max-microvolt = <3500000>; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun vin-supply = <&pp3500_a>; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun}; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun/* FIXED REGULATOR OVERRIDES (modifications to sdm845-cheza.dtsi) */ 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun/* 55*4882a593Smuzhiyun * L19 and L28 technically go to 3.3V, but most boards have old AOP firmware 56*4882a593Smuzhiyun * that limits them to 3.0, and trying to run at 3.3V with that old firmware 57*4882a593Smuzhiyun * prevents the system from booting. 58*4882a593Smuzhiyun */ 59*4882a593Smuzhiyun&src_pp3000_l19a { 60*4882a593Smuzhiyun regulator-min-microvolt = <3008000>; 61*4882a593Smuzhiyun regulator-max-microvolt = <3008000>; 62*4882a593Smuzhiyun}; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun&src_pp3300_l22a { 65*4882a593Smuzhiyun /delete-property/regulator-boot-on; 66*4882a593Smuzhiyun /delete-property/regulator-always-on; 67*4882a593Smuzhiyun}; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun&src_pp3300_l28a { 70*4882a593Smuzhiyun regulator-min-microvolt = <3008000>; 71*4882a593Smuzhiyun regulator-max-microvolt = <3008000>; 72*4882a593Smuzhiyun}; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun&src_vreg_bob { 75*4882a593Smuzhiyun regulator-min-microvolt = <3500000>; 76*4882a593Smuzhiyun regulator-max-microvolt = <3500000>; 77*4882a593Smuzhiyun vin-supply = <&pp3500_a_vbob>; 78*4882a593Smuzhiyun}; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun/* 81*4882a593Smuzhiyun * NON-REGULATOR OVERRIDES 82*4882a593Smuzhiyun * (modifications to sdm845-cheza.dtsi) - alphabetized by dtsi label 83*4882a593Smuzhiyun */ 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun/* PINCTRL - board-specific pinctrl */ 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun&tlmm { 88*4882a593Smuzhiyun gpio-line-names = "AP_SPI_FP_MISO", 89*4882a593Smuzhiyun "AP_SPI_FP_MOSI", 90*4882a593Smuzhiyun "AP_SPI_FP_CLK", 91*4882a593Smuzhiyun "AP_SPI_FP_CS_L", 92*4882a593Smuzhiyun "UART_AP_TX_DBG_RX", 93*4882a593Smuzhiyun "UART_DBG_TX_AP_RX", 94*4882a593Smuzhiyun "", 95*4882a593Smuzhiyun "FP_RST_L", 96*4882a593Smuzhiyun "FCAM_EN", 97*4882a593Smuzhiyun "", 98*4882a593Smuzhiyun "EDP_BRIJ_IRQ", 99*4882a593Smuzhiyun "EC_IN_RW_ODL", 100*4882a593Smuzhiyun "", 101*4882a593Smuzhiyun "RCAM_MCLK", 102*4882a593Smuzhiyun "FCAM_MCLK", 103*4882a593Smuzhiyun "", 104*4882a593Smuzhiyun "RCAM_EN", 105*4882a593Smuzhiyun "CCI0_SDA", 106*4882a593Smuzhiyun "CCI0_SCL", 107*4882a593Smuzhiyun "CCI1_SDA", 108*4882a593Smuzhiyun "CCI1_SCL", 109*4882a593Smuzhiyun "FCAM_RST_L", 110*4882a593Smuzhiyun "", 111*4882a593Smuzhiyun "PEN_RST_L", 112*4882a593Smuzhiyun "PEN_IRQ_L", 113*4882a593Smuzhiyun "", 114*4882a593Smuzhiyun "RCAM_VSYNC", 115*4882a593Smuzhiyun "ESIM_MISO", 116*4882a593Smuzhiyun "ESIM_MOSI", 117*4882a593Smuzhiyun "ESIM_CLK", 118*4882a593Smuzhiyun "ESIM_CS_L", 119*4882a593Smuzhiyun "AP_PEN_1V8_SDA", 120*4882a593Smuzhiyun "AP_PEN_1V8_SCL", 121*4882a593Smuzhiyun "AP_TS_I2C_SDA", 122*4882a593Smuzhiyun "AP_TS_I2C_SCL", 123*4882a593Smuzhiyun "RCAM_RST_L", 124*4882a593Smuzhiyun "", 125*4882a593Smuzhiyun "AP_EDP_BKLTEN", 126*4882a593Smuzhiyun "AP_BRD_ID1", 127*4882a593Smuzhiyun "BOOT_CONFIG_4", 128*4882a593Smuzhiyun "AMP_IRQ_L", 129*4882a593Smuzhiyun "EDP_BRIJ_I2C_SDA", 130*4882a593Smuzhiyun "EDP_BRIJ_I2C_SCL", 131*4882a593Smuzhiyun "EN_PP3300_DX_EDP", 132*4882a593Smuzhiyun "SD_CD_ODL", 133*4882a593Smuzhiyun "BT_UART_RTS", 134*4882a593Smuzhiyun "BT_UART_CTS", 135*4882a593Smuzhiyun "BT_UART_RXD", 136*4882a593Smuzhiyun "BT_UART_TXD", 137*4882a593Smuzhiyun "AMP_I2C_SDA", 138*4882a593Smuzhiyun "AMP_I2C_SCL", 139*4882a593Smuzhiyun "AP_BRD_ID3", 140*4882a593Smuzhiyun "", 141*4882a593Smuzhiyun "AP_EC_SPI_CLK", 142*4882a593Smuzhiyun "AP_EC_SPI_CS_L", 143*4882a593Smuzhiyun "AP_EC_SPI_MISO", 144*4882a593Smuzhiyun "AP_EC_SPI_MOSI", 145*4882a593Smuzhiyun "FORCED_USB_BOOT", 146*4882a593Smuzhiyun "AMP_BCLK", 147*4882a593Smuzhiyun "AMP_LRCLK", 148*4882a593Smuzhiyun "AMP_DOUT", 149*4882a593Smuzhiyun "AMP_DIN", 150*4882a593Smuzhiyun "AP_BRD_ID2", 151*4882a593Smuzhiyun "PEN_PDCT_L", 152*4882a593Smuzhiyun "HP_MCLK", 153*4882a593Smuzhiyun "HP_BCLK", 154*4882a593Smuzhiyun "HP_LRCLK", 155*4882a593Smuzhiyun "HP_DOUT", 156*4882a593Smuzhiyun "HP_DIN", 157*4882a593Smuzhiyun "", 158*4882a593Smuzhiyun "", 159*4882a593Smuzhiyun "", 160*4882a593Smuzhiyun "", 161*4882a593Smuzhiyun "BT_SLIMBUS_DATA", 162*4882a593Smuzhiyun "BT_SLIMBUS_CLK", 163*4882a593Smuzhiyun "AMP_RESET_L", 164*4882a593Smuzhiyun "", 165*4882a593Smuzhiyun "FCAM_VSYNC", 166*4882a593Smuzhiyun "", 167*4882a593Smuzhiyun "AP_SKU_ID1", 168*4882a593Smuzhiyun "EC_WOV_BCLK", 169*4882a593Smuzhiyun "EC_WOV_LRCLK", 170*4882a593Smuzhiyun "EC_WOV_DOUT", 171*4882a593Smuzhiyun "", 172*4882a593Smuzhiyun "", 173*4882a593Smuzhiyun "AP_H1_SPI_MISO", 174*4882a593Smuzhiyun "AP_H1_SPI_MOSI", 175*4882a593Smuzhiyun "AP_H1_SPI_CLK", 176*4882a593Smuzhiyun "AP_H1_SPI_CS_L", 177*4882a593Smuzhiyun "", 178*4882a593Smuzhiyun "AP_SPI_CS0_L", 179*4882a593Smuzhiyun "AP_SPI_MOSI", 180*4882a593Smuzhiyun "AP_SPI_MISO", 181*4882a593Smuzhiyun "", 182*4882a593Smuzhiyun "", 183*4882a593Smuzhiyun "AP_SPI_CLK", 184*4882a593Smuzhiyun "", 185*4882a593Smuzhiyun "RFFE6_CLK", 186*4882a593Smuzhiyun "RFFE6_DATA", 187*4882a593Smuzhiyun "BOOT_CONFIG_1", 188*4882a593Smuzhiyun "BOOT_CONFIG_2", 189*4882a593Smuzhiyun "BOOT_CONFIG_0", 190*4882a593Smuzhiyun "EDP_BRIJ_EN", 191*4882a593Smuzhiyun "", 192*4882a593Smuzhiyun "USB_HS_TX_EN", 193*4882a593Smuzhiyun "UIM2_DATA", 194*4882a593Smuzhiyun "UIM2_CLK", 195*4882a593Smuzhiyun "UIM2_RST", 196*4882a593Smuzhiyun "UIM2_PRESENT", 197*4882a593Smuzhiyun "UIM1_DATA", 198*4882a593Smuzhiyun "UIM1_CLK", 199*4882a593Smuzhiyun "UIM1_RST", 200*4882a593Smuzhiyun "", 201*4882a593Smuzhiyun "AP_SKU_ID2", 202*4882a593Smuzhiyun "SDM_GRFC_8", 203*4882a593Smuzhiyun "SDM_GRFC_9", 204*4882a593Smuzhiyun "AP_RST_REQ", 205*4882a593Smuzhiyun "HP_IRQ", 206*4882a593Smuzhiyun "TS_RESET_L", 207*4882a593Smuzhiyun "PEN_EJECT_ODL", 208*4882a593Smuzhiyun "HUB_RST_L", 209*4882a593Smuzhiyun "FP_TO_AP_IRQ", 210*4882a593Smuzhiyun "AP_EC_INT_L", 211*4882a593Smuzhiyun "", 212*4882a593Smuzhiyun "", 213*4882a593Smuzhiyun "TS_INT_L", 214*4882a593Smuzhiyun "AP_SUSPEND_L", 215*4882a593Smuzhiyun "SDM_GRFC_3", 216*4882a593Smuzhiyun "", 217*4882a593Smuzhiyun "H1_AP_INT_ODL", 218*4882a593Smuzhiyun "QLINK_REQ", 219*4882a593Smuzhiyun "QLINK_EN", 220*4882a593Smuzhiyun "SDM_GRFC_2", 221*4882a593Smuzhiyun "BOOT_CONFIG_3", 222*4882a593Smuzhiyun "WMSS_RESET_L", 223*4882a593Smuzhiyun "SDM_GRFC_0", 224*4882a593Smuzhiyun "SDM_GRFC_1", 225*4882a593Smuzhiyun "RFFE3_DATA", 226*4882a593Smuzhiyun "RFFE3_CLK", 227*4882a593Smuzhiyun "RFFE4_DATA", 228*4882a593Smuzhiyun "RFFE4_CLK", 229*4882a593Smuzhiyun "RFFE5_DATA", 230*4882a593Smuzhiyun "RFFE5_CLK", 231*4882a593Smuzhiyun "GNSS_EN", 232*4882a593Smuzhiyun "WCI2_LTE_COEX_RXD", 233*4882a593Smuzhiyun "WCI2_LTE_COEX_TXD", 234*4882a593Smuzhiyun "AP_RAM_ID1", 235*4882a593Smuzhiyun "AP_RAM_ID2", 236*4882a593Smuzhiyun "RFFE1_DATA", 237*4882a593Smuzhiyun "RFFE1_CLK"; 238*4882a593Smuzhiyun}; 239