1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun// Copyright (c) 2018, Linaro Limited 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 5*4882a593Smuzhiyun#include "qcs404.dtsi" 6*4882a593Smuzhiyun#include "pms405.dtsi" 7*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 8*4882a593Smuzhiyun#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun aliases { 12*4882a593Smuzhiyun serial0 = &blsp1_uart2; 13*4882a593Smuzhiyun serial1 = &blsp1_uart3; 14*4882a593Smuzhiyun }; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun chosen { 17*4882a593Smuzhiyun stdout-path = "serial0"; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun vph_pwr: vph-pwr-regulator { 21*4882a593Smuzhiyun compatible = "regulator-fixed"; 22*4882a593Smuzhiyun regulator-name = "vph_pwr"; 23*4882a593Smuzhiyun regulator-always-on; 24*4882a593Smuzhiyun regulator-boot-on; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun vdd_ch0_3p3: 28*4882a593Smuzhiyun vdd_esmps3_3p3: vdd-esmps3-3p3-regulator { 29*4882a593Smuzhiyun compatible = "regulator-fixed"; 30*4882a593Smuzhiyun regulator-name = "eSMPS3_3P3"; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 33*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 34*4882a593Smuzhiyun regulator-always-on; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun usb3_vbus_reg: regulator-usb3-vbus { 38*4882a593Smuzhiyun compatible = "regulator-fixed"; 39*4882a593Smuzhiyun regulator-name = "VBUS_BOOST_5V"; 40*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 41*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 42*4882a593Smuzhiyun gpio = <&pms405_gpios 3 GPIO_ACTIVE_HIGH>; 43*4882a593Smuzhiyun pinctrl-names = "default"; 44*4882a593Smuzhiyun pinctrl-0 = <&usb_vbus_boost_pin>; 45*4882a593Smuzhiyun vin-supply = <&vph_pwr>; 46*4882a593Smuzhiyun enable-active-high; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun /* TODO: Drop this when introducing role switching */ 49*4882a593Smuzhiyun regulator-always-on; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun}; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun&blsp1_uart3 { 54*4882a593Smuzhiyun status = "okay"; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun bluetooth { 57*4882a593Smuzhiyun compatible = "qcom,wcn3990-bt"; 58*4882a593Smuzhiyun vddio-supply = <&vreg_l6_1p8>; 59*4882a593Smuzhiyun vddxo-supply = <&vreg_l5_1p8>; 60*4882a593Smuzhiyun vddrf-supply = <&vreg_l1_1p3>; 61*4882a593Smuzhiyun vddch0-supply = <&vdd_ch0_3p3>; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun local-bd-address = [ 02 00 00 00 5a ad ]; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun max-speed = <3200000>; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun}; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun&blsp1_dma { 70*4882a593Smuzhiyun qcom,controlled-remotely; 71*4882a593Smuzhiyun}; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun&blsp2_dma { 74*4882a593Smuzhiyun qcom,controlled-remotely; 75*4882a593Smuzhiyun}; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun&gcc { 78*4882a593Smuzhiyun protected-clocks = <GCC_BIMC_CDSP_CLK>, 79*4882a593Smuzhiyun <GCC_CDSP_CFG_AHB_CLK>, 80*4882a593Smuzhiyun <GCC_CDSP_BIMC_CLK_SRC>, 81*4882a593Smuzhiyun <GCC_CDSP_TBU_CLK>, 82*4882a593Smuzhiyun <141>, /* GCC_WCSS_Q6_AHB_CLK */ 83*4882a593Smuzhiyun <142>; /* GCC_WCSS_Q6_AXIM_CLK */ 84*4882a593Smuzhiyun}; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun&pms405_spmi_regulators { 87*4882a593Smuzhiyun vdd_s3-supply = <&vph_pwr>; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun pms405_s3: s3 { 90*4882a593Smuzhiyun regulator-always-on; 91*4882a593Smuzhiyun regulator-boot-on; 92*4882a593Smuzhiyun regulator-name = "vdd_apc"; 93*4882a593Smuzhiyun regulator-initial-mode = <1>; 94*4882a593Smuzhiyun regulator-min-microvolt = <1048000>; 95*4882a593Smuzhiyun regulator-max-microvolt = <1384000>; 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun}; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun&pcie { 100*4882a593Smuzhiyun status = "okay"; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun perst-gpio = <&tlmm 43 GPIO_ACTIVE_LOW>; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun pinctrl-names = "default"; 105*4882a593Smuzhiyun pinctrl-0 = <&perst_state>; 106*4882a593Smuzhiyun}; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun&pcie_phy { 109*4882a593Smuzhiyun status = "okay"; 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun vdda-vp-supply = <&vreg_l3_1p05>; 112*4882a593Smuzhiyun vdda-vph-supply = <&vreg_l5_1p8>; 113*4882a593Smuzhiyun}; 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun&remoteproc_adsp { 116*4882a593Smuzhiyun status = "okay"; 117*4882a593Smuzhiyun}; 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun&remoteproc_cdsp { 120*4882a593Smuzhiyun status = "okay"; 121*4882a593Smuzhiyun}; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun&remoteproc_wcss { 124*4882a593Smuzhiyun status = "okay"; 125*4882a593Smuzhiyun}; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun&rpm_requests { 128*4882a593Smuzhiyun pms405-regulators { 129*4882a593Smuzhiyun compatible = "qcom,rpm-pms405-regulators"; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun vdd_s1-supply = <&vph_pwr>; 132*4882a593Smuzhiyun vdd_s2-supply = <&vph_pwr>; 133*4882a593Smuzhiyun vdd_s3-supply = <&vph_pwr>; 134*4882a593Smuzhiyun vdd_s4-supply = <&vph_pwr>; 135*4882a593Smuzhiyun vdd_s5-supply = <&vph_pwr>; 136*4882a593Smuzhiyun vdd_l1_l2-supply = <&vreg_s5_1p35>; 137*4882a593Smuzhiyun vdd_l3_l8-supply = <&vreg_s5_1p35>; 138*4882a593Smuzhiyun vdd_l4-supply = <&vreg_s5_1p35>; 139*4882a593Smuzhiyun vdd_l5_l6-supply = <&vreg_s4_1p8>; 140*4882a593Smuzhiyun vdd_l7-supply = <&vph_pwr>; 141*4882a593Smuzhiyun vdd_l9-supply = <&vreg_s5_1p35>; 142*4882a593Smuzhiyun vdd_l10_l11_l12_l13-supply = <&vph_pwr>; 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun vreg_s4_1p8: s4 { 145*4882a593Smuzhiyun regulator-min-microvolt = <1728000>; 146*4882a593Smuzhiyun regulator-max-microvolt = <1920000>; 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun vreg_s5_1p35: s5 { 150*4882a593Smuzhiyun regulator-min-microvolt = <1352000>; 151*4882a593Smuzhiyun regulator-max-microvolt = <1352000>; 152*4882a593Smuzhiyun }; 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun vreg_l1_1p3: l1 { 155*4882a593Smuzhiyun regulator-min-microvolt = <1240000>; 156*4882a593Smuzhiyun regulator-max-microvolt = <1352000>; 157*4882a593Smuzhiyun }; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun vreg_l2_1p275: l2 { 160*4882a593Smuzhiyun regulator-min-microvolt = <1048000>; 161*4882a593Smuzhiyun regulator-max-microvolt = <1280000>; 162*4882a593Smuzhiyun }; 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun vreg_l3_1p05: l3 { 165*4882a593Smuzhiyun regulator-min-microvolt = <1048000>; 166*4882a593Smuzhiyun regulator-max-microvolt = <1160000>; 167*4882a593Smuzhiyun }; 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun vreg_l4_1p2: l4 { 170*4882a593Smuzhiyun regulator-min-microvolt = <1144000>; 171*4882a593Smuzhiyun regulator-max-microvolt = <1256000>; 172*4882a593Smuzhiyun }; 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun vreg_l5_1p8: l5 { 175*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 176*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 177*4882a593Smuzhiyun }; 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun vreg_l6_1p8: l6 { 180*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 181*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 182*4882a593Smuzhiyun regulator-always-on; 183*4882a593Smuzhiyun }; 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun vreg_l7_1p8: l7 { 186*4882a593Smuzhiyun regulator-min-microvolt = <1616000>; 187*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 188*4882a593Smuzhiyun }; 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun vreg_l8_1p2: l8 { 191*4882a593Smuzhiyun regulator-min-microvolt = <1136000>; 192*4882a593Smuzhiyun regulator-max-microvolt = <1352000>; 193*4882a593Smuzhiyun }; 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun vreg_l10_3p3: l10 { 196*4882a593Smuzhiyun regulator-min-microvolt = <2936000>; 197*4882a593Smuzhiyun regulator-max-microvolt = <3088000>; 198*4882a593Smuzhiyun }; 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun vreg_l11_sdc2: l11 { 201*4882a593Smuzhiyun regulator-min-microvolt = <2696000>; 202*4882a593Smuzhiyun regulator-max-microvolt = <3304000>; 203*4882a593Smuzhiyun }; 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun vreg_l12_3p3: l12 { 206*4882a593Smuzhiyun regulator-min-microvolt = <3050000>; 207*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 208*4882a593Smuzhiyun }; 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun vreg_l13_3p3: l13 { 211*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 212*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 213*4882a593Smuzhiyun }; 214*4882a593Smuzhiyun }; 215*4882a593Smuzhiyun}; 216*4882a593Smuzhiyun 217*4882a593Smuzhiyun&sdcc1 { 218*4882a593Smuzhiyun status = "okay"; 219*4882a593Smuzhiyun 220*4882a593Smuzhiyun supports-cqe; 221*4882a593Smuzhiyun mmc-ddr-1_8v; 222*4882a593Smuzhiyun mmc-hs400-1_8v; 223*4882a593Smuzhiyun bus-width = <8>; 224*4882a593Smuzhiyun non-removable; 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 227*4882a593Smuzhiyun pinctrl-0 = <&sdc1_on>; 228*4882a593Smuzhiyun pinctrl-1 = <&sdc1_off>; 229*4882a593Smuzhiyun}; 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun&tlmm { 232*4882a593Smuzhiyun perst_state: perst { 233*4882a593Smuzhiyun pins = "gpio43"; 234*4882a593Smuzhiyun function = "gpio"; 235*4882a593Smuzhiyun 236*4882a593Smuzhiyun drive-strength = <2>; 237*4882a593Smuzhiyun bias-disable; 238*4882a593Smuzhiyun output-low; 239*4882a593Smuzhiyun }; 240*4882a593Smuzhiyun 241*4882a593Smuzhiyun sdc1_on: sdc1-on { 242*4882a593Smuzhiyun clk { 243*4882a593Smuzhiyun pins = "sdc1_clk"; 244*4882a593Smuzhiyun bias-disable; 245*4882a593Smuzhiyun drive-strength = <16>; 246*4882a593Smuzhiyun }; 247*4882a593Smuzhiyun 248*4882a593Smuzhiyun cmd { 249*4882a593Smuzhiyun pins = "sdc1_cmd"; 250*4882a593Smuzhiyun bias-pull-up; 251*4882a593Smuzhiyun drive-strength = <10>; 252*4882a593Smuzhiyun }; 253*4882a593Smuzhiyun 254*4882a593Smuzhiyun data { 255*4882a593Smuzhiyun pins = "sdc1_data"; 256*4882a593Smuzhiyun bias-pull-up; 257*4882a593Smuzhiyun drive-strength = <10>; 258*4882a593Smuzhiyun }; 259*4882a593Smuzhiyun 260*4882a593Smuzhiyun rclk { 261*4882a593Smuzhiyun pins = "sdc1_rclk"; 262*4882a593Smuzhiyun bias-pull-down; 263*4882a593Smuzhiyun }; 264*4882a593Smuzhiyun }; 265*4882a593Smuzhiyun 266*4882a593Smuzhiyun sdc1_off: sdc1-off { 267*4882a593Smuzhiyun clk { 268*4882a593Smuzhiyun pins = "sdc1_clk"; 269*4882a593Smuzhiyun bias-disable; 270*4882a593Smuzhiyun drive-strength = <2>; 271*4882a593Smuzhiyun }; 272*4882a593Smuzhiyun 273*4882a593Smuzhiyun cmd { 274*4882a593Smuzhiyun pins = "sdc1_cmd"; 275*4882a593Smuzhiyun bias-pull-up; 276*4882a593Smuzhiyun drive-strength = <2>; 277*4882a593Smuzhiyun }; 278*4882a593Smuzhiyun 279*4882a593Smuzhiyun data { 280*4882a593Smuzhiyun pins = "sdc1_data"; 281*4882a593Smuzhiyun bias-pull-up; 282*4882a593Smuzhiyun drive-strength = <2>; 283*4882a593Smuzhiyun }; 284*4882a593Smuzhiyun 285*4882a593Smuzhiyun rclk { 286*4882a593Smuzhiyun pins = "sdc1_rclk"; 287*4882a593Smuzhiyun bias-pull-down; 288*4882a593Smuzhiyun }; 289*4882a593Smuzhiyun }; 290*4882a593Smuzhiyun 291*4882a593Smuzhiyun usb3_id_pin: usb3-id-pin { 292*4882a593Smuzhiyun pinmux { 293*4882a593Smuzhiyun pins = "gpio116"; 294*4882a593Smuzhiyun function = "gpio"; 295*4882a593Smuzhiyun }; 296*4882a593Smuzhiyun 297*4882a593Smuzhiyun pinconf { 298*4882a593Smuzhiyun pins = "gpio116"; 299*4882a593Smuzhiyun drive-strength = <2>; 300*4882a593Smuzhiyun bias-pull-up; 301*4882a593Smuzhiyun input-enable; 302*4882a593Smuzhiyun }; 303*4882a593Smuzhiyun }; 304*4882a593Smuzhiyun}; 305*4882a593Smuzhiyun 306*4882a593Smuzhiyun&pms405_gpios { 307*4882a593Smuzhiyun usb_vbus_boost_pin: usb-vbus-boost-pin { 308*4882a593Smuzhiyun pinconf { 309*4882a593Smuzhiyun pins = "gpio3"; 310*4882a593Smuzhiyun function = PMIC_GPIO_FUNC_NORMAL; 311*4882a593Smuzhiyun output-low; 312*4882a593Smuzhiyun power-source = <1>; 313*4882a593Smuzhiyun }; 314*4882a593Smuzhiyun }; 315*4882a593Smuzhiyun usb3_vbus_pin: usb3-vbus-pin { 316*4882a593Smuzhiyun pinconf { 317*4882a593Smuzhiyun pins = "gpio12"; 318*4882a593Smuzhiyun function = PMIC_GPIO_FUNC_NORMAL; 319*4882a593Smuzhiyun input-enable; 320*4882a593Smuzhiyun bias-pull-down; 321*4882a593Smuzhiyun power-source = <1>; 322*4882a593Smuzhiyun }; 323*4882a593Smuzhiyun }; 324*4882a593Smuzhiyun}; 325*4882a593Smuzhiyun 326*4882a593Smuzhiyun&usb2 { 327*4882a593Smuzhiyun status = "okay"; 328*4882a593Smuzhiyun}; 329*4882a593Smuzhiyun 330*4882a593Smuzhiyun&usb2_phy_sec { 331*4882a593Smuzhiyun vdd-supply = <&vreg_l4_1p2>; 332*4882a593Smuzhiyun vdda1p8-supply = <&vreg_l5_1p8>; 333*4882a593Smuzhiyun vdda3p3-supply = <&vreg_l12_3p3>; 334*4882a593Smuzhiyun status = "okay"; 335*4882a593Smuzhiyun}; 336*4882a593Smuzhiyun 337*4882a593Smuzhiyun&usb3 { 338*4882a593Smuzhiyun status = "okay"; 339*4882a593Smuzhiyun 340*4882a593Smuzhiyun dwc3@7580000 { 341*4882a593Smuzhiyun dr_mode = "host"; 342*4882a593Smuzhiyun }; 343*4882a593Smuzhiyun}; 344*4882a593Smuzhiyun 345*4882a593Smuzhiyun&usb2_phy_prim { 346*4882a593Smuzhiyun vdd-supply = <&vreg_l4_1p2>; 347*4882a593Smuzhiyun vdda1p8-supply = <&vreg_l5_1p8>; 348*4882a593Smuzhiyun vdda3p3-supply = <&vreg_l12_3p3>; 349*4882a593Smuzhiyun status = "okay"; 350*4882a593Smuzhiyun}; 351*4882a593Smuzhiyun 352*4882a593Smuzhiyun&usb3_phy { 353*4882a593Smuzhiyun vdd-supply = <&vreg_l3_1p05>; 354*4882a593Smuzhiyun vdda1p8-supply = <&vreg_l5_1p8>; 355*4882a593Smuzhiyun status = "okay"; 356*4882a593Smuzhiyun}; 357*4882a593Smuzhiyun 358*4882a593Smuzhiyun&wifi { 359*4882a593Smuzhiyun status = "okay"; 360*4882a593Smuzhiyun vdd-0.8-cx-mx-supply = <&vreg_l2_1p275>; 361*4882a593Smuzhiyun vdd-1.8-xo-supply = <&vreg_l5_1p8>; 362*4882a593Smuzhiyun vdd-1.3-rfa-supply = <&vreg_l1_1p3>; 363*4882a593Smuzhiyun}; 364*4882a593Smuzhiyun 365*4882a593Smuzhiyun/* PINCTRL - additions to nodes defined in qcs404.dtsi */ 366*4882a593Smuzhiyun 367*4882a593Smuzhiyun&blsp1_uart2_default { 368*4882a593Smuzhiyun rx { 369*4882a593Smuzhiyun drive-strength = <2>; 370*4882a593Smuzhiyun bias-disable; 371*4882a593Smuzhiyun }; 372*4882a593Smuzhiyun 373*4882a593Smuzhiyun tx { 374*4882a593Smuzhiyun drive-strength = <2>; 375*4882a593Smuzhiyun bias-disable; 376*4882a593Smuzhiyun }; 377*4882a593Smuzhiyun}; 378*4882a593Smuzhiyun 379*4882a593Smuzhiyun&blsp1_uart3_default { 380*4882a593Smuzhiyun cts { 381*4882a593Smuzhiyun pins = "gpio84"; 382*4882a593Smuzhiyun bias-disable; 383*4882a593Smuzhiyun }; 384*4882a593Smuzhiyun 385*4882a593Smuzhiyun rts-tx { 386*4882a593Smuzhiyun pins = "gpio85", "gpio82"; 387*4882a593Smuzhiyun drive-strength = <2>; 388*4882a593Smuzhiyun bias-disable; 389*4882a593Smuzhiyun }; 390*4882a593Smuzhiyun 391*4882a593Smuzhiyun rx { 392*4882a593Smuzhiyun pins = "gpio83"; 393*4882a593Smuzhiyun bias-pull-up; 394*4882a593Smuzhiyun }; 395*4882a593Smuzhiyun}; 396