1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/dts-v1/; 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 5*4882a593Smuzhiyun#include <dt-bindings/mfd/max77620.h> 6*4882a593Smuzhiyun#include <dt-bindings/pinctrl/pinctrl-tegra.h> 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun#include "tegra210.dtsi" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun model = "Google Pixel C"; 12*4882a593Smuzhiyun compatible = "google,smaug-rev8", "google,smaug-rev7", 13*4882a593Smuzhiyun "google,smaug-rev6", "google,smaug-rev5", 14*4882a593Smuzhiyun "google,smaug-rev4", "google,smaug-rev3", 15*4882a593Smuzhiyun "google,smaug-rev2", "google,smaug-rev1", 16*4882a593Smuzhiyun "google,smaug", "nvidia,tegra210"; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun aliases { 19*4882a593Smuzhiyun serial0 = &uarta; 20*4882a593Smuzhiyun }; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun chosen { 23*4882a593Smuzhiyun bootargs = "earlycon"; 24*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun memory { 28*4882a593Smuzhiyun device_type = "memory"; 29*4882a593Smuzhiyun reg = <0x0 0x80000000 0x0 0xc0000000>; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun host1x@50000000 { 33*4882a593Smuzhiyun dpaux: dpaux@545c0000 { 34*4882a593Smuzhiyun status = "okay"; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun pinmux: pinmux@700008d4 { 39*4882a593Smuzhiyun pinctrl-names = "boot"; 40*4882a593Smuzhiyun pinctrl-0 = <&state_boot>; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun state_boot: pinmux { 43*4882a593Smuzhiyun pex_l0_rst_n_pa0 { 44*4882a593Smuzhiyun nvidia,pins = "pex_l0_rst_n_pa0"; 45*4882a593Smuzhiyun nvidia,function = "rsvd1"; 46*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 47*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 48*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 49*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 50*4882a593Smuzhiyun nvidia,io-hv = <TEGRA_PIN_DISABLE>; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun pex_l0_clkreq_n_pa1 { 53*4882a593Smuzhiyun nvidia,pins = "pex_l0_clkreq_n_pa1"; 54*4882a593Smuzhiyun nvidia,function = "rsvd1"; 55*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 56*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 57*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 58*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 59*4882a593Smuzhiyun nvidia,io-hv = <TEGRA_PIN_DISABLE>; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun pex_wake_n_pa2 { 62*4882a593Smuzhiyun nvidia,pins = "pex_wake_n_pa2"; 63*4882a593Smuzhiyun nvidia,function = "rsvd1"; 64*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 65*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 66*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 67*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 68*4882a593Smuzhiyun nvidia,io-hv = <TEGRA_PIN_DISABLE>; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun pex_l1_rst_n_pa3 { 71*4882a593Smuzhiyun nvidia,pins = "pex_l1_rst_n_pa3"; 72*4882a593Smuzhiyun nvidia,function = "rsvd1"; 73*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 74*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 75*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 76*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 77*4882a593Smuzhiyun nvidia,io-hv = <TEGRA_PIN_DISABLE>; 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun pex_l1_clkreq_n_pa4 { 80*4882a593Smuzhiyun nvidia,pins = "pex_l1_clkreq_n_pa4"; 81*4882a593Smuzhiyun nvidia,function = "rsvd1"; 82*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 83*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 84*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 85*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 86*4882a593Smuzhiyun nvidia,io-hv = <TEGRA_PIN_DISABLE>; 87*4882a593Smuzhiyun }; 88*4882a593Smuzhiyun sata_led_active_pa5 { 89*4882a593Smuzhiyun nvidia,pins = "sata_led_active_pa5"; 90*4882a593Smuzhiyun nvidia,function = "rsvd1"; 91*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 92*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 93*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 94*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun pa6 { 97*4882a593Smuzhiyun nvidia,pins = "pa6"; 98*4882a593Smuzhiyun nvidia,function = "rsvd1"; 99*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_UP>; 100*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 101*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 102*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun dap1_fs_pb0 { 105*4882a593Smuzhiyun nvidia,pins = "dap1_fs_pb0"; 106*4882a593Smuzhiyun nvidia,function = "i2s1"; 107*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 108*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 109*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 110*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun dap1_din_pb1 { 113*4882a593Smuzhiyun nvidia,pins = "dap1_din_pb1"; 114*4882a593Smuzhiyun nvidia,function = "i2s1"; 115*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 116*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 117*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 118*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 119*4882a593Smuzhiyun }; 120*4882a593Smuzhiyun dap1_dout_pb2 { 121*4882a593Smuzhiyun nvidia,pins = "dap1_dout_pb2"; 122*4882a593Smuzhiyun nvidia,function = "i2s1"; 123*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 124*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 125*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 126*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 127*4882a593Smuzhiyun }; 128*4882a593Smuzhiyun dap1_sclk_pb3 { 129*4882a593Smuzhiyun nvidia,pins = "dap1_sclk_pb3"; 130*4882a593Smuzhiyun nvidia,function = "i2s1"; 131*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 132*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 133*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 134*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 135*4882a593Smuzhiyun }; 136*4882a593Smuzhiyun spi2_mosi_pb4 { 137*4882a593Smuzhiyun nvidia,pins = "spi2_mosi_pb4"; 138*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_UP>; 139*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 140*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 141*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 142*4882a593Smuzhiyun }; 143*4882a593Smuzhiyun spi2_miso_pb5 { 144*4882a593Smuzhiyun nvidia,pins = "spi2_miso_pb5"; 145*4882a593Smuzhiyun nvidia,function = "rsvd2"; 146*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 147*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 148*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 149*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 150*4882a593Smuzhiyun }; 151*4882a593Smuzhiyun spi2_sck_pb6 { 152*4882a593Smuzhiyun nvidia,pins = "spi2_sck_pb6"; 153*4882a593Smuzhiyun nvidia,function = "rsvd2"; 154*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 155*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 156*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 157*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 158*4882a593Smuzhiyun }; 159*4882a593Smuzhiyun spi2_cs0_pb7 { 160*4882a593Smuzhiyun nvidia,pins = "spi2_cs0_pb7"; 161*4882a593Smuzhiyun nvidia,function = "rsvd2"; 162*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 163*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 164*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 165*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 166*4882a593Smuzhiyun }; 167*4882a593Smuzhiyun spi1_mosi_pc0 { 168*4882a593Smuzhiyun nvidia,pins = "spi1_mosi_pc0"; 169*4882a593Smuzhiyun nvidia,function = "spi1"; 170*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 171*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 172*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 173*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 174*4882a593Smuzhiyun }; 175*4882a593Smuzhiyun spi1_miso_pc1 { 176*4882a593Smuzhiyun nvidia,pins = "spi1_miso_pc1"; 177*4882a593Smuzhiyun nvidia,function = "spi1"; 178*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 179*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 180*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 181*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 182*4882a593Smuzhiyun }; 183*4882a593Smuzhiyun spi1_sck_pc2 { 184*4882a593Smuzhiyun nvidia,pins = "spi1_sck_pc2"; 185*4882a593Smuzhiyun nvidia,function = "spi1"; 186*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 187*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 188*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 189*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 190*4882a593Smuzhiyun }; 191*4882a593Smuzhiyun spi1_cs0_pc3 { 192*4882a593Smuzhiyun nvidia,pins = "spi1_cs0_pc3"; 193*4882a593Smuzhiyun nvidia,function = "spi1"; 194*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 195*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 196*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 197*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 198*4882a593Smuzhiyun }; 199*4882a593Smuzhiyun spi1_cs1_pc4 { 200*4882a593Smuzhiyun nvidia,pins = "spi1_cs1_pc4"; 201*4882a593Smuzhiyun nvidia,function = "rsvd1"; 202*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 203*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 204*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 205*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 206*4882a593Smuzhiyun }; 207*4882a593Smuzhiyun spi4_sck_pc5 { 208*4882a593Smuzhiyun nvidia,pins = "spi4_sck_pc5"; 209*4882a593Smuzhiyun nvidia,function = "rsvd1"; 210*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 211*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 212*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 213*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 214*4882a593Smuzhiyun }; 215*4882a593Smuzhiyun spi4_cs0_pc6 { 216*4882a593Smuzhiyun nvidia,pins = "spi4_cs0_pc6"; 217*4882a593Smuzhiyun nvidia,function = "rsvd1"; 218*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 219*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 220*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 221*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 222*4882a593Smuzhiyun }; 223*4882a593Smuzhiyun spi4_mosi_pc7 { 224*4882a593Smuzhiyun nvidia,pins = "spi4_mosi_pc7"; 225*4882a593Smuzhiyun nvidia,function = "rsvd1"; 226*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 227*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 228*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 229*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 230*4882a593Smuzhiyun }; 231*4882a593Smuzhiyun spi4_miso_pd0 { 232*4882a593Smuzhiyun nvidia,pins = "spi4_miso_pd0"; 233*4882a593Smuzhiyun nvidia,function = "rsvd1"; 234*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 235*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 236*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 237*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 238*4882a593Smuzhiyun }; 239*4882a593Smuzhiyun uart3_tx_pd1 { 240*4882a593Smuzhiyun nvidia,pins = "uart3_tx_pd1"; 241*4882a593Smuzhiyun nvidia,function = "uartc"; 242*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 243*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 244*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 245*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 246*4882a593Smuzhiyun }; 247*4882a593Smuzhiyun uart3_rx_pd2 { 248*4882a593Smuzhiyun nvidia,pins = "uart3_rx_pd2"; 249*4882a593Smuzhiyun nvidia,function = "uartc"; 250*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 251*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 252*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 253*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 254*4882a593Smuzhiyun }; 255*4882a593Smuzhiyun uart3_rts_pd3 { 256*4882a593Smuzhiyun nvidia,pins = "uart3_rts_pd3"; 257*4882a593Smuzhiyun nvidia,function = "uartc"; 258*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 259*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 260*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 261*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 262*4882a593Smuzhiyun }; 263*4882a593Smuzhiyun uart3_cts_pd4 { 264*4882a593Smuzhiyun nvidia,pins = "uart3_cts_pd4"; 265*4882a593Smuzhiyun nvidia,function = "uartc"; 266*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 267*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 268*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 269*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 270*4882a593Smuzhiyun }; 271*4882a593Smuzhiyun dmic1_clk_pe0 { 272*4882a593Smuzhiyun nvidia,pins = "dmic1_clk_pe0"; 273*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 274*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 275*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 276*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 277*4882a593Smuzhiyun }; 278*4882a593Smuzhiyun dmic1_dat_pe1 { 279*4882a593Smuzhiyun nvidia,pins = "dmic1_dat_pe1"; 280*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 281*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 282*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 283*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 284*4882a593Smuzhiyun }; 285*4882a593Smuzhiyun dmic2_clk_pe2 { 286*4882a593Smuzhiyun nvidia,pins = "dmic2_clk_pe2"; 287*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 288*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 289*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 290*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 291*4882a593Smuzhiyun }; 292*4882a593Smuzhiyun dmic2_dat_pe3 { 293*4882a593Smuzhiyun nvidia,pins = "dmic2_dat_pe3"; 294*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_UP>; 295*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 296*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 297*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 298*4882a593Smuzhiyun }; 299*4882a593Smuzhiyun dmic3_clk_pe4 { 300*4882a593Smuzhiyun nvidia,pins = "dmic3_clk_pe4"; 301*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 302*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 303*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 304*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 305*4882a593Smuzhiyun }; 306*4882a593Smuzhiyun dmic3_dat_pe5 { 307*4882a593Smuzhiyun nvidia,pins = "dmic3_dat_pe5"; 308*4882a593Smuzhiyun nvidia,function = "rsvd2"; 309*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 310*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 311*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 312*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 313*4882a593Smuzhiyun }; 314*4882a593Smuzhiyun pe6 { 315*4882a593Smuzhiyun nvidia,pins = "pe6"; 316*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_UP>; 317*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 318*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 319*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 320*4882a593Smuzhiyun }; 321*4882a593Smuzhiyun pe7 { 322*4882a593Smuzhiyun nvidia,pins = "pe7"; 323*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_UP>; 324*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 325*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 326*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 327*4882a593Smuzhiyun }; 328*4882a593Smuzhiyun gen3_i2c_scl_pf0 { 329*4882a593Smuzhiyun nvidia,pins = "gen3_i2c_scl_pf0"; 330*4882a593Smuzhiyun nvidia,function = "i2c3"; 331*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 332*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 333*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 334*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 335*4882a593Smuzhiyun nvidia,io-hv = <TEGRA_PIN_DISABLE>; 336*4882a593Smuzhiyun }; 337*4882a593Smuzhiyun gen3_i2c_sda_pf1 { 338*4882a593Smuzhiyun nvidia,pins = "gen3_i2c_sda_pf1"; 339*4882a593Smuzhiyun nvidia,function = "i2c3"; 340*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 341*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 342*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 343*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 344*4882a593Smuzhiyun nvidia,io-hv = <TEGRA_PIN_DISABLE>; 345*4882a593Smuzhiyun }; 346*4882a593Smuzhiyun uart2_tx_pg0 { 347*4882a593Smuzhiyun nvidia,pins = "uart2_tx_pg0"; 348*4882a593Smuzhiyun nvidia,function = "uartb"; 349*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 350*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 351*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 352*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 353*4882a593Smuzhiyun }; 354*4882a593Smuzhiyun uart2_rx_pg1 { 355*4882a593Smuzhiyun nvidia,pins = "uart2_rx_pg1"; 356*4882a593Smuzhiyun nvidia,function = "uartb"; 357*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 358*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 359*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 360*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 361*4882a593Smuzhiyun }; 362*4882a593Smuzhiyun uart2_rts_pg2 { 363*4882a593Smuzhiyun nvidia,pins = "uart2_rts_pg2"; 364*4882a593Smuzhiyun nvidia,function = "rsvd2"; 365*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 366*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 367*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 368*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 369*4882a593Smuzhiyun }; 370*4882a593Smuzhiyun uart2_cts_pg3 { 371*4882a593Smuzhiyun nvidia,pins = "uart2_cts_pg3"; 372*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 373*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 374*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 375*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 376*4882a593Smuzhiyun }; 377*4882a593Smuzhiyun wifi_en_ph0 { 378*4882a593Smuzhiyun nvidia,pins = "wifi_en_ph0"; 379*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_UP>; 380*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 381*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 382*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 383*4882a593Smuzhiyun }; 384*4882a593Smuzhiyun wifi_rst_ph1 { 385*4882a593Smuzhiyun nvidia,pins = "wifi_rst_ph1"; 386*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 387*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 388*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 389*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 390*4882a593Smuzhiyun }; 391*4882a593Smuzhiyun wifi_wake_ap_ph2 { 392*4882a593Smuzhiyun nvidia,pins = "wifi_wake_ap_ph2"; 393*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 394*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 395*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 396*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 397*4882a593Smuzhiyun }; 398*4882a593Smuzhiyun ap_wake_bt_ph3 { 399*4882a593Smuzhiyun nvidia,pins = "ap_wake_bt_ph3"; 400*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 401*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 402*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 403*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 404*4882a593Smuzhiyun }; 405*4882a593Smuzhiyun bt_rst_ph4 { 406*4882a593Smuzhiyun nvidia,pins = "bt_rst_ph4"; 407*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 408*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 409*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 410*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 411*4882a593Smuzhiyun }; 412*4882a593Smuzhiyun bt_wake_ap_ph5 { 413*4882a593Smuzhiyun nvidia,pins = "bt_wake_ap_ph5"; 414*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 415*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 416*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 417*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 418*4882a593Smuzhiyun }; 419*4882a593Smuzhiyun ph6 { 420*4882a593Smuzhiyun nvidia,pins = "ph6"; 421*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 422*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 423*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 424*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 425*4882a593Smuzhiyun }; 426*4882a593Smuzhiyun ap_wake_nfc_ph7 { 427*4882a593Smuzhiyun nvidia,pins = "ap_wake_nfc_ph7"; 428*4882a593Smuzhiyun nvidia,function = "rsvd0"; 429*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 430*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 431*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 432*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 433*4882a593Smuzhiyun }; 434*4882a593Smuzhiyun nfc_en_pi0 { 435*4882a593Smuzhiyun nvidia,pins = "nfc_en_pi0"; 436*4882a593Smuzhiyun nvidia,function = "rsvd0"; 437*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 438*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 439*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 440*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 441*4882a593Smuzhiyun }; 442*4882a593Smuzhiyun nfc_int_pi1 { 443*4882a593Smuzhiyun nvidia,pins = "nfc_int_pi1"; 444*4882a593Smuzhiyun nvidia,function = "rsvd0"; 445*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 446*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 447*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 448*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 449*4882a593Smuzhiyun }; 450*4882a593Smuzhiyun gps_en_pi2 { 451*4882a593Smuzhiyun nvidia,pins = "gps_en_pi2"; 452*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 453*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 454*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 455*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 456*4882a593Smuzhiyun }; 457*4882a593Smuzhiyun gps_rst_pi3 { 458*4882a593Smuzhiyun nvidia,pins = "gps_rst_pi3"; 459*4882a593Smuzhiyun nvidia,function = "rsvd0"; 460*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 461*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 462*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 463*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 464*4882a593Smuzhiyun }; 465*4882a593Smuzhiyun uart4_tx_pi4 { 466*4882a593Smuzhiyun nvidia,pins = "uart4_tx_pi4"; 467*4882a593Smuzhiyun nvidia,function = "uartd"; 468*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 469*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 470*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 471*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 472*4882a593Smuzhiyun }; 473*4882a593Smuzhiyun uart4_rx_pi5 { 474*4882a593Smuzhiyun nvidia,pins = "uart4_rx_pi5"; 475*4882a593Smuzhiyun nvidia,function = "uartd"; 476*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 477*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 478*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 479*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 480*4882a593Smuzhiyun }; 481*4882a593Smuzhiyun uart4_rts_pi6 { 482*4882a593Smuzhiyun nvidia,pins = "uart4_rts_pi6"; 483*4882a593Smuzhiyun nvidia,function = "uartd"; 484*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 485*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 486*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 487*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 488*4882a593Smuzhiyun }; 489*4882a593Smuzhiyun uart4_cts_pi7 { 490*4882a593Smuzhiyun nvidia,pins = "uart4_cts_pi7"; 491*4882a593Smuzhiyun nvidia,function = "uartd"; 492*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 493*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 494*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 495*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 496*4882a593Smuzhiyun }; 497*4882a593Smuzhiyun gen1_i2c_sda_pj0 { 498*4882a593Smuzhiyun nvidia,pins = "gen1_i2c_sda_pj0"; 499*4882a593Smuzhiyun nvidia,function = "i2c1"; 500*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 501*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 502*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 503*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 504*4882a593Smuzhiyun nvidia,io-hv = <TEGRA_PIN_DISABLE>; 505*4882a593Smuzhiyun }; 506*4882a593Smuzhiyun gen1_i2c_scl_pj1 { 507*4882a593Smuzhiyun nvidia,pins = "gen1_i2c_scl_pj1"; 508*4882a593Smuzhiyun nvidia,function = "i2c1"; 509*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 510*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 511*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 512*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 513*4882a593Smuzhiyun nvidia,io-hv = <TEGRA_PIN_DISABLE>; 514*4882a593Smuzhiyun }; 515*4882a593Smuzhiyun gen2_i2c_scl_pj2 { 516*4882a593Smuzhiyun nvidia,pins = "gen2_i2c_scl_pj2"; 517*4882a593Smuzhiyun nvidia,function = "i2c2"; 518*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 519*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 520*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 521*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 522*4882a593Smuzhiyun nvidia,io-hv = <TEGRA_PIN_ENABLE>; 523*4882a593Smuzhiyun }; 524*4882a593Smuzhiyun gen2_i2c_sda_pj3 { 525*4882a593Smuzhiyun nvidia,pins = "gen2_i2c_sda_pj3"; 526*4882a593Smuzhiyun nvidia,function = "i2c2"; 527*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 528*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 529*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 530*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 531*4882a593Smuzhiyun nvidia,io-hv = <TEGRA_PIN_ENABLE>; 532*4882a593Smuzhiyun }; 533*4882a593Smuzhiyun dap4_fs_pj4 { 534*4882a593Smuzhiyun nvidia,pins = "dap4_fs_pj4"; 535*4882a593Smuzhiyun nvidia,function = "rsvd1"; 536*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 537*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 538*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 539*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 540*4882a593Smuzhiyun }; 541*4882a593Smuzhiyun dap4_din_pj5 { 542*4882a593Smuzhiyun nvidia,pins = "dap4_din_pj5"; 543*4882a593Smuzhiyun nvidia,function = "rsvd1"; 544*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 545*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 546*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 547*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 548*4882a593Smuzhiyun }; 549*4882a593Smuzhiyun dap4_dout_pj6 { 550*4882a593Smuzhiyun nvidia,pins = "dap4_dout_pj6"; 551*4882a593Smuzhiyun nvidia,function = "rsvd1"; 552*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 553*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 554*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 555*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 556*4882a593Smuzhiyun }; 557*4882a593Smuzhiyun dap4_sclk_pj7 { 558*4882a593Smuzhiyun nvidia,pins = "dap4_sclk_pj7"; 559*4882a593Smuzhiyun nvidia,function = "rsvd1"; 560*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 561*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 562*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 563*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 564*4882a593Smuzhiyun }; 565*4882a593Smuzhiyun pk0 { 566*4882a593Smuzhiyun nvidia,pins = "pk0"; 567*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 568*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 569*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 570*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 571*4882a593Smuzhiyun }; 572*4882a593Smuzhiyun pk1 { 573*4882a593Smuzhiyun nvidia,pins = "pk1"; 574*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 575*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 576*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 577*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 578*4882a593Smuzhiyun }; 579*4882a593Smuzhiyun pk2 { 580*4882a593Smuzhiyun nvidia,pins = "pk2"; 581*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 582*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 583*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 584*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 585*4882a593Smuzhiyun }; 586*4882a593Smuzhiyun pk3 { 587*4882a593Smuzhiyun nvidia,pins = "pk3"; 588*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 589*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 590*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 591*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 592*4882a593Smuzhiyun }; 593*4882a593Smuzhiyun pk4 { 594*4882a593Smuzhiyun nvidia,pins = "pk4"; 595*4882a593Smuzhiyun nvidia,function = "rsvd1"; 596*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 597*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 598*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 599*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 600*4882a593Smuzhiyun }; 601*4882a593Smuzhiyun pk5 { 602*4882a593Smuzhiyun nvidia,pins = "pk5"; 603*4882a593Smuzhiyun nvidia,function = "rsvd1"; 604*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 605*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 606*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 607*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 608*4882a593Smuzhiyun }; 609*4882a593Smuzhiyun pk6 { 610*4882a593Smuzhiyun nvidia,pins = "pk6"; 611*4882a593Smuzhiyun nvidia,function = "rsvd1"; 612*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 613*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 614*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 615*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 616*4882a593Smuzhiyun }; 617*4882a593Smuzhiyun pk7 { 618*4882a593Smuzhiyun nvidia,pins = "pk7"; 619*4882a593Smuzhiyun nvidia,function = "rsvd1"; 620*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 621*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 622*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 623*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 624*4882a593Smuzhiyun }; 625*4882a593Smuzhiyun pl0 { 626*4882a593Smuzhiyun nvidia,pins = "pl0"; 627*4882a593Smuzhiyun nvidia,function = "rsvd0"; 628*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 629*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 630*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 631*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 632*4882a593Smuzhiyun }; 633*4882a593Smuzhiyun pl1 { 634*4882a593Smuzhiyun nvidia,pins = "pl1"; 635*4882a593Smuzhiyun nvidia,function = "rsvd1"; 636*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 637*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 638*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 639*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 640*4882a593Smuzhiyun }; 641*4882a593Smuzhiyun sdmmc1_clk_pm0 { 642*4882a593Smuzhiyun nvidia,pins = "sdmmc1_clk_pm0"; 643*4882a593Smuzhiyun nvidia,function = "rsvd1"; 644*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 645*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 646*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 647*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 648*4882a593Smuzhiyun }; 649*4882a593Smuzhiyun sdmmc1_cmd_pm1 { 650*4882a593Smuzhiyun nvidia,pins = "sdmmc1_cmd_pm1"; 651*4882a593Smuzhiyun nvidia,function = "rsvd2"; 652*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 653*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 654*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 655*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 656*4882a593Smuzhiyun }; 657*4882a593Smuzhiyun sdmmc1_dat3_pm2 { 658*4882a593Smuzhiyun nvidia,pins = "sdmmc1_dat3_pm2"; 659*4882a593Smuzhiyun nvidia,function = "rsvd2"; 660*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 661*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 662*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 663*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 664*4882a593Smuzhiyun }; 665*4882a593Smuzhiyun sdmmc1_dat2_pm3 { 666*4882a593Smuzhiyun nvidia,pins = "sdmmc1_dat2_pm3"; 667*4882a593Smuzhiyun nvidia,function = "rsvd2"; 668*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 669*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 670*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 671*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 672*4882a593Smuzhiyun }; 673*4882a593Smuzhiyun sdmmc1_dat1_pm4 { 674*4882a593Smuzhiyun nvidia,pins = "sdmmc1_dat1_pm4"; 675*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 676*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 677*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 678*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 679*4882a593Smuzhiyun }; 680*4882a593Smuzhiyun sdmmc1_dat0_pm5 { 681*4882a593Smuzhiyun nvidia,pins = "sdmmc1_dat0_pm5"; 682*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 683*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 684*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 685*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 686*4882a593Smuzhiyun }; 687*4882a593Smuzhiyun sdmmc3_clk_pp0 { 688*4882a593Smuzhiyun nvidia,pins = "sdmmc3_clk_pp0"; 689*4882a593Smuzhiyun nvidia,function = "rsvd1"; 690*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 691*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 692*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 693*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 694*4882a593Smuzhiyun }; 695*4882a593Smuzhiyun sdmmc3_cmd_pp1 { 696*4882a593Smuzhiyun nvidia,pins = "sdmmc3_cmd_pp1"; 697*4882a593Smuzhiyun nvidia,function = "rsvd1"; 698*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 699*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 700*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 701*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 702*4882a593Smuzhiyun }; 703*4882a593Smuzhiyun sdmmc3_dat3_pp2 { 704*4882a593Smuzhiyun nvidia,pins = "sdmmc3_dat3_pp2"; 705*4882a593Smuzhiyun nvidia,function = "rsvd1"; 706*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 707*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 708*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 709*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 710*4882a593Smuzhiyun }; 711*4882a593Smuzhiyun sdmmc3_dat2_pp3 { 712*4882a593Smuzhiyun nvidia,pins = "sdmmc3_dat2_pp3"; 713*4882a593Smuzhiyun nvidia,function = "rsvd1"; 714*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 715*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 716*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 717*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 718*4882a593Smuzhiyun }; 719*4882a593Smuzhiyun sdmmc3_dat1_pp4 { 720*4882a593Smuzhiyun nvidia,pins = "sdmmc3_dat1_pp4"; 721*4882a593Smuzhiyun nvidia,function = "rsvd1"; 722*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 723*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 724*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 725*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 726*4882a593Smuzhiyun }; 727*4882a593Smuzhiyun sdmmc3_dat0_pp5 { 728*4882a593Smuzhiyun nvidia,pins = "sdmmc3_dat0_pp5"; 729*4882a593Smuzhiyun nvidia,function = "rsvd1"; 730*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 731*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 732*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 733*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 734*4882a593Smuzhiyun }; 735*4882a593Smuzhiyun cam1_mclk_ps0 { 736*4882a593Smuzhiyun nvidia,pins = "cam1_mclk_ps0"; 737*4882a593Smuzhiyun nvidia,function = "extperiph3"; 738*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 739*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 740*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 741*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 742*4882a593Smuzhiyun }; 743*4882a593Smuzhiyun cam2_mclk_ps1 { 744*4882a593Smuzhiyun nvidia,pins = "cam2_mclk_ps1"; 745*4882a593Smuzhiyun nvidia,function = "extperiph3"; 746*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 747*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 748*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 749*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 750*4882a593Smuzhiyun }; 751*4882a593Smuzhiyun cam_i2c_scl_ps2 { 752*4882a593Smuzhiyun nvidia,pins = "cam_i2c_scl_ps2"; 753*4882a593Smuzhiyun nvidia,function = "i2cvi"; 754*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 755*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 756*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 757*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 758*4882a593Smuzhiyun nvidia,io-hv = <TEGRA_PIN_DISABLE>; 759*4882a593Smuzhiyun }; 760*4882a593Smuzhiyun cam_i2c_sda_ps3 { 761*4882a593Smuzhiyun nvidia,pins = "cam_i2c_sda_ps3"; 762*4882a593Smuzhiyun nvidia,function = "i2cvi"; 763*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 764*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 765*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 766*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 767*4882a593Smuzhiyun nvidia,io-hv = <TEGRA_PIN_DISABLE>; 768*4882a593Smuzhiyun }; 769*4882a593Smuzhiyun cam_rst_ps4 { 770*4882a593Smuzhiyun nvidia,pins = "cam_rst_ps4"; 771*4882a593Smuzhiyun nvidia,function = "rsvd1"; 772*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 773*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 774*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 775*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 776*4882a593Smuzhiyun }; 777*4882a593Smuzhiyun cam_af_en_ps5 { 778*4882a593Smuzhiyun nvidia,pins = "cam_af_en_ps5"; 779*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 780*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 781*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 782*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 783*4882a593Smuzhiyun }; 784*4882a593Smuzhiyun cam_flash_en_ps6 { 785*4882a593Smuzhiyun nvidia,pins = "cam_flash_en_ps6"; 786*4882a593Smuzhiyun nvidia,function = "rsvd2"; 787*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 788*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 789*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 790*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 791*4882a593Smuzhiyun }; 792*4882a593Smuzhiyun cam1_pwdn_ps7 { 793*4882a593Smuzhiyun nvidia,pins = "cam1_pwdn_ps7"; 794*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 795*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 796*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 797*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 798*4882a593Smuzhiyun }; 799*4882a593Smuzhiyun cam2_pwdn_pt0 { 800*4882a593Smuzhiyun nvidia,pins = "cam2_pwdn_pt0"; 801*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 802*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 803*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 804*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 805*4882a593Smuzhiyun }; 806*4882a593Smuzhiyun cam1_strobe_pt1 { 807*4882a593Smuzhiyun nvidia,pins = "cam1_strobe_pt1"; 808*4882a593Smuzhiyun nvidia,function = "rsvd1"; 809*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 810*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 811*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 812*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 813*4882a593Smuzhiyun }; 814*4882a593Smuzhiyun uart1_tx_pu0 { 815*4882a593Smuzhiyun nvidia,pins = "uart1_tx_pu0"; 816*4882a593Smuzhiyun nvidia,function = "uarta"; 817*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 818*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 819*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 820*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 821*4882a593Smuzhiyun }; 822*4882a593Smuzhiyun uart1_rx_pu1 { 823*4882a593Smuzhiyun nvidia,pins = "uart1_rx_pu1"; 824*4882a593Smuzhiyun nvidia,function = "uarta"; 825*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 826*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 827*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 828*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 829*4882a593Smuzhiyun }; 830*4882a593Smuzhiyun uart1_rts_pu2 { 831*4882a593Smuzhiyun nvidia,pins = "uart1_rts_pu2"; 832*4882a593Smuzhiyun nvidia,function = "rsvd1"; 833*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 834*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 835*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 836*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 837*4882a593Smuzhiyun }; 838*4882a593Smuzhiyun uart1_cts_pu3 { 839*4882a593Smuzhiyun nvidia,pins = "uart1_cts_pu3"; 840*4882a593Smuzhiyun nvidia,function = "rsvd1"; 841*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 842*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 843*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 844*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 845*4882a593Smuzhiyun }; 846*4882a593Smuzhiyun lcd_bl_pwm_pv0 { 847*4882a593Smuzhiyun nvidia,pins = "lcd_bl_pwm_pv0"; 848*4882a593Smuzhiyun nvidia,function = "rsvd3"; 849*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 850*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 851*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 852*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 853*4882a593Smuzhiyun }; 854*4882a593Smuzhiyun lcd_bl_en_pv1 { 855*4882a593Smuzhiyun nvidia,pins = "lcd_bl_en_pv1"; 856*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 857*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 858*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 859*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 860*4882a593Smuzhiyun }; 861*4882a593Smuzhiyun lcd_rst_pv2 { 862*4882a593Smuzhiyun nvidia,pins = "lcd_rst_pv2"; 863*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 864*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 865*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 866*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 867*4882a593Smuzhiyun }; 868*4882a593Smuzhiyun lcd_gpio1_pv3 { 869*4882a593Smuzhiyun nvidia,pins = "lcd_gpio1_pv3"; 870*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 871*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 872*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 873*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 874*4882a593Smuzhiyun }; 875*4882a593Smuzhiyun lcd_gpio2_pv4 { 876*4882a593Smuzhiyun nvidia,pins = "lcd_gpio2_pv4"; 877*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 878*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 879*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 880*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 881*4882a593Smuzhiyun }; 882*4882a593Smuzhiyun ap_ready_pv5 { 883*4882a593Smuzhiyun nvidia,pins = "ap_ready_pv5"; 884*4882a593Smuzhiyun nvidia,function = "rsvd0"; 885*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 886*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 887*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 888*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 889*4882a593Smuzhiyun }; 890*4882a593Smuzhiyun touch_rst_pv6 { 891*4882a593Smuzhiyun nvidia,pins = "touch_rst_pv6"; 892*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 893*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 894*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 895*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 896*4882a593Smuzhiyun }; 897*4882a593Smuzhiyun touch_clk_pv7 { 898*4882a593Smuzhiyun nvidia,pins = "touch_clk_pv7"; 899*4882a593Smuzhiyun nvidia,function = "touch"; 900*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 901*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 902*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 903*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 904*4882a593Smuzhiyun }; 905*4882a593Smuzhiyun modem_wake_ap_px0 { 906*4882a593Smuzhiyun nvidia,pins = "modem_wake_ap_px0"; 907*4882a593Smuzhiyun nvidia,function = "rsvd0"; 908*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 909*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 910*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 911*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 912*4882a593Smuzhiyun }; 913*4882a593Smuzhiyun touch_int_px1 { 914*4882a593Smuzhiyun nvidia,pins = "touch_int_px1"; 915*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 916*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 917*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 918*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 919*4882a593Smuzhiyun }; 920*4882a593Smuzhiyun motion_int_px2 { 921*4882a593Smuzhiyun nvidia,pins = "motion_int_px2"; 922*4882a593Smuzhiyun nvidia,function = "rsvd0"; 923*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 924*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 925*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 926*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 927*4882a593Smuzhiyun }; 928*4882a593Smuzhiyun als_prox_int_px3 { 929*4882a593Smuzhiyun nvidia,pins = "als_prox_int_px3"; 930*4882a593Smuzhiyun nvidia,function = "rsvd0"; 931*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 932*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 933*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 934*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 935*4882a593Smuzhiyun }; 936*4882a593Smuzhiyun temp_alert_px4 { 937*4882a593Smuzhiyun nvidia,pins = "temp_alert_px4"; 938*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_UP>; 939*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 940*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 941*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 942*4882a593Smuzhiyun }; 943*4882a593Smuzhiyun button_power_on_px5 { 944*4882a593Smuzhiyun nvidia,pins = "button_power_on_px5"; 945*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_UP>; 946*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 947*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 948*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 949*4882a593Smuzhiyun }; 950*4882a593Smuzhiyun button_vol_up_px6 { 951*4882a593Smuzhiyun nvidia,pins = "button_vol_up_px6"; 952*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 953*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 954*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 955*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 956*4882a593Smuzhiyun }; 957*4882a593Smuzhiyun button_vol_down_px7 { 958*4882a593Smuzhiyun nvidia,pins = "button_vol_down_px7"; 959*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_UP>; 960*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 961*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 962*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 963*4882a593Smuzhiyun }; 964*4882a593Smuzhiyun button_slide_sw_py0 { 965*4882a593Smuzhiyun nvidia,pins = "button_slide_sw_py0"; 966*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_UP>; 967*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 968*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 969*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 970*4882a593Smuzhiyun }; 971*4882a593Smuzhiyun button_home_py1 { 972*4882a593Smuzhiyun nvidia,pins = "button_home_py1"; 973*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_UP>; 974*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 975*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 976*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 977*4882a593Smuzhiyun }; 978*4882a593Smuzhiyun lcd_te_py2 { 979*4882a593Smuzhiyun nvidia,pins = "lcd_te_py2"; 980*4882a593Smuzhiyun nvidia,function = "displaya"; 981*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 982*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 983*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 984*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 985*4882a593Smuzhiyun }; 986*4882a593Smuzhiyun pwr_i2c_scl_py3 { 987*4882a593Smuzhiyun nvidia,pins = "pwr_i2c_scl_py3"; 988*4882a593Smuzhiyun nvidia,function = "i2cpmu"; 989*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 990*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 991*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 992*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 993*4882a593Smuzhiyun nvidia,io-hv = <TEGRA_PIN_DISABLE>; 994*4882a593Smuzhiyun }; 995*4882a593Smuzhiyun pwr_i2c_sda_py4 { 996*4882a593Smuzhiyun nvidia,pins = "pwr_i2c_sda_py4"; 997*4882a593Smuzhiyun nvidia,function = "i2cpmu"; 998*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 999*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 1000*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1001*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1002*4882a593Smuzhiyun nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1003*4882a593Smuzhiyun }; 1004*4882a593Smuzhiyun clk_32k_out_py5 { 1005*4882a593Smuzhiyun nvidia,pins = "clk_32k_out_py5"; 1006*4882a593Smuzhiyun nvidia,function = "soc"; 1007*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_UP>; 1008*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 1009*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1010*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1011*4882a593Smuzhiyun }; 1012*4882a593Smuzhiyun pz0 { 1013*4882a593Smuzhiyun nvidia,pins = "pz0"; 1014*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_UP>; 1015*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 1016*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1017*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1018*4882a593Smuzhiyun }; 1019*4882a593Smuzhiyun pz1 { 1020*4882a593Smuzhiyun nvidia,pins = "pz1"; 1021*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_UP>; 1022*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 1023*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1024*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1025*4882a593Smuzhiyun }; 1026*4882a593Smuzhiyun pz2 { 1027*4882a593Smuzhiyun nvidia,pins = "pz2"; 1028*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_UP>; 1029*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 1030*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1031*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1032*4882a593Smuzhiyun }; 1033*4882a593Smuzhiyun pz3 { 1034*4882a593Smuzhiyun nvidia,pins = "pz3"; 1035*4882a593Smuzhiyun nvidia,function = "rsvd1"; 1036*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1037*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 1038*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1039*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1040*4882a593Smuzhiyun }; 1041*4882a593Smuzhiyun pz4 { 1042*4882a593Smuzhiyun nvidia,pins = "pz4"; 1043*4882a593Smuzhiyun nvidia,function = "rsvd1"; 1044*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1045*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 1046*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1047*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1048*4882a593Smuzhiyun }; 1049*4882a593Smuzhiyun pz5 { 1050*4882a593Smuzhiyun nvidia,pins = "pz5"; 1051*4882a593Smuzhiyun nvidia,function = "soc"; 1052*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_UP>; 1053*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 1054*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1055*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1056*4882a593Smuzhiyun }; 1057*4882a593Smuzhiyun dap2_fs_paa0 { 1058*4882a593Smuzhiyun nvidia,pins = "dap2_fs_paa0"; 1059*4882a593Smuzhiyun nvidia,function = "i2s2"; 1060*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1061*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 1062*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1063*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1064*4882a593Smuzhiyun }; 1065*4882a593Smuzhiyun dap2_sclk_paa1 { 1066*4882a593Smuzhiyun nvidia,pins = "dap2_sclk_paa1"; 1067*4882a593Smuzhiyun nvidia,function = "i2s2"; 1068*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1069*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 1070*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1071*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1072*4882a593Smuzhiyun }; 1073*4882a593Smuzhiyun dap2_din_paa2 { 1074*4882a593Smuzhiyun nvidia,pins = "dap2_din_paa2"; 1075*4882a593Smuzhiyun nvidia,function = "i2s2"; 1076*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1077*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 1078*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1079*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1080*4882a593Smuzhiyun }; 1081*4882a593Smuzhiyun dap2_dout_paa3 { 1082*4882a593Smuzhiyun nvidia,pins = "dap2_dout_paa3"; 1083*4882a593Smuzhiyun nvidia,function = "i2s2"; 1084*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1085*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 1086*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1087*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1088*4882a593Smuzhiyun }; 1089*4882a593Smuzhiyun aud_mclk_pbb0 { 1090*4882a593Smuzhiyun nvidia,pins = "aud_mclk_pbb0"; 1091*4882a593Smuzhiyun nvidia,function = "aud"; 1092*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1093*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 1094*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1095*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1096*4882a593Smuzhiyun }; 1097*4882a593Smuzhiyun dvfs_pwm_pbb1 { 1098*4882a593Smuzhiyun nvidia,pins = "dvfs_pwm_pbb1"; 1099*4882a593Smuzhiyun nvidia,function = "rsvd0"; 1100*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1101*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 1102*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1103*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1104*4882a593Smuzhiyun }; 1105*4882a593Smuzhiyun dvfs_clk_pbb2 { 1106*4882a593Smuzhiyun nvidia,pins = "dvfs_clk_pbb2"; 1107*4882a593Smuzhiyun nvidia,function = "rsvd0"; 1108*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1109*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 1110*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1111*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1112*4882a593Smuzhiyun }; 1113*4882a593Smuzhiyun gpio_x1_aud_pbb3 { 1114*4882a593Smuzhiyun nvidia,pins = "gpio_x1_aud_pbb3"; 1115*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1116*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 1117*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1118*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1119*4882a593Smuzhiyun }; 1120*4882a593Smuzhiyun gpio_x3_aud_pbb4 { 1121*4882a593Smuzhiyun nvidia,pins = "gpio_x3_aud_pbb4"; 1122*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_UP>; 1123*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 1124*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1125*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1126*4882a593Smuzhiyun }; 1127*4882a593Smuzhiyun hdmi_cec_pcc0 { 1128*4882a593Smuzhiyun nvidia,pins = "hdmi_cec_pcc0"; 1129*4882a593Smuzhiyun nvidia,function = "rsvd1"; 1130*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1131*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 1132*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1133*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1134*4882a593Smuzhiyun nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1135*4882a593Smuzhiyun }; 1136*4882a593Smuzhiyun hdmi_int_dp_hpd_pcc1 { 1137*4882a593Smuzhiyun nvidia,pins = "hdmi_int_dp_hpd_pcc1"; 1138*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1139*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 1140*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1141*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1142*4882a593Smuzhiyun nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1143*4882a593Smuzhiyun }; 1144*4882a593Smuzhiyun spdif_out_pcc2 { 1145*4882a593Smuzhiyun nvidia,pins = "spdif_out_pcc2"; 1146*4882a593Smuzhiyun nvidia,function = "rsvd1"; 1147*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1148*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 1149*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1150*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1151*4882a593Smuzhiyun }; 1152*4882a593Smuzhiyun spdif_in_pcc3 { 1153*4882a593Smuzhiyun nvidia,pins = "spdif_in_pcc3"; 1154*4882a593Smuzhiyun nvidia,function = "rsvd1"; 1155*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1156*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 1157*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1158*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1159*4882a593Smuzhiyun }; 1160*4882a593Smuzhiyun usb_vbus_en0_pcc4 { 1161*4882a593Smuzhiyun nvidia,pins = "usb_vbus_en0_pcc4"; 1162*4882a593Smuzhiyun nvidia,function = "rsvd1"; 1163*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1164*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 1165*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1166*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1167*4882a593Smuzhiyun nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1168*4882a593Smuzhiyun }; 1169*4882a593Smuzhiyun usb_vbus_en1_pcc5 { 1170*4882a593Smuzhiyun nvidia,pins = "usb_vbus_en1_pcc5"; 1171*4882a593Smuzhiyun nvidia,function = "rsvd1"; 1172*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1173*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 1174*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1175*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1176*4882a593Smuzhiyun nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1177*4882a593Smuzhiyun }; 1178*4882a593Smuzhiyun dp_hpd0_pcc6 { 1179*4882a593Smuzhiyun nvidia,pins = "dp_hpd0_pcc6"; 1180*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1181*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 1182*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1183*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1184*4882a593Smuzhiyun }; 1185*4882a593Smuzhiyun pcc7 { 1186*4882a593Smuzhiyun nvidia,pins = "pcc7"; 1187*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1188*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 1189*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1190*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1191*4882a593Smuzhiyun nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1192*4882a593Smuzhiyun }; 1193*4882a593Smuzhiyun spi2_cs1_pdd0 { 1194*4882a593Smuzhiyun nvidia,pins = "spi2_cs1_pdd0"; 1195*4882a593Smuzhiyun nvidia,function = "rsvd1"; 1196*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1197*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 1198*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1199*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1200*4882a593Smuzhiyun }; 1201*4882a593Smuzhiyun qspi_sck_pee0 { 1202*4882a593Smuzhiyun nvidia,pins = "qspi_sck_pee0"; 1203*4882a593Smuzhiyun nvidia,function = "qspi"; 1204*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1205*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 1206*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1207*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1208*4882a593Smuzhiyun }; 1209*4882a593Smuzhiyun qspi_cs_n_pee1 { 1210*4882a593Smuzhiyun nvidia,pins = "qspi_cs_n_pee1"; 1211*4882a593Smuzhiyun nvidia,function = "qspi"; 1212*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1213*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 1214*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1215*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1216*4882a593Smuzhiyun }; 1217*4882a593Smuzhiyun qspi_io0_pee2 { 1218*4882a593Smuzhiyun nvidia,pins = "qspi_io0_pee2"; 1219*4882a593Smuzhiyun nvidia,function = "qspi"; 1220*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1221*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 1222*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1223*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1224*4882a593Smuzhiyun }; 1225*4882a593Smuzhiyun qspi_io1_pee3 { 1226*4882a593Smuzhiyun nvidia,pins = "qspi_io1_pee3"; 1227*4882a593Smuzhiyun nvidia,function = "qspi"; 1228*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1229*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 1230*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1231*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1232*4882a593Smuzhiyun }; 1233*4882a593Smuzhiyun qspi_io2_pee4 { 1234*4882a593Smuzhiyun nvidia,pins = "qspi_io2_pee4"; 1235*4882a593Smuzhiyun nvidia,function = "rsvd1"; 1236*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1237*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 1238*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1239*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1240*4882a593Smuzhiyun }; 1241*4882a593Smuzhiyun qspi_io3_pee5 { 1242*4882a593Smuzhiyun nvidia,pins = "qspi_io3_pee5"; 1243*4882a593Smuzhiyun nvidia,function = "rsvd1"; 1244*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1245*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 1246*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1247*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1248*4882a593Smuzhiyun }; 1249*4882a593Smuzhiyun core_pwr_req { 1250*4882a593Smuzhiyun nvidia,pins = "core_pwr_req"; 1251*4882a593Smuzhiyun nvidia,function = "core"; 1252*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1253*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 1254*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1255*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1256*4882a593Smuzhiyun }; 1257*4882a593Smuzhiyun cpu_pwr_req { 1258*4882a593Smuzhiyun nvidia,pins = "cpu_pwr_req"; 1259*4882a593Smuzhiyun nvidia,function = "cpu"; 1260*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1261*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 1262*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1263*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1264*4882a593Smuzhiyun }; 1265*4882a593Smuzhiyun pwr_int_n { 1266*4882a593Smuzhiyun nvidia,pins = "pwr_int_n"; 1267*4882a593Smuzhiyun nvidia,function = "pmi"; 1268*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_UP>; 1269*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 1270*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1271*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1272*4882a593Smuzhiyun }; 1273*4882a593Smuzhiyun clk_32k_in { 1274*4882a593Smuzhiyun nvidia,pins = "clk_32k_in"; 1275*4882a593Smuzhiyun nvidia,function = "clk"; 1276*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1277*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 1278*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1279*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1280*4882a593Smuzhiyun }; 1281*4882a593Smuzhiyun jtag_rtck { 1282*4882a593Smuzhiyun nvidia,pins = "jtag_rtck"; 1283*4882a593Smuzhiyun nvidia,function = "jtag"; 1284*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_UP>; 1285*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 1286*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1287*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1288*4882a593Smuzhiyun }; 1289*4882a593Smuzhiyun clk_req { 1290*4882a593Smuzhiyun nvidia,pins = "clk_req"; 1291*4882a593Smuzhiyun nvidia,function = "rsvd1"; 1292*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1293*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_ENABLE>; 1294*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1295*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1296*4882a593Smuzhiyun }; 1297*4882a593Smuzhiyun shutdown { 1298*4882a593Smuzhiyun nvidia,pins = "shutdown"; 1299*4882a593Smuzhiyun nvidia,function = "shutdown"; 1300*4882a593Smuzhiyun nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1301*4882a593Smuzhiyun nvidia,tristate = <TEGRA_PIN_DISABLE>; 1302*4882a593Smuzhiyun nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1303*4882a593Smuzhiyun nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1304*4882a593Smuzhiyun }; 1305*4882a593Smuzhiyun }; 1306*4882a593Smuzhiyun }; 1307*4882a593Smuzhiyun 1308*4882a593Smuzhiyun serial@70006000 { 1309*4882a593Smuzhiyun status = "okay"; 1310*4882a593Smuzhiyun }; 1311*4882a593Smuzhiyun 1312*4882a593Smuzhiyun i2c@7000c400 { 1313*4882a593Smuzhiyun status = "okay"; 1314*4882a593Smuzhiyun clock-frequency = <1000000>; 1315*4882a593Smuzhiyun 1316*4882a593Smuzhiyun ec@1e { 1317*4882a593Smuzhiyun compatible = "google,cros-ec-i2c"; 1318*4882a593Smuzhiyun reg = <0x1e>; 1319*4882a593Smuzhiyun interrupt-parent = <&gpio>; 1320*4882a593Smuzhiyun interrupts = <TEGRA_GPIO(Z, 1) IRQ_TYPE_LEVEL_LOW>; 1321*4882a593Smuzhiyun wakeup-source; 1322*4882a593Smuzhiyun 1323*4882a593Smuzhiyun ec_i2c_0: i2c-tunnel { 1324*4882a593Smuzhiyun compatible = "google,cros-ec-i2c-tunnel"; 1325*4882a593Smuzhiyun #address-cells = <1>; 1326*4882a593Smuzhiyun #size-cells = <0>; 1327*4882a593Smuzhiyun 1328*4882a593Smuzhiyun google,remote-bus = <0>; 1329*4882a593Smuzhiyun 1330*4882a593Smuzhiyun battery: bq27742@55 { 1331*4882a593Smuzhiyun compatible = "ti,bq27742"; 1332*4882a593Smuzhiyun reg = <0x55>; 1333*4882a593Smuzhiyun }; 1334*4882a593Smuzhiyun }; 1335*4882a593Smuzhiyun }; 1336*4882a593Smuzhiyun }; 1337*4882a593Smuzhiyun 1338*4882a593Smuzhiyun i2c@7000d000 { 1339*4882a593Smuzhiyun status = "okay"; 1340*4882a593Smuzhiyun clock-frequency = <1000000>; 1341*4882a593Smuzhiyun 1342*4882a593Smuzhiyun max77621_cpu: max77621@1b { 1343*4882a593Smuzhiyun compatible = "maxim,max77621"; 1344*4882a593Smuzhiyun reg = <0x1b>; 1345*4882a593Smuzhiyun interrupt-parent = <&gpio>; 1346*4882a593Smuzhiyun interrupts = <TEGRA_GPIO(Y, 1) IRQ_TYPE_LEVEL_LOW>; 1347*4882a593Smuzhiyun regulator-always-on; 1348*4882a593Smuzhiyun regulator-boot-on; 1349*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 1350*4882a593Smuzhiyun regulator-max-microvolt = <1231250>; 1351*4882a593Smuzhiyun regulator-name = "PPVAR_CPU"; 1352*4882a593Smuzhiyun regulator-ramp-delay = <12500>; 1353*4882a593Smuzhiyun maxim,dvs-default-state = <1>; 1354*4882a593Smuzhiyun maxim,enable-active-discharge; 1355*4882a593Smuzhiyun maxim,enable-bias-control; 1356*4882a593Smuzhiyun maxim,enable-etr; 1357*4882a593Smuzhiyun maxim,enable-gpio = <&pmic 5 0>; 1358*4882a593Smuzhiyun maxim,externally-enable; 1359*4882a593Smuzhiyun }; 1360*4882a593Smuzhiyun 1361*4882a593Smuzhiyun pmic: pmic@3c { 1362*4882a593Smuzhiyun compatible = "maxim,max77620"; 1363*4882a593Smuzhiyun reg = <0x3c>; 1364*4882a593Smuzhiyun interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 1365*4882a593Smuzhiyun 1366*4882a593Smuzhiyun #interrupt-cells = <2>; 1367*4882a593Smuzhiyun interrupt-controller; 1368*4882a593Smuzhiyun 1369*4882a593Smuzhiyun gpio-controller; 1370*4882a593Smuzhiyun #gpio-cells = <2>; 1371*4882a593Smuzhiyun 1372*4882a593Smuzhiyun pinctrl-names = "default"; 1373*4882a593Smuzhiyun pinctrl-0 = <&max77620_default>; 1374*4882a593Smuzhiyun 1375*4882a593Smuzhiyun max77620_default: pinmux { 1376*4882a593Smuzhiyun gpio0_1_2_7 { 1377*4882a593Smuzhiyun pins = "gpio0", "gpio1", "gpio2", "gpio7"; 1378*4882a593Smuzhiyun function = "gpio"; 1379*4882a593Smuzhiyun }; 1380*4882a593Smuzhiyun 1381*4882a593Smuzhiyun /* 1382*4882a593Smuzhiyun * GPIO3 is used to en_pp3300, and it is part of power 1383*4882a593Smuzhiyun * sequence, So it must be sequenced up (automatically 1384*4882a593Smuzhiyun * set by OTP) and down properly. 1385*4882a593Smuzhiyun */ 1386*4882a593Smuzhiyun gpio3 { 1387*4882a593Smuzhiyun pins = "gpio3"; 1388*4882a593Smuzhiyun function = "fps-out"; 1389*4882a593Smuzhiyun drive-open-drain = <1>; 1390*4882a593Smuzhiyun maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 1391*4882a593Smuzhiyun maxim,active-fps-power-up-slot = <4>; 1392*4882a593Smuzhiyun maxim,active-fps-power-down-slot = <2>; 1393*4882a593Smuzhiyun }; 1394*4882a593Smuzhiyun 1395*4882a593Smuzhiyun gpio5_6 { 1396*4882a593Smuzhiyun pins = "gpio5", "gpio6"; 1397*4882a593Smuzhiyun function = "gpio"; 1398*4882a593Smuzhiyun drive-push-pull = <1>; 1399*4882a593Smuzhiyun }; 1400*4882a593Smuzhiyun 1401*4882a593Smuzhiyun gpio4 { 1402*4882a593Smuzhiyun pins = "gpio4"; 1403*4882a593Smuzhiyun function = "32k-out1"; 1404*4882a593Smuzhiyun }; 1405*4882a593Smuzhiyun }; 1406*4882a593Smuzhiyun 1407*4882a593Smuzhiyun fps { 1408*4882a593Smuzhiyun fps0 { 1409*4882a593Smuzhiyun maxim,shutdown-fps-time-period-us = <5120>; 1410*4882a593Smuzhiyun maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 1411*4882a593Smuzhiyun }; 1412*4882a593Smuzhiyun 1413*4882a593Smuzhiyun fps1 { 1414*4882a593Smuzhiyun maxim,shutdown-fps-time-period-us = <5120>; 1415*4882a593Smuzhiyun maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>; 1416*4882a593Smuzhiyun maxim,device-state-on-disabled-event = <MAX77620_FPS_INACTIVE_STATE_SLEEP>; 1417*4882a593Smuzhiyun }; 1418*4882a593Smuzhiyun 1419*4882a593Smuzhiyun fps2 { 1420*4882a593Smuzhiyun maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 1421*4882a593Smuzhiyun }; 1422*4882a593Smuzhiyun }; 1423*4882a593Smuzhiyun 1424*4882a593Smuzhiyun regulators { 1425*4882a593Smuzhiyun in-ldo0-1-supply = <&pp1350>; 1426*4882a593Smuzhiyun in-ldo2-supply = <&pp3300>; 1427*4882a593Smuzhiyun in-ldo3-5-supply = <&pp3300>; 1428*4882a593Smuzhiyun in-ldo7-8-supply = <&pp1350>; 1429*4882a593Smuzhiyun 1430*4882a593Smuzhiyun ppvar_soc: sd0 { 1431*4882a593Smuzhiyun regulator-name = "PPVAR_SOC"; 1432*4882a593Smuzhiyun regulator-min-microvolt = <825000>; 1433*4882a593Smuzhiyun regulator-max-microvolt = <1125000>; 1434*4882a593Smuzhiyun regulator-always-on; 1435*4882a593Smuzhiyun regulator-boot-on; 1436*4882a593Smuzhiyun maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 1437*4882a593Smuzhiyun maxim,active-fps-power-up-slot = <1>; 1438*4882a593Smuzhiyun maxim,active-fps-power-down-slot = <7>; 1439*4882a593Smuzhiyun }; 1440*4882a593Smuzhiyun 1441*4882a593Smuzhiyun pp1100_sd1: sd1 { 1442*4882a593Smuzhiyun regulator-name = "PP1100"; 1443*4882a593Smuzhiyun regulator-min-microvolt = <1125000>; 1444*4882a593Smuzhiyun regulator-max-microvolt = <1125000>; 1445*4882a593Smuzhiyun regulator-always-on; 1446*4882a593Smuzhiyun regulator-boot-on; 1447*4882a593Smuzhiyun maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 1448*4882a593Smuzhiyun maxim,active-fps-power-up-slot = <5>; 1449*4882a593Smuzhiyun maxim,active-fps-power-down-slot = <1>; 1450*4882a593Smuzhiyun }; 1451*4882a593Smuzhiyun 1452*4882a593Smuzhiyun pp1350: sd2 { 1453*4882a593Smuzhiyun regulator-name = "PP1350"; 1454*4882a593Smuzhiyun regulator-min-microvolt = <1350000>; 1455*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 1456*4882a593Smuzhiyun regulator-always-on; 1457*4882a593Smuzhiyun regulator-boot-on; 1458*4882a593Smuzhiyun maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1459*4882a593Smuzhiyun maxim,active-fps-power-up-slot = <2>; 1460*4882a593Smuzhiyun maxim,active-fps-power-down-slot = <5>; 1461*4882a593Smuzhiyun }; 1462*4882a593Smuzhiyun 1463*4882a593Smuzhiyun pp1800: sd3 { 1464*4882a593Smuzhiyun regulator-name = "PP1800"; 1465*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 1466*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 1467*4882a593Smuzhiyun regulator-always-on; 1468*4882a593Smuzhiyun regulator-boot-on; 1469*4882a593Smuzhiyun maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 1470*4882a593Smuzhiyun maxim,active-fps-power-up-slot = <3>; 1471*4882a593Smuzhiyun maxim,active-fps-power-down-slot = <3>; 1472*4882a593Smuzhiyun }; 1473*4882a593Smuzhiyun 1474*4882a593Smuzhiyun pp1200_avdd: ldo0 { 1475*4882a593Smuzhiyun regulator-name = "PP1200_AVDD"; 1476*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 1477*4882a593Smuzhiyun regulator-max-microvolt = <1200000>; 1478*4882a593Smuzhiyun regulator-enable-ramp-delay = <26>; 1479*4882a593Smuzhiyun regulator-ramp-delay = <100000>; 1480*4882a593Smuzhiyun regulator-boot-on; 1481*4882a593Smuzhiyun maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1482*4882a593Smuzhiyun maxim,active-fps-power-up-slot = <0>; 1483*4882a593Smuzhiyun maxim,active-fps-power-down-slot = <7>; 1484*4882a593Smuzhiyun }; 1485*4882a593Smuzhiyun 1486*4882a593Smuzhiyun pp1200_rcam: ldo1 { 1487*4882a593Smuzhiyun regulator-name = "PP1200_RCAM"; 1488*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 1489*4882a593Smuzhiyun regulator-max-microvolt = <1200000>; 1490*4882a593Smuzhiyun regulator-enable-ramp-delay = <22>; 1491*4882a593Smuzhiyun regulator-ramp-delay = <100000>; 1492*4882a593Smuzhiyun maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1493*4882a593Smuzhiyun maxim,active-fps-power-up-slot = <0>; 1494*4882a593Smuzhiyun maxim,active-fps-power-down-slot = <7>; 1495*4882a593Smuzhiyun }; 1496*4882a593Smuzhiyun 1497*4882a593Smuzhiyun pp_ldo2: ldo2 { 1498*4882a593Smuzhiyun regulator-name = "PP_LDO2"; 1499*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 1500*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 1501*4882a593Smuzhiyun regulator-enable-ramp-delay = <62>; 1502*4882a593Smuzhiyun regulator-ramp-delay = <11000>; 1503*4882a593Smuzhiyun regulator-always-on; 1504*4882a593Smuzhiyun regulator-boot-on; 1505*4882a593Smuzhiyun maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1506*4882a593Smuzhiyun maxim,active-fps-power-up-slot = <0>; 1507*4882a593Smuzhiyun maxim,active-fps-power-down-slot = <7>; 1508*4882a593Smuzhiyun }; 1509*4882a593Smuzhiyun 1510*4882a593Smuzhiyun pp2800l_rcam: ldo3 { 1511*4882a593Smuzhiyun regulator-name = "PP2800L_RCAM"; 1512*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 1513*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 1514*4882a593Smuzhiyun regulator-enable-ramp-delay = <50>; 1515*4882a593Smuzhiyun regulator-ramp-delay = <100000>; 1516*4882a593Smuzhiyun maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1517*4882a593Smuzhiyun maxim,active-fps-power-up-slot = <0>; 1518*4882a593Smuzhiyun maxim,active-fps-power-down-slot = <7>; 1519*4882a593Smuzhiyun }; 1520*4882a593Smuzhiyun 1521*4882a593Smuzhiyun pp100_soc_rtc: ldo4 { 1522*4882a593Smuzhiyun regulator-name = "PP1100_SOC_RTC"; 1523*4882a593Smuzhiyun regulator-min-microvolt = <850000>; 1524*4882a593Smuzhiyun regulator-max-microvolt = <850000>; 1525*4882a593Smuzhiyun regulator-enable-ramp-delay = <22>; 1526*4882a593Smuzhiyun regulator-ramp-delay = <100000>; 1527*4882a593Smuzhiyun regulator-always-on; /* Check this */ 1528*4882a593Smuzhiyun regulator-boot-on; 1529*4882a593Smuzhiyun maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 1530*4882a593Smuzhiyun maxim,active-fps-power-up-slot = <1>; 1531*4882a593Smuzhiyun maxim,active-fps-power-down-slot = <7>; 1532*4882a593Smuzhiyun }; 1533*4882a593Smuzhiyun 1534*4882a593Smuzhiyun pp2800l_fcam: ldo5 { 1535*4882a593Smuzhiyun regulator-name = "PP2800L_FCAM"; 1536*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 1537*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 1538*4882a593Smuzhiyun regulator-enable-ramp-delay = <62>; 1539*4882a593Smuzhiyun regulator-ramp-delay = <100000>; 1540*4882a593Smuzhiyun maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1541*4882a593Smuzhiyun maxim,active-fps-power-up-slot = <0>; 1542*4882a593Smuzhiyun maxim,active-fps-power-down-slot = <7>; 1543*4882a593Smuzhiyun }; 1544*4882a593Smuzhiyun 1545*4882a593Smuzhiyun ldo6 { 1546*4882a593Smuzhiyun /* Unused. */ 1547*4882a593Smuzhiyun regulator-name = "PP_LDO6"; 1548*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 1549*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 1550*4882a593Smuzhiyun regulator-enable-ramp-delay = <36>; 1551*4882a593Smuzhiyun regulator-ramp-delay = <100000>; 1552*4882a593Smuzhiyun maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1553*4882a593Smuzhiyun maxim,active-fps-power-up-slot = <0>; 1554*4882a593Smuzhiyun maxim,active-fps-power-down-slot = <7>; 1555*4882a593Smuzhiyun }; 1556*4882a593Smuzhiyun 1557*4882a593Smuzhiyun pp1050_avdd: ldo7 { 1558*4882a593Smuzhiyun regulator-name = "PP1050_AVDD"; 1559*4882a593Smuzhiyun regulator-min-microvolt = <1050000>; 1560*4882a593Smuzhiyun regulator-max-microvolt = <1050000>; 1561*4882a593Smuzhiyun regulator-enable-ramp-delay = <24>; 1562*4882a593Smuzhiyun regulator-ramp-delay = <100000>; 1563*4882a593Smuzhiyun regulator-always-on; 1564*4882a593Smuzhiyun regulator-boot-on; 1565*4882a593Smuzhiyun maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 1566*4882a593Smuzhiyun maxim,active-fps-power-up-slot = <3>; 1567*4882a593Smuzhiyun maxim,active-fps-power-down-slot = <4>; 1568*4882a593Smuzhiyun }; 1569*4882a593Smuzhiyun 1570*4882a593Smuzhiyun avddio_1v05: ldo8 { 1571*4882a593Smuzhiyun regulator-name = "AVDDIO_1V05"; 1572*4882a593Smuzhiyun regulator-min-microvolt = <1050000>; 1573*4882a593Smuzhiyun regulator-max-microvolt = <1050000>; 1574*4882a593Smuzhiyun regulator-enable-ramp-delay = <22>; 1575*4882a593Smuzhiyun regulator-ramp-delay = <100000>; 1576*4882a593Smuzhiyun regulator-boot-on; 1577*4882a593Smuzhiyun maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1578*4882a593Smuzhiyun maxim,active-fps-power-up-slot = <0>; 1579*4882a593Smuzhiyun maxim,active-fps-power-down-slot = <7>; 1580*4882a593Smuzhiyun }; 1581*4882a593Smuzhiyun }; 1582*4882a593Smuzhiyun }; 1583*4882a593Smuzhiyun }; 1584*4882a593Smuzhiyun 1585*4882a593Smuzhiyun i2c@7000d100 { 1586*4882a593Smuzhiyun status = "okay"; 1587*4882a593Smuzhiyun clock-frequency = <400000>; 1588*4882a593Smuzhiyun 1589*4882a593Smuzhiyun nau8825@1a { 1590*4882a593Smuzhiyun compatible = "nuvoton,nau8825"; 1591*4882a593Smuzhiyun reg = <0x1a>; 1592*4882a593Smuzhiyun interrupt-parent = <&gpio>; 1593*4882a593Smuzhiyun interrupts = <TEGRA_GPIO(E, 6) IRQ_TYPE_LEVEL_LOW>; 1594*4882a593Smuzhiyun clocks = <&tegra_pmc TEGRA_PMC_CLK_OUT_2>; 1595*4882a593Smuzhiyun clock-names = "mclk"; 1596*4882a593Smuzhiyun 1597*4882a593Smuzhiyun nuvoton,jkdet-enable; 1598*4882a593Smuzhiyun nuvoton,jkdet-polarity = <GPIO_ACTIVE_LOW>; 1599*4882a593Smuzhiyun nuvoton,vref-impedance = <2>; 1600*4882a593Smuzhiyun nuvoton,micbias-voltage = <6>; 1601*4882a593Smuzhiyun nuvoton,sar-threshold-num = <4>; 1602*4882a593Smuzhiyun nuvoton,sar-threshold = <0xc 0x1e 0x38 0x60>; 1603*4882a593Smuzhiyun nuvoton,sar-hysteresis = <1>; 1604*4882a593Smuzhiyun nuvoton,sar-voltage = <0>; 1605*4882a593Smuzhiyun nuvoton,sar-compare-time = <0>; 1606*4882a593Smuzhiyun nuvoton,sar-sampling-time = <0>; 1607*4882a593Smuzhiyun nuvoton,short-key-debounce = <2>; 1608*4882a593Smuzhiyun nuvoton,jack-insert-debounce = <7>; 1609*4882a593Smuzhiyun nuvoton,jack-eject-debounce = <7>; 1610*4882a593Smuzhiyun status = "okay"; 1611*4882a593Smuzhiyun }; 1612*4882a593Smuzhiyun 1613*4882a593Smuzhiyun audio-codec@2d { 1614*4882a593Smuzhiyun compatible = "realtek,rt5677"; 1615*4882a593Smuzhiyun reg = <0x2d>; 1616*4882a593Smuzhiyun interrupt-parent = <&gpio>; 1617*4882a593Smuzhiyun interrupts = <TEGRA_GPIO(X, 0) IRQ_TYPE_LEVEL_HIGH>; 1618*4882a593Smuzhiyun realtek,reset-gpio = <&gpio TEGRA_GPIO(BB, 3) GPIO_ACTIVE_LOW>; 1619*4882a593Smuzhiyun gpio-controller; 1620*4882a593Smuzhiyun #gpio-cells = <2>; 1621*4882a593Smuzhiyun status = "okay"; 1622*4882a593Smuzhiyun }; 1623*4882a593Smuzhiyun }; 1624*4882a593Smuzhiyun 1625*4882a593Smuzhiyun pmc@7000e400 { 1626*4882a593Smuzhiyun nvidia,invert-interrupt; 1627*4882a593Smuzhiyun nvidia,suspend-mode = <0>; 1628*4882a593Smuzhiyun nvidia,cpu-pwr-good-time = <0>; 1629*4882a593Smuzhiyun nvidia,cpu-pwr-off-time = <0>; 1630*4882a593Smuzhiyun nvidia,core-pwr-good-time = <12000 6000>; 1631*4882a593Smuzhiyun nvidia,core-pwr-off-time = <39053>; 1632*4882a593Smuzhiyun nvidia,core-power-req-active-high; 1633*4882a593Smuzhiyun nvidia,sys-clock-req-active-high; 1634*4882a593Smuzhiyun status = "okay"; 1635*4882a593Smuzhiyun }; 1636*4882a593Smuzhiyun 1637*4882a593Smuzhiyun usb@70090000 { 1638*4882a593Smuzhiyun phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, 1639*4882a593Smuzhiyun <&{/padctl@7009f000/pads/pcie/lanes/pcie-6}>; 1640*4882a593Smuzhiyun phy-names = "usb2-0", "usb3-0"; 1641*4882a593Smuzhiyun 1642*4882a593Smuzhiyun dvddio-pex-supply = <&avddio_1v05>; 1643*4882a593Smuzhiyun hvddio-pex-supply = <&pp1800>; 1644*4882a593Smuzhiyun avdd-usb-supply = <&pp3300>; 1645*4882a593Smuzhiyun avdd-pll-utmip-supply = <&pp1800>; 1646*4882a593Smuzhiyun avdd-pll-uerefe-supply = <&pp1050_avdd>; 1647*4882a593Smuzhiyun dvdd-pex-pll-supply = <&avddio_1v05>; 1648*4882a593Smuzhiyun hvdd-pex-pll-e-supply = <&pp1800>; 1649*4882a593Smuzhiyun 1650*4882a593Smuzhiyun status = "okay"; 1651*4882a593Smuzhiyun }; 1652*4882a593Smuzhiyun 1653*4882a593Smuzhiyun padctl@7009f000 { 1654*4882a593Smuzhiyun status = "okay"; 1655*4882a593Smuzhiyun 1656*4882a593Smuzhiyun avdd-pll-utmip-supply = <&pp1800>; 1657*4882a593Smuzhiyun avdd-pll-uerefe-supply = <&pp1050_avdd>; 1658*4882a593Smuzhiyun dvdd-pex-pll-supply = <&avddio_1v05>; 1659*4882a593Smuzhiyun hvdd-pex-pll-e-supply = <&pp1800>; 1660*4882a593Smuzhiyun 1661*4882a593Smuzhiyun pads { 1662*4882a593Smuzhiyun usb2 { 1663*4882a593Smuzhiyun status = "okay"; 1664*4882a593Smuzhiyun 1665*4882a593Smuzhiyun lanes { 1666*4882a593Smuzhiyun usb2-0 { 1667*4882a593Smuzhiyun nvidia,function = "xusb"; 1668*4882a593Smuzhiyun status = "okay"; 1669*4882a593Smuzhiyun }; 1670*4882a593Smuzhiyun }; 1671*4882a593Smuzhiyun }; 1672*4882a593Smuzhiyun 1673*4882a593Smuzhiyun pcie { 1674*4882a593Smuzhiyun status = "okay"; 1675*4882a593Smuzhiyun 1676*4882a593Smuzhiyun lanes { 1677*4882a593Smuzhiyun pcie-6 { 1678*4882a593Smuzhiyun nvidia,function = "usb3-ss"; 1679*4882a593Smuzhiyun status = "okay"; 1680*4882a593Smuzhiyun }; 1681*4882a593Smuzhiyun }; 1682*4882a593Smuzhiyun }; 1683*4882a593Smuzhiyun }; 1684*4882a593Smuzhiyun 1685*4882a593Smuzhiyun ports { 1686*4882a593Smuzhiyun usb2-0 { 1687*4882a593Smuzhiyun status = "okay"; 1688*4882a593Smuzhiyun vbus-supply = <&usbc_vbus>; 1689*4882a593Smuzhiyun mode = "otg"; 1690*4882a593Smuzhiyun }; 1691*4882a593Smuzhiyun 1692*4882a593Smuzhiyun usb3-0 { 1693*4882a593Smuzhiyun nvidia,usb2-companion = <0>; 1694*4882a593Smuzhiyun status = "okay"; 1695*4882a593Smuzhiyun }; 1696*4882a593Smuzhiyun }; 1697*4882a593Smuzhiyun }; 1698*4882a593Smuzhiyun 1699*4882a593Smuzhiyun mmc@700b0600 { 1700*4882a593Smuzhiyun bus-width = <8>; 1701*4882a593Smuzhiyun non-removable; 1702*4882a593Smuzhiyun status = "okay"; 1703*4882a593Smuzhiyun }; 1704*4882a593Smuzhiyun 1705*4882a593Smuzhiyun clock@70110000 { 1706*4882a593Smuzhiyun status = "okay"; 1707*4882a593Smuzhiyun nvidia,cf = <6>; 1708*4882a593Smuzhiyun nvidia,ci = <0>; 1709*4882a593Smuzhiyun nvidia,cg = <2>; 1710*4882a593Smuzhiyun nvidia,droop-ctrl = <0x00000f00>; 1711*4882a593Smuzhiyun nvidia,force-mode = <1>; 1712*4882a593Smuzhiyun nvidia,i2c-fs-rate = <400000>; 1713*4882a593Smuzhiyun nvidia,sample-rate = <12500>; 1714*4882a593Smuzhiyun vdd-cpu-supply = <&max77621_cpu>; 1715*4882a593Smuzhiyun }; 1716*4882a593Smuzhiyun 1717*4882a593Smuzhiyun aconnect@702c0000 { 1718*4882a593Smuzhiyun status = "okay"; 1719*4882a593Smuzhiyun 1720*4882a593Smuzhiyun dma@702e2000 { 1721*4882a593Smuzhiyun status = "okay"; 1722*4882a593Smuzhiyun }; 1723*4882a593Smuzhiyun 1724*4882a593Smuzhiyun interrupt-controller@702f9000 { 1725*4882a593Smuzhiyun status = "okay"; 1726*4882a593Smuzhiyun }; 1727*4882a593Smuzhiyun }; 1728*4882a593Smuzhiyun 1729*4882a593Smuzhiyun clk32k_in: clock@0 { 1730*4882a593Smuzhiyun compatible = "fixed-clock"; 1731*4882a593Smuzhiyun clock-frequency = <32768>; 1732*4882a593Smuzhiyun #clock-cells = <0>; 1733*4882a593Smuzhiyun }; 1734*4882a593Smuzhiyun 1735*4882a593Smuzhiyun cpus { 1736*4882a593Smuzhiyun cpu@0 { 1737*4882a593Smuzhiyun enable-method = "psci"; 1738*4882a593Smuzhiyun }; 1739*4882a593Smuzhiyun 1740*4882a593Smuzhiyun cpu@1 { 1741*4882a593Smuzhiyun enable-method = "psci"; 1742*4882a593Smuzhiyun }; 1743*4882a593Smuzhiyun 1744*4882a593Smuzhiyun cpu@2 { 1745*4882a593Smuzhiyun enable-method = "psci"; 1746*4882a593Smuzhiyun }; 1747*4882a593Smuzhiyun 1748*4882a593Smuzhiyun cpu@3 { 1749*4882a593Smuzhiyun enable-method = "psci"; 1750*4882a593Smuzhiyun }; 1751*4882a593Smuzhiyun 1752*4882a593Smuzhiyun idle-states { 1753*4882a593Smuzhiyun cpu-sleep { 1754*4882a593Smuzhiyun arm,psci-suspend-param = <0x00010007>; 1755*4882a593Smuzhiyun status = "okay"; 1756*4882a593Smuzhiyun }; 1757*4882a593Smuzhiyun }; 1758*4882a593Smuzhiyun }; 1759*4882a593Smuzhiyun 1760*4882a593Smuzhiyun gpio-keys { 1761*4882a593Smuzhiyun compatible = "gpio-keys"; 1762*4882a593Smuzhiyun 1763*4882a593Smuzhiyun power { 1764*4882a593Smuzhiyun label = "Power"; 1765*4882a593Smuzhiyun gpios = <&gpio TEGRA_GPIO(X, 5) GPIO_ACTIVE_LOW>; 1766*4882a593Smuzhiyun linux,code = <KEY_POWER>; 1767*4882a593Smuzhiyun debounce-interval = <30>; 1768*4882a593Smuzhiyun wakeup-source; 1769*4882a593Smuzhiyun }; 1770*4882a593Smuzhiyun 1771*4882a593Smuzhiyun lid { 1772*4882a593Smuzhiyun label = "Lid"; 1773*4882a593Smuzhiyun gpios = <&gpio TEGRA_GPIO(B, 4) GPIO_ACTIVE_LOW>; 1774*4882a593Smuzhiyun linux,input-type = <EV_SW>; 1775*4882a593Smuzhiyun linux,code = <SW_LID>; 1776*4882a593Smuzhiyun wakeup-source; 1777*4882a593Smuzhiyun }; 1778*4882a593Smuzhiyun 1779*4882a593Smuzhiyun tablet_mode { 1780*4882a593Smuzhiyun label = "Tablet Mode"; 1781*4882a593Smuzhiyun gpios = <&gpio TEGRA_GPIO(Z, 2) GPIO_ACTIVE_HIGH>; 1782*4882a593Smuzhiyun linux,input-type = <EV_SW>; 1783*4882a593Smuzhiyun linux,code = <SW_TABLET_MODE>; 1784*4882a593Smuzhiyun wakeup-source; 1785*4882a593Smuzhiyun }; 1786*4882a593Smuzhiyun 1787*4882a593Smuzhiyun volume_down { 1788*4882a593Smuzhiyun label = "Volume Down"; 1789*4882a593Smuzhiyun gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>; 1790*4882a593Smuzhiyun linux,code = <KEY_VOLUMEDOWN>; 1791*4882a593Smuzhiyun }; 1792*4882a593Smuzhiyun 1793*4882a593Smuzhiyun volume_up { 1794*4882a593Smuzhiyun label = "Volume Up"; 1795*4882a593Smuzhiyun gpios = <&gpio TEGRA_GPIO(M, 4) GPIO_ACTIVE_LOW>; 1796*4882a593Smuzhiyun linux,code = <KEY_VOLUMEUP>; 1797*4882a593Smuzhiyun }; 1798*4882a593Smuzhiyun }; 1799*4882a593Smuzhiyun 1800*4882a593Smuzhiyun max98357a { 1801*4882a593Smuzhiyun compatible = "maxim,max98357a"; 1802*4882a593Smuzhiyun status = "okay"; 1803*4882a593Smuzhiyun }; 1804*4882a593Smuzhiyun 1805*4882a593Smuzhiyun psci { 1806*4882a593Smuzhiyun compatible = "arm,psci-1.0"; 1807*4882a593Smuzhiyun method = "smc"; 1808*4882a593Smuzhiyun }; 1809*4882a593Smuzhiyun 1810*4882a593Smuzhiyun ppvar_sys: regulator@0 { 1811*4882a593Smuzhiyun compatible = "regulator-fixed"; 1812*4882a593Smuzhiyun regulator-name = "PPVAR_SYS"; 1813*4882a593Smuzhiyun regulator-min-microvolt = <4400000>; 1814*4882a593Smuzhiyun regulator-max-microvolt = <4400000>; 1815*4882a593Smuzhiyun regulator-always-on; 1816*4882a593Smuzhiyun }; 1817*4882a593Smuzhiyun 1818*4882a593Smuzhiyun pplcd_vdd: regulator@1 { 1819*4882a593Smuzhiyun compatible = "regulator-fixed"; 1820*4882a593Smuzhiyun regulator-name = "PPLCD_VDD"; 1821*4882a593Smuzhiyun regulator-min-microvolt = <4400000>; 1822*4882a593Smuzhiyun regulator-max-microvolt = <4400000>; 1823*4882a593Smuzhiyun gpio = <&gpio TEGRA_GPIO(V, 4) 0>; 1824*4882a593Smuzhiyun enable-active-high; 1825*4882a593Smuzhiyun regulator-boot-on; 1826*4882a593Smuzhiyun }; 1827*4882a593Smuzhiyun 1828*4882a593Smuzhiyun pp3000_always: regulator@2 { 1829*4882a593Smuzhiyun compatible = "regulator-fixed"; 1830*4882a593Smuzhiyun regulator-name = "PP3000_ALWAYS"; 1831*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 1832*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 1833*4882a593Smuzhiyun regulator-always-on; 1834*4882a593Smuzhiyun }; 1835*4882a593Smuzhiyun 1836*4882a593Smuzhiyun pp3300: regulator@3 { 1837*4882a593Smuzhiyun compatible = "regulator-fixed"; 1838*4882a593Smuzhiyun regulator-name = "PP3300"; 1839*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 1840*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 1841*4882a593Smuzhiyun regulator-boot-on; 1842*4882a593Smuzhiyun regulator-always-on; 1843*4882a593Smuzhiyun enable-active-high; 1844*4882a593Smuzhiyun }; 1845*4882a593Smuzhiyun 1846*4882a593Smuzhiyun pp5000: regulator@4 { 1847*4882a593Smuzhiyun compatible = "regulator-fixed"; 1848*4882a593Smuzhiyun regulator-name = "PP5000"; 1849*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 1850*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 1851*4882a593Smuzhiyun regulator-always-on; 1852*4882a593Smuzhiyun }; 1853*4882a593Smuzhiyun 1854*4882a593Smuzhiyun pp1800_lcdio: regulator@5 { 1855*4882a593Smuzhiyun compatible = "regulator-fixed"; 1856*4882a593Smuzhiyun regulator-name = "PP1800_LCDIO"; 1857*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 1858*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 1859*4882a593Smuzhiyun gpio = <&gpio TEGRA_GPIO(V, 3) 0>; 1860*4882a593Smuzhiyun enable-active-high; 1861*4882a593Smuzhiyun regulator-boot-on; 1862*4882a593Smuzhiyun }; 1863*4882a593Smuzhiyun 1864*4882a593Smuzhiyun pp1800_cam: regulator@6 { 1865*4882a593Smuzhiyun compatible = "regulator-fixed"; 1866*4882a593Smuzhiyun regulator-name = "PP1800_CAM"; 1867*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 1868*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 1869*4882a593Smuzhiyun gpio = <&gpio TEGRA_GPIO(K, 3) 0>; 1870*4882a593Smuzhiyun enable-active-high; 1871*4882a593Smuzhiyun }; 1872*4882a593Smuzhiyun 1873*4882a593Smuzhiyun usbc_vbus: regulator@7 { 1874*4882a593Smuzhiyun compatible = "regulator-fixed"; 1875*4882a593Smuzhiyun regulator-name = "USBC_VBUS"; 1876*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 1877*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 1878*4882a593Smuzhiyun }; 1879*4882a593Smuzhiyun}; 1880