1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun#include "tegra194.dtsi" 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun#include <dt-bindings/mfd/max77620.h> 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/ { 7*4882a593Smuzhiyun model = "NVIDIA Jetson Xavier NX"; 8*4882a593Smuzhiyun compatible = "nvidia,p3668-0000", "nvidia,tegra194"; 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun aliases { 11*4882a593Smuzhiyun ethernet0 = "/bus@0/ethernet@2490000"; 12*4882a593Smuzhiyun i2c0 = "/bpmp/i2c"; 13*4882a593Smuzhiyun i2c1 = "/bus@0/i2c@3160000"; 14*4882a593Smuzhiyun i2c2 = "/bus@0/i2c@c240000"; 15*4882a593Smuzhiyun i2c3 = "/bus@0/i2c@3180000"; 16*4882a593Smuzhiyun i2c4 = "/bus@0/i2c@3190000"; 17*4882a593Smuzhiyun i2c5 = "/bus@0/i2c@31c0000"; 18*4882a593Smuzhiyun i2c6 = "/bus@0/i2c@c250000"; 19*4882a593Smuzhiyun i2c7 = "/bus@0/i2c@31e0000"; 20*4882a593Smuzhiyun mmc0 = "/bus@0/mmc@3460000"; 21*4882a593Smuzhiyun rtc0 = "/bpmp/i2c/pmic@3c"; 22*4882a593Smuzhiyun rtc1 = "/bus@0/rtc@c2a0000"; 23*4882a593Smuzhiyun serial0 = &tcu; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun chosen { 27*4882a593Smuzhiyun bootargs = "console=ttyS0,115200n8"; 28*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun bus@0 { 32*4882a593Smuzhiyun ethernet@2490000 { 33*4882a593Smuzhiyun status = "okay"; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(R, 1) GPIO_ACTIVE_LOW>; 36*4882a593Smuzhiyun phy-handle = <&phy>; 37*4882a593Smuzhiyun phy-mode = "rgmii-id"; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun mdio { 40*4882a593Smuzhiyun #address-cells = <1>; 41*4882a593Smuzhiyun #size-cells = <0>; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun phy: phy@0 { 44*4882a593Smuzhiyun compatible = "ethernet-phy-ieee802.3-c22"; 45*4882a593Smuzhiyun reg = <0x0>; 46*4882a593Smuzhiyun interrupt-parent = <&gpio>; 47*4882a593Smuzhiyun interrupts = <TEGRA194_MAIN_GPIO(G, 4) IRQ_TYPE_LEVEL_LOW>; 48*4882a593Smuzhiyun #phy-cells = <0>; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun memory-controller@2c00000 { 54*4882a593Smuzhiyun status = "okay"; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun serial@3100000 { 58*4882a593Smuzhiyun status = "okay"; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun i2c@3160000 { 62*4882a593Smuzhiyun status = "okay"; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun eeprom@50 { 65*4882a593Smuzhiyun compatible = "atmel,24c02"; 66*4882a593Smuzhiyun reg = <0x50>; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun label = "module"; 69*4882a593Smuzhiyun vcc-supply = <&vdd_1v8ls>; 70*4882a593Smuzhiyun address-width = <8>; 71*4882a593Smuzhiyun pagesize = <8>; 72*4882a593Smuzhiyun size = <256>; 73*4882a593Smuzhiyun read-only; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun /* SDMMC1 (SD/MMC) */ 78*4882a593Smuzhiyun mmc@3400000 { 79*4882a593Smuzhiyun status = "okay"; 80*4882a593Smuzhiyun bus-width = <4>; 81*4882a593Smuzhiyun cd-gpios = <&gpio TEGRA194_MAIN_GPIO(G, 7) GPIO_ACTIVE_LOW>; 82*4882a593Smuzhiyun disable-wp; 83*4882a593Smuzhiyun vmmc-supply = <&vdd_3v3_sd>; 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun padctl@3520000 { 87*4882a593Smuzhiyun avdd-usb-supply = <&vdd_usb_3v3>; 88*4882a593Smuzhiyun vclamp-usb-supply = <&vdd_1v8ao>; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun ports { 91*4882a593Smuzhiyun usb2-1 { 92*4882a593Smuzhiyun vbus-supply = <&vdd_5v0_sys>; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun usb2-3 { 96*4882a593Smuzhiyun vbus-supply = <&vdd_5v0_sys>; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun usb3-0 { 100*4882a593Smuzhiyun vbus-supply = <&vdd_5v0_sys>; 101*4882a593Smuzhiyun }; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun usb3-3 { 104*4882a593Smuzhiyun vbus-supply = <&vdd_5v0_sys>; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun }; 107*4882a593Smuzhiyun }; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun rtc@c2a0000 { 110*4882a593Smuzhiyun status = "okay"; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun pmc@c360000 { 114*4882a593Smuzhiyun nvidia,invert-interrupt; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun }; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun bpmp { 119*4882a593Smuzhiyun i2c { 120*4882a593Smuzhiyun status = "okay"; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun pmic: pmic@3c { 123*4882a593Smuzhiyun compatible = "maxim,max20024"; 124*4882a593Smuzhiyun reg = <0x3c>; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun interrupt-parent = <&pmc>; 127*4882a593Smuzhiyun interrupts = <24 IRQ_TYPE_LEVEL_LOW>; 128*4882a593Smuzhiyun #interrupt-cells = <2>; 129*4882a593Smuzhiyun interrupt-controller; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun #gpio-cells = <2>; 132*4882a593Smuzhiyun gpio-controller; 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun pinctrl-names = "default"; 135*4882a593Smuzhiyun pinctrl-0 = <&max20024_default>; 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun max20024_default: pinmux { 138*4882a593Smuzhiyun gpio0 { 139*4882a593Smuzhiyun pins = "gpio0"; 140*4882a593Smuzhiyun function = "gpio"; 141*4882a593Smuzhiyun }; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun gpio1 { 144*4882a593Smuzhiyun pins = "gpio1"; 145*4882a593Smuzhiyun function = "fps-out"; 146*4882a593Smuzhiyun maxim,active-fps-source = <MAX77620_FPS_SRC_DEF>; 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun gpio2 { 150*4882a593Smuzhiyun pins = "gpio2"; 151*4882a593Smuzhiyun function = "fps-out"; 152*4882a593Smuzhiyun maxim,active-fps-source = <MAX77620_FPS_SRC_DEF>; 153*4882a593Smuzhiyun }; 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun gpio3 { 156*4882a593Smuzhiyun pins = "gpio3"; 157*4882a593Smuzhiyun function = "fps-out"; 158*4882a593Smuzhiyun maxim,active-fps-source = <MAX77620_FPS_SRC_DEF>; 159*4882a593Smuzhiyun }; 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun gpio4 { 162*4882a593Smuzhiyun pins = "gpio4"; 163*4882a593Smuzhiyun function = "32k-out1"; 164*4882a593Smuzhiyun drive-push-pull = <1>; 165*4882a593Smuzhiyun }; 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun gpio6 { 168*4882a593Smuzhiyun pins = "gpio6"; 169*4882a593Smuzhiyun function = "gpio"; 170*4882a593Smuzhiyun drive-push-pull = <1>; 171*4882a593Smuzhiyun }; 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun gpio7 { 174*4882a593Smuzhiyun pins = "gpio7"; 175*4882a593Smuzhiyun function = "gpio"; 176*4882a593Smuzhiyun drive-push-pull = <0>; 177*4882a593Smuzhiyun }; 178*4882a593Smuzhiyun }; 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun fps { 181*4882a593Smuzhiyun fps0 { 182*4882a593Smuzhiyun maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 183*4882a593Smuzhiyun maxim,shutdown-fps-time-period-us = <640>; 184*4882a593Smuzhiyun }; 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun fps1 { 187*4882a593Smuzhiyun maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>; 188*4882a593Smuzhiyun maxim,shutdown-fps-time-period-us = <640>; 189*4882a593Smuzhiyun maxim,device-state-on-disabled-event = <MAX77620_FPS_INACTIVE_STATE_SLEEP>; 190*4882a593Smuzhiyun }; 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun fps2 { 193*4882a593Smuzhiyun maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 194*4882a593Smuzhiyun maxim,shutdown-fps-time-period-us = <640>; 195*4882a593Smuzhiyun }; 196*4882a593Smuzhiyun }; 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun regulators { 199*4882a593Smuzhiyun in-sd0-supply = <&vdd_5v0_sys>; 200*4882a593Smuzhiyun in-sd1-supply = <&vdd_5v0_sys>; 201*4882a593Smuzhiyun in-sd2-supply = <&vdd_5v0_sys>; 202*4882a593Smuzhiyun in-sd3-supply = <&vdd_5v0_sys>; 203*4882a593Smuzhiyun in-sd4-supply = <&vdd_5v0_sys>; 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun in-ldo0-1-supply = <&vdd_5v0_sys>; 206*4882a593Smuzhiyun in-ldo2-supply = <&vdd_5v0_sys>; 207*4882a593Smuzhiyun in-ldo3-5-supply = <&vdd_5v0_sys>; 208*4882a593Smuzhiyun in-ldo4-6-supply = <&vdd_5v0_sys>; 209*4882a593Smuzhiyun in-ldo7-8-supply = <&vdd_1v8ls>; 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun vdd_1v0: sd0 { 212*4882a593Smuzhiyun regulator-name = "VDDIO_SYS_1V0"; 213*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 214*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 215*4882a593Smuzhiyun regulator-always-on; 216*4882a593Smuzhiyun regulator-boot-on; 217*4882a593Smuzhiyun }; 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun vdd_1v8hs: sd1 { 220*4882a593Smuzhiyun regulator-name = "VDDIO_SYS_1V8HS"; 221*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 222*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 223*4882a593Smuzhiyun regulator-always-on; 224*4882a593Smuzhiyun regulator-boot-on; 225*4882a593Smuzhiyun }; 226*4882a593Smuzhiyun 227*4882a593Smuzhiyun vdd_1v8ls: sd2 { 228*4882a593Smuzhiyun regulator-name = "VDDIO_SYS_1V8LS"; 229*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 230*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 231*4882a593Smuzhiyun regulator-always-on; 232*4882a593Smuzhiyun regulator-boot-on; 233*4882a593Smuzhiyun }; 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun vdd_1v8ao: sd3 { 236*4882a593Smuzhiyun regulator-name = "VDDIO_AO_1V8"; 237*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 238*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 239*4882a593Smuzhiyun regulator-always-on; 240*4882a593Smuzhiyun regulator-boot-on; 241*4882a593Smuzhiyun }; 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun sd4 { 244*4882a593Smuzhiyun regulator-name = "VDD_DDR_1V1"; 245*4882a593Smuzhiyun regulator-min-microvolt = <1100000>; 246*4882a593Smuzhiyun regulator-max-microvolt = <1100000>; 247*4882a593Smuzhiyun regulator-always-on; 248*4882a593Smuzhiyun regulator-boot-on; 249*4882a593Smuzhiyun }; 250*4882a593Smuzhiyun 251*4882a593Smuzhiyun ldo0 { 252*4882a593Smuzhiyun regulator-name = "VDD_RTC"; 253*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 254*4882a593Smuzhiyun regulator-max-microvolt = <800000>; 255*4882a593Smuzhiyun regulator-always-on; 256*4882a593Smuzhiyun regulator-boot-on; 257*4882a593Smuzhiyun }; 258*4882a593Smuzhiyun 259*4882a593Smuzhiyun ldo2 { 260*4882a593Smuzhiyun regulator-name = "VDDIO_AO_3V3"; 261*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 262*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 263*4882a593Smuzhiyun regulator-always-on; 264*4882a593Smuzhiyun regulator-boot-on; 265*4882a593Smuzhiyun }; 266*4882a593Smuzhiyun 267*4882a593Smuzhiyun ldo3 { 268*4882a593Smuzhiyun regulator-name = "VDD_EMMC_3V3"; 269*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 270*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 271*4882a593Smuzhiyun }; 272*4882a593Smuzhiyun 273*4882a593Smuzhiyun vdd_usb_3v3: ldo5 { 274*4882a593Smuzhiyun regulator-name = "VDD_USB_3V3"; 275*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 276*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 277*4882a593Smuzhiyun regulator-always-on; 278*4882a593Smuzhiyun regulator-boot-on; 279*4882a593Smuzhiyun }; 280*4882a593Smuzhiyun 281*4882a593Smuzhiyun ldo6 { 282*4882a593Smuzhiyun regulator-name = "VDD_SDIO_3V3"; 283*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 284*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 285*4882a593Smuzhiyun }; 286*4882a593Smuzhiyun 287*4882a593Smuzhiyun ldo7 { 288*4882a593Smuzhiyun regulator-name = "AVDD_CSI_1V2"; 289*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 290*4882a593Smuzhiyun regulator-max-microvolt = <1200000>; 291*4882a593Smuzhiyun }; 292*4882a593Smuzhiyun }; 293*4882a593Smuzhiyun }; 294*4882a593Smuzhiyun }; 295*4882a593Smuzhiyun }; 296*4882a593Smuzhiyun 297*4882a593Smuzhiyun vdd_3v3_sd: regulator@0 { 298*4882a593Smuzhiyun compatible = "regulator-fixed"; 299*4882a593Smuzhiyun regulator-name = "VDD_3V3_SD"; 300*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 301*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 302*4882a593Smuzhiyun gpio = <&gpio TEGRA194_MAIN_GPIO(G, 2) GPIO_ACTIVE_HIGH>; 303*4882a593Smuzhiyun regulator-boot-on; 304*4882a593Smuzhiyun enable-active-high; 305*4882a593Smuzhiyun }; 306*4882a593Smuzhiyun}; 307