1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device tree for the uDPU board. 4*4882a593Smuzhiyun * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3) 5*4882a593Smuzhiyun * Copyright (C) 2016 Marvell 6*4882a593Smuzhiyun * Copyright (C) 2019 Methode Electronics 7*4882a593Smuzhiyun * Copyright (C) 2019 Telus 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * Vladimir Vid <vladimir.vid@sartura.hr> 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/dts-v1/; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 15*4882a593Smuzhiyun#include "armada-372x.dtsi" 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun/ { 18*4882a593Smuzhiyun model = "Methode uDPU Board"; 19*4882a593Smuzhiyun compatible = "methode,udpu", "marvell,armada3720"; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun chosen { 22*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun memory@0 { 26*4882a593Smuzhiyun device_type = "memory"; 27*4882a593Smuzhiyun reg = <0x00000000 0x00000000 0x00000000 0x20000000>; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun leds { 31*4882a593Smuzhiyun pinctrl-names = "default"; 32*4882a593Smuzhiyun compatible = "gpio-leds"; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun power1 { 35*4882a593Smuzhiyun label = "udpu:green:power"; 36*4882a593Smuzhiyun gpios = <&gpionb 11 GPIO_ACTIVE_LOW>; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun power2 { 40*4882a593Smuzhiyun label = "udpu:red:power"; 41*4882a593Smuzhiyun gpios = <&gpionb 12 GPIO_ACTIVE_LOW>; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun network1 { 45*4882a593Smuzhiyun label = "udpu:green:network"; 46*4882a593Smuzhiyun gpios = <&gpionb 13 GPIO_ACTIVE_LOW>; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun network2 { 50*4882a593Smuzhiyun label = "udpu:red:network"; 51*4882a593Smuzhiyun gpios = <&gpionb 14 GPIO_ACTIVE_LOW>; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun alarm1 { 55*4882a593Smuzhiyun label = "udpu:green:alarm"; 56*4882a593Smuzhiyun gpios = <&gpionb 15 GPIO_ACTIVE_LOW>; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun alarm2 { 60*4882a593Smuzhiyun label = "udpu:red:alarm"; 61*4882a593Smuzhiyun gpios = <&gpionb 16 GPIO_ACTIVE_LOW>; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun sfp_eth0: sfp-eth0 { 66*4882a593Smuzhiyun compatible = "sff,sfp"; 67*4882a593Smuzhiyun i2c-bus = <&i2c0>; 68*4882a593Smuzhiyun los-gpio = <&gpiosb 2 GPIO_ACTIVE_HIGH>; 69*4882a593Smuzhiyun mod-def0-gpio = <&gpiosb 3 GPIO_ACTIVE_LOW>; 70*4882a593Smuzhiyun tx-disable-gpio = <&gpiosb 4 GPIO_ACTIVE_HIGH>; 71*4882a593Smuzhiyun tx-fault-gpio = <&gpiosb 5 GPIO_ACTIVE_HIGH>; 72*4882a593Smuzhiyun maximum-power-milliwatt = <3000>; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun sfp_eth1: sfp-eth1 { 76*4882a593Smuzhiyun compatible = "sff,sfp"; 77*4882a593Smuzhiyun i2c-bus = <&i2c1>; 78*4882a593Smuzhiyun los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>; 79*4882a593Smuzhiyun mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>; 80*4882a593Smuzhiyun tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>; 81*4882a593Smuzhiyun tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>; 82*4882a593Smuzhiyun maximum-power-milliwatt = <3000>; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun}; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun&sdhci0 { 87*4882a593Smuzhiyun status = "okay"; 88*4882a593Smuzhiyun bus-width = <8>; 89*4882a593Smuzhiyun mmc-ddr-1_8v; 90*4882a593Smuzhiyun mmc-hs400-1_8v; 91*4882a593Smuzhiyun marvell,pad-type = "fixed-1-8v"; 92*4882a593Smuzhiyun non-removable; 93*4882a593Smuzhiyun no-sd; 94*4882a593Smuzhiyun no-sdio; 95*4882a593Smuzhiyun}; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun&spi0 { 98*4882a593Smuzhiyun status = "okay"; 99*4882a593Smuzhiyun pinctrl-names = "default"; 100*4882a593Smuzhiyun pinctrl-0 = <&spi_quad_pins>; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun m25p80@0 { 103*4882a593Smuzhiyun compatible = "jedec,spi-nor"; 104*4882a593Smuzhiyun reg = <0>; 105*4882a593Smuzhiyun spi-max-frequency = <54000000>; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun partitions { 108*4882a593Smuzhiyun compatible = "fixed-partitions"; 109*4882a593Smuzhiyun #address-cells = <1>; 110*4882a593Smuzhiyun #size-cells = <1>; 111*4882a593Smuzhiyun /* only bootloader is located on the SPI */ 112*4882a593Smuzhiyun partition@0 { 113*4882a593Smuzhiyun label = "uboot"; 114*4882a593Smuzhiyun reg = <0 0x400000>; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun }; 117*4882a593Smuzhiyun }; 118*4882a593Smuzhiyun}; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun&pinctrl_nb { 121*4882a593Smuzhiyun i2c1_recovery_pins: i2c1-recovery-pins { 122*4882a593Smuzhiyun groups = "i2c1"; 123*4882a593Smuzhiyun function = "gpio"; 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun i2c2_recovery_pins: i2c2-recovery-pins { 127*4882a593Smuzhiyun groups = "i2c2"; 128*4882a593Smuzhiyun function = "gpio"; 129*4882a593Smuzhiyun }; 130*4882a593Smuzhiyun}; 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun&i2c0 { 133*4882a593Smuzhiyun status = "okay"; 134*4882a593Smuzhiyun pinctrl-names = "default", "recovery"; 135*4882a593Smuzhiyun pinctrl-0 = <&i2c1_pins>; 136*4882a593Smuzhiyun pinctrl-1 = <&i2c1_recovery_pins>; 137*4882a593Smuzhiyun /delete-property/mrvl,i2c-fast-mode; 138*4882a593Smuzhiyun scl-gpios = <&gpionb 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 139*4882a593Smuzhiyun sda-gpios = <&gpionb 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 140*4882a593Smuzhiyun}; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun&i2c1 { 143*4882a593Smuzhiyun status = "okay"; 144*4882a593Smuzhiyun pinctrl-names = "default", "recovery"; 145*4882a593Smuzhiyun pinctrl-0 = <&i2c2_pins>; 146*4882a593Smuzhiyun pinctrl-1 = <&i2c2_recovery_pins>; 147*4882a593Smuzhiyun /delete-property/mrvl,i2c-fast-mode; 148*4882a593Smuzhiyun scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 149*4882a593Smuzhiyun sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun lm75@48 { 152*4882a593Smuzhiyun status = "okay"; 153*4882a593Smuzhiyun compatible = "lm75"; 154*4882a593Smuzhiyun reg = <0x48>; 155*4882a593Smuzhiyun }; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun lm75@49 { 158*4882a593Smuzhiyun status = "okay"; 159*4882a593Smuzhiyun compatible = "lm75"; 160*4882a593Smuzhiyun reg = <0x49>; 161*4882a593Smuzhiyun }; 162*4882a593Smuzhiyun}; 163*4882a593Smuzhiyun 164*4882a593Smuzhiyunð0 { 165*4882a593Smuzhiyun phy-mode = "sgmii"; 166*4882a593Smuzhiyun status = "okay"; 167*4882a593Smuzhiyun managed = "in-band-status"; 168*4882a593Smuzhiyun phys = <&comphy1 0>; 169*4882a593Smuzhiyun sfp = <&sfp_eth0>; 170*4882a593Smuzhiyun}; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyunð1 { 173*4882a593Smuzhiyun phy-mode = "sgmii"; 174*4882a593Smuzhiyun status = "okay"; 175*4882a593Smuzhiyun managed = "in-band-status"; 176*4882a593Smuzhiyun phys = <&comphy0 1>; 177*4882a593Smuzhiyun sfp = <&sfp_eth1>; 178*4882a593Smuzhiyun}; 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun&usb3 { 181*4882a593Smuzhiyun status = "okay"; 182*4882a593Smuzhiyun phys = <&usb2_utmi_otg_phy>; 183*4882a593Smuzhiyun phy-names = "usb2-utmi-otg-phy"; 184*4882a593Smuzhiyun}; 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun&uart0 { 187*4882a593Smuzhiyun status = "okay"; 188*4882a593Smuzhiyun}; 189