1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device Tree file for Freescale LS1012A RDB Board. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright 2016 Freescale Semiconductor, Inc. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun/dts-v1/; 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun#include "fsl-ls1012a.dtsi" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun model = "LS1012A RDB Board"; 14*4882a593Smuzhiyun compatible = "fsl,ls1012a-rdb", "fsl,ls1012a"; 15*4882a593Smuzhiyun}; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun&duart0 { 18*4882a593Smuzhiyun status = "okay"; 19*4882a593Smuzhiyun}; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun&esdhc0 { 22*4882a593Smuzhiyun sd-uhs-sdr104; 23*4882a593Smuzhiyun sd-uhs-sdr50; 24*4882a593Smuzhiyun sd-uhs-sdr25; 25*4882a593Smuzhiyun sd-uhs-sdr12; 26*4882a593Smuzhiyun status = "okay"; 27*4882a593Smuzhiyun}; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun&esdhc1 { 30*4882a593Smuzhiyun mmc-hs200-1_8v; 31*4882a593Smuzhiyun status = "okay"; 32*4882a593Smuzhiyun}; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun&i2c0 { 35*4882a593Smuzhiyun status = "okay"; 36*4882a593Smuzhiyun}; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun&qspi { 39*4882a593Smuzhiyun status = "okay"; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun s25fs512s0: flash@0 { 42*4882a593Smuzhiyun compatible = "jedec,spi-nor"; 43*4882a593Smuzhiyun #address-cells = <1>; 44*4882a593Smuzhiyun #size-cells = <1>; 45*4882a593Smuzhiyun spi-max-frequency = <50000000>; 46*4882a593Smuzhiyun m25p,fast-read; 47*4882a593Smuzhiyun reg = <0>; 48*4882a593Smuzhiyun spi-rx-bus-width = <2>; 49*4882a593Smuzhiyun spi-tx-bus-width = <2>; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun}; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun&sata { 54*4882a593Smuzhiyun status = "okay"; 55*4882a593Smuzhiyun}; 56