1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device Tree file for Freescale LS1012A FRWY Board. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright 2018 NXP 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Pramod Kumar <pramod.kumar_1@nxp.com> 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun/dts-v1/; 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun#include "fsl-ls1012a.dtsi" 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun/ { 15*4882a593Smuzhiyun model = "LS1012A FRWY Board"; 16*4882a593Smuzhiyun compatible = "fsl,ls1012a-frwy", "fsl,ls1012a"; 17*4882a593Smuzhiyun}; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun&duart0 { 20*4882a593Smuzhiyun status = "okay"; 21*4882a593Smuzhiyun}; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun&i2c0 { 24*4882a593Smuzhiyun status = "okay"; 25*4882a593Smuzhiyun}; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun&qspi { 28*4882a593Smuzhiyun status = "okay"; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun w25q16dw0: flash@0 { 31*4882a593Smuzhiyun compatible = "jedec,spi-nor"; 32*4882a593Smuzhiyun #address-cells = <1>; 33*4882a593Smuzhiyun #size-cells = <1>; 34*4882a593Smuzhiyun m25p,fast-read; 35*4882a593Smuzhiyun spi-max-frequency = <50000000>; 36*4882a593Smuzhiyun reg = <0>; 37*4882a593Smuzhiyun spi-rx-bus-width = <2>; 38*4882a593Smuzhiyun spi-tx-bus-width = <2>; 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun}; 41